1 /* 2 * Copyright (c) 2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _RX_ATTENTION_H_ 25 #define _RX_ATTENTION_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0 rxpcu_mpdu_filter_in_category[1:0], sw_frame_group_id[8:2], reserved_0[15:9], phy_ppdu_id[31:16] 34 // 1 first_mpdu[0], reserved_1a[1], mcast_bcast[2], ast_index_not_found[3], ast_index_timeout[4], power_mgmt[5], non_qos[6], null_data[7], mgmt_type[8], ctrl_type[9], more_data[10], eosp[11], a_msdu_error[12], fragment_flag[13], order[14], cce_match[15], overflow_err[16], msdu_length_err[17], tcp_udp_chksum_fail[18], ip_chksum_fail[19], sa_idx_invalid[20], da_idx_invalid[21], reserved_1b[22], rx_in_tx_decrypt_byp[23], encrypt_required[24], directed[25], buffer_fragment[26], mpdu_length_err[27], tkip_mic_err[28], decrypt_err[29], unencrypted_frame_err[30], fcs_err[31] 35 // 2 flow_idx_timeout[0], flow_idx_invalid[1], wifi_parser_error[2], amsdu_parser_error[3], sa_idx_timeout[4], da_idx_timeout[5], msdu_limit_error[6], da_is_valid[7], da_is_mcbc[8], sa_is_valid[9], decrypt_status_code[12:10], rx_bitmap_not_updated[13], reserved_2[30:14], msdu_done[31] 36 // 37 // ################ END SUMMARY ################# 38 39 #define NUM_OF_DWORDS_RX_ATTENTION 3 40 41 struct rx_attention { 42 uint32_t rxpcu_mpdu_filter_in_category : 2, //[1:0] 43 sw_frame_group_id : 7, //[8:2] 44 reserved_0 : 7, //[15:9] 45 phy_ppdu_id : 16; //[31:16] 46 uint32_t first_mpdu : 1, //[0] 47 reserved_1a : 1, //[1] 48 mcast_bcast : 1, //[2] 49 ast_index_not_found : 1, //[3] 50 ast_index_timeout : 1, //[4] 51 power_mgmt : 1, //[5] 52 non_qos : 1, //[6] 53 null_data : 1, //[7] 54 mgmt_type : 1, //[8] 55 ctrl_type : 1, //[9] 56 more_data : 1, //[10] 57 eosp : 1, //[11] 58 a_msdu_error : 1, //[12] 59 fragment_flag : 1, //[13] 60 order : 1, //[14] 61 cce_match : 1, //[15] 62 overflow_err : 1, //[16] 63 msdu_length_err : 1, //[17] 64 tcp_udp_chksum_fail : 1, //[18] 65 ip_chksum_fail : 1, //[19] 66 sa_idx_invalid : 1, //[20] 67 da_idx_invalid : 1, //[21] 68 reserved_1b : 1, //[22] 69 rx_in_tx_decrypt_byp : 1, //[23] 70 encrypt_required : 1, //[24] 71 directed : 1, //[25] 72 buffer_fragment : 1, //[26] 73 mpdu_length_err : 1, //[27] 74 tkip_mic_err : 1, //[28] 75 decrypt_err : 1, //[29] 76 unencrypted_frame_err : 1, //[30] 77 fcs_err : 1; //[31] 78 uint32_t flow_idx_timeout : 1, //[0] 79 flow_idx_invalid : 1, //[1] 80 wifi_parser_error : 1, //[2] 81 amsdu_parser_error : 1, //[3] 82 sa_idx_timeout : 1, //[4] 83 da_idx_timeout : 1, //[5] 84 msdu_limit_error : 1, //[6] 85 da_is_valid : 1, //[7] 86 da_is_mcbc : 1, //[8] 87 sa_is_valid : 1, //[9] 88 decrypt_status_code : 3, //[12:10] 89 rx_bitmap_not_updated : 1, //[13] 90 reserved_2 : 17, //[30:14] 91 msdu_done : 1; //[31] 92 }; 93 94 /* 95 96 rxpcu_mpdu_filter_in_category 97 98 Field indicates what the reason was that this MPDU frame 99 was allowed to come into the receive path by RXPCU 100 101 <enum 0 rxpcu_filter_pass> This MPDU passed the normal 102 frame filter programming of rxpcu 103 104 <enum 1 rxpcu_monitor_client> This MPDU did NOT pass the 105 regular frame filter and would have been dropped, were it 106 not for the frame fitting into the 'monitor_client' 107 category. 108 109 <enum 2 rxpcu_monitor_other> This MPDU did NOT pass the 110 regular frame filter and also did not pass the 111 rxpcu_monitor_client filter. It would have been dropped 112 accept that it did pass the 'monitor_other' category. 113 114 <legal 0-2> 115 116 sw_frame_group_id 117 118 SW processes frames based on certain classifications. 119 This field indicates to what sw classification this MPDU is 120 mapped. 121 122 The classification is given in priority order 123 124 125 126 <enum 0 sw_frame_group_NDP_frame> 127 128 129 130 <enum 1 sw_frame_group_Multicast_data> 131 132 <enum 2 sw_frame_group_Unicast_data> 133 134 <enum 3 sw_frame_group_Null_data > This includes mpdus 135 of type Data Null as well as QoS Data Null 136 137 138 139 <enum 4 sw_frame_group_mgmt_0000 > 140 141 <enum 5 sw_frame_group_mgmt_0001 > 142 143 <enum 6 sw_frame_group_mgmt_0010 > 144 145 <enum 7 sw_frame_group_mgmt_0011 > 146 147 <enum 8 sw_frame_group_mgmt_0100 > 148 149 <enum 9 sw_frame_group_mgmt_0101 > 150 151 <enum 10 sw_frame_group_mgmt_0110 > 152 153 <enum 11 sw_frame_group_mgmt_0111 > 154 155 <enum 12 sw_frame_group_mgmt_1000 > 156 157 <enum 13 sw_frame_group_mgmt_1001 > 158 159 <enum 14 sw_frame_group_mgmt_1010 > 160 161 <enum 15 sw_frame_group_mgmt_1011 > 162 163 <enum 16 sw_frame_group_mgmt_1100 > 164 165 <enum 17 sw_frame_group_mgmt_1101 > 166 167 <enum 18 sw_frame_group_mgmt_1110 > 168 169 <enum 19 sw_frame_group_mgmt_1111 > 170 171 172 173 <enum 20 sw_frame_group_ctrl_0000 > 174 175 <enum 21 sw_frame_group_ctrl_0001 > 176 177 <enum 22 sw_frame_group_ctrl_0010 > 178 179 <enum 23 sw_frame_group_ctrl_0011 > 180 181 <enum 24 sw_frame_group_ctrl_0100 > 182 183 <enum 25 sw_frame_group_ctrl_0101 > 184 185 <enum 26 sw_frame_group_ctrl_0110 > 186 187 <enum 27 sw_frame_group_ctrl_0111 > 188 189 <enum 28 sw_frame_group_ctrl_1000 > 190 191 <enum 29 sw_frame_group_ctrl_1001 > 192 193 <enum 30 sw_frame_group_ctrl_1010 > 194 195 <enum 31 sw_frame_group_ctrl_1011 > 196 197 <enum 32 sw_frame_group_ctrl_1100 > 198 199 <enum 33 sw_frame_group_ctrl_1101 > 200 201 <enum 34 sw_frame_group_ctrl_1110 > 202 203 <enum 35 sw_frame_group_ctrl_1111 > 204 205 206 207 <enum 36 sw_frame_group_unsupported> This covers type 3 208 and protocol version != 0 209 210 211 212 213 214 215 <legal 0-37> 216 217 reserved_0 218 219 <legal 0> 220 221 phy_ppdu_id 222 223 A ppdu counter value that PHY increments for every PPDU 224 received. The counter value wraps around 225 226 <legal all> 227 228 first_mpdu 229 230 Indicates the first MSDU of the PPDU. If both 231 first_mpdu and last_mpdu are set in the MSDU then this is a 232 not an A-MPDU frame but a stand alone MPDU. Interior MPDU 233 in an A-MPDU shall have both first_mpdu and last_mpdu bits 234 set to 0. The PPDU start status will only be valid when 235 this bit is set. 236 237 reserved_1a 238 239 <legal 0> 240 241 mcast_bcast 242 243 Multicast / broadcast indicator. Only set when the MAC 244 address 1 bit 0 is set indicating mcast/bcast and the BSSID 245 matches one of the 4 BSSID registers. Only set when 246 first_msdu is set. 247 248 ast_index_not_found 249 250 Only valid when first_msdu is set. 251 252 253 254 Indicates no AST matching entries within the the max 255 search count. 256 257 ast_index_timeout 258 259 Only valid when first_msdu is set. 260 261 262 263 Indicates an unsuccessful search in the address seach 264 table due to timeout. 265 266 power_mgmt 267 268 Power management bit set in the 802.11 header. Only set 269 when first_msdu is set. 270 271 non_qos 272 273 Set if packet is not a non-QoS data frame. Only set 274 when first_msdu is set. 275 276 null_data 277 278 Set if frame type indicates either null data or QoS null 279 data format. Only set when first_msdu is set. 280 281 mgmt_type 282 283 Set if packet is a management packet. Only set when 284 first_msdu is set. 285 286 ctrl_type 287 288 Set if packet is a control packet. Only set when 289 first_msdu is set. 290 291 more_data 292 293 Set if more bit in frame control is set. Only set when 294 first_msdu is set. 295 296 eosp 297 298 Set if the EOSP (end of service period) bit in the QoS 299 control field is set. Only set when first_msdu is set. 300 301 a_msdu_error 302 303 Set if number of MSDUs in A-MSDU is above a threshold or 304 if the size of the MSDU is invalid. This receive buffer 305 will contain all of the remainder of the MSDUs in this MPDU 306 without decapsulation. 307 308 fragment_flag 309 310 Indicates that this is an 802.11 fragment frame. This 311 is set when either the more_frag bit is set in the frame 312 control or the fragment number is not zero. Only set when 313 first_msdu is set. 314 315 order 316 317 Set if the order bit in the frame control is set. Only 318 set when first_msdu is set. 319 320 cce_match 321 322 Indicates that this status has a corresponding MSDU that 323 requires FW processing. The OLE will have classification 324 ring mask registers which will indicate the ring(s) for 325 packets and descriptors which need FW attention. 326 327 overflow_err 328 329 RXPCU Receive FIFO ran out of space to receive the full 330 MPDU. Therefor this MPDU is terminated early and is thus 331 corrupted. 332 333 334 335 This MPDU will not be ACKed. 336 337 RXPCU might still be able to correctly receive the 338 following MPDUs in the PPDU if enough fifo space became 339 available in time 340 341 msdu_length_err 342 343 Indicates that the MSDU length from the 802.3 344 encapsulated length field extends beyond the MPDU boundary 345 or if the length is less than 14 bytes. 346 347 Merged with original other_msdu_err: Indicates that the 348 MSDU threshold was exceeded and thus all the rest of the 349 MSDUs will not be scattered and will not be decasulated but 350 will be DMA'ed in RAW format as a single MSDU buffer 351 352 tcp_udp_chksum_fail 353 354 Indicates that the computed checksum (tcp_udp_chksum in 355 'RX_MSDU_END') did not match the checksum in the TCP/UDP 356 header. 357 358 ip_chksum_fail 359 360 Indicates that the computed checksum (ip_hdr_chksum in 361 'RX_MSDU_END') did not match the checksum in the IP header. 362 363 sa_idx_invalid 364 365 Indicates no matching entry was found in the address 366 search table for the source MAC address. 367 368 da_idx_invalid 369 370 Indicates no matching entry was found in the address 371 search table for the destination MAC address. 372 373 reserved_1b 374 375 <legal 0> 376 377 rx_in_tx_decrypt_byp 378 379 Indicates that RX packet is not decrypted as Crypto is 380 busy with TX packet processing. 381 382 encrypt_required 383 384 Indicates that this data type frame is not encrypted 385 even if the policy for this MPDU requires encryption as 386 indicated in the peer entry key type. 387 388 directed 389 390 MPDU is a directed packet which means that the RA 391 matched our STA addresses. In proxySTA it means that the TA 392 matched an entry in our address search table with the 393 corresponding no_ack bit is the address search entry 394 cleared. 395 396 buffer_fragment 397 398 Indicates that at least one of the rx buffers has been 399 fragmented. If set the FW should look at the rx_frag_info 400 descriptor described below. 401 402 mpdu_length_err 403 404 Indicates that the MPDU was pre-maturely terminated 405 resulting in a truncated MPDU. Don't trust the MPDU length 406 field. 407 408 tkip_mic_err 409 410 Indicates that the MPDU Michael integrity check failed 411 412 decrypt_err 413 414 Indicates that the MPDU decrypt integrity check failed 415 or CRYPTO received an encrypted frame, but did not get a 416 valid corresponding key id in the peer entry. 417 418 unencrypted_frame_err 419 420 Copied here by RX OLE from the RX_MPDU_END TLV 421 422 fcs_err 423 424 Indicates that the MPDU FCS check failed 425 426 flow_idx_timeout 427 428 Indicates an unsuccessful flow search due to the 429 expiring of the search timer. 430 431 <legal all> 432 433 flow_idx_invalid 434 435 flow id is not valid 436 437 <legal all> 438 439 wifi_parser_error 440 441 Indicates that the WiFi frame has one of the following 442 errors 443 444 o has less than minimum allowed bytes as per standard 445 446 o has incomplete VLAN LLC/SNAP (only for non A-MSDUs) 447 448 <legal all> 449 450 amsdu_parser_error 451 452 A-MSDU could not be properly de-agregated. 453 454 <legal all> 455 456 sa_idx_timeout 457 458 Indicates an unsuccessful MAC source address search due 459 to the expiring of the search timer. 460 461 da_idx_timeout 462 463 Indicates an unsuccessful MAC destination address search 464 due to the expiring of the search timer. 465 466 msdu_limit_error 467 468 Indicates that the MSDU threshold was exceeded and thus 469 all the rest of the MSDUs will not be scattered and will not 470 be decasulated but will be DMA'ed in RAW format as a single 471 MSDU buffer 472 473 da_is_valid 474 475 Indicates that OLE found a valid DA entry 476 477 da_is_mcbc 478 479 Field Only valid if da_is_valid is set 480 481 482 483 Indicates the DA address was a Multicast of Broadcast 484 address. 485 486 sa_is_valid 487 488 Indicates that OLE found a valid SA entry 489 490 decrypt_status_code 491 492 Field provides insight into the decryption performed 493 494 495 496 <enum 0 decrypt_ok> Frame had protection enabled and 497 decrypted properly 498 499 <enum 1 decrypt_unprotected_frame > Frame is unprotected 500 and hence bypassed 501 502 <enum 2 decrypt_data_err > Frame has protection enabled 503 and could not be properly decrypted due to MIC/ICV mismatch 504 etc. 505 506 <enum 3 decrypt_key_invalid > Frame has protection 507 enabled but the key that was required to decrypt this frame 508 was not valid 509 510 <enum 4 decrypt_peer_entry_invalid > Frame has 511 protection enabled but the key that was required to decrypt 512 this frame was not valid 513 514 <enum 5 decrypt_other > Reserved for other indications 515 516 517 518 <legal 0 - 5> 519 520 rx_bitmap_not_updated 521 522 Frame is received, but RXPCU could not update the 523 receive bitmap due to (temporary) fifo contraints. 524 525 <legal all> 526 527 reserved_2 528 529 <legal 0> 530 531 msdu_done 532 533 If set indicates that the RX packet data, RX header 534 data, RX PPDU start descriptor, RX MPDU start/end 535 descriptor, RX MSDU start/end descriptors and RX Attention 536 descriptor are all valid. This bit must be in the last 537 octet of the descriptor. 538 */ 539 540 541 /* Description RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY 542 543 Field indicates what the reason was that this MPDU frame 544 was allowed to come into the receive path by RXPCU 545 546 <enum 0 rxpcu_filter_pass> This MPDU passed the normal 547 frame filter programming of rxpcu 548 549 <enum 1 rxpcu_monitor_client> This MPDU did NOT pass the 550 regular frame filter and would have been dropped, were it 551 not for the frame fitting into the 'monitor_client' 552 category. 553 554 <enum 2 rxpcu_monitor_other> This MPDU did NOT pass the 555 regular frame filter and also did not pass the 556 rxpcu_monitor_client filter. It would have been dropped 557 accept that it did pass the 'monitor_other' category. 558 559 <legal 0-2> 560 */ 561 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x00000000 562 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0 563 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x00000003 564 565 /* Description RX_ATTENTION_0_SW_FRAME_GROUP_ID 566 567 SW processes frames based on certain classifications. 568 This field indicates to what sw classification this MPDU is 569 mapped. 570 571 The classification is given in priority order 572 573 574 575 <enum 0 sw_frame_group_NDP_frame> 576 577 578 579 <enum 1 sw_frame_group_Multicast_data> 580 581 <enum 2 sw_frame_group_Unicast_data> 582 583 <enum 3 sw_frame_group_Null_data > This includes mpdus 584 of type Data Null as well as QoS Data Null 585 586 587 588 <enum 4 sw_frame_group_mgmt_0000 > 589 590 <enum 5 sw_frame_group_mgmt_0001 > 591 592 <enum 6 sw_frame_group_mgmt_0010 > 593 594 <enum 7 sw_frame_group_mgmt_0011 > 595 596 <enum 8 sw_frame_group_mgmt_0100 > 597 598 <enum 9 sw_frame_group_mgmt_0101 > 599 600 <enum 10 sw_frame_group_mgmt_0110 > 601 602 <enum 11 sw_frame_group_mgmt_0111 > 603 604 <enum 12 sw_frame_group_mgmt_1000 > 605 606 <enum 13 sw_frame_group_mgmt_1001 > 607 608 <enum 14 sw_frame_group_mgmt_1010 > 609 610 <enum 15 sw_frame_group_mgmt_1011 > 611 612 <enum 16 sw_frame_group_mgmt_1100 > 613 614 <enum 17 sw_frame_group_mgmt_1101 > 615 616 <enum 18 sw_frame_group_mgmt_1110 > 617 618 <enum 19 sw_frame_group_mgmt_1111 > 619 620 621 622 <enum 20 sw_frame_group_ctrl_0000 > 623 624 <enum 21 sw_frame_group_ctrl_0001 > 625 626 <enum 22 sw_frame_group_ctrl_0010 > 627 628 <enum 23 sw_frame_group_ctrl_0011 > 629 630 <enum 24 sw_frame_group_ctrl_0100 > 631 632 <enum 25 sw_frame_group_ctrl_0101 > 633 634 <enum 26 sw_frame_group_ctrl_0110 > 635 636 <enum 27 sw_frame_group_ctrl_0111 > 637 638 <enum 28 sw_frame_group_ctrl_1000 > 639 640 <enum 29 sw_frame_group_ctrl_1001 > 641 642 <enum 30 sw_frame_group_ctrl_1010 > 643 644 <enum 31 sw_frame_group_ctrl_1011 > 645 646 <enum 32 sw_frame_group_ctrl_1100 > 647 648 <enum 33 sw_frame_group_ctrl_1101 > 649 650 <enum 34 sw_frame_group_ctrl_1110 > 651 652 <enum 35 sw_frame_group_ctrl_1111 > 653 654 655 656 <enum 36 sw_frame_group_unsupported> This covers type 3 657 and protocol version != 0 658 659 660 661 662 663 664 <legal 0-37> 665 */ 666 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_OFFSET 0x00000000 667 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_LSB 2 668 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_MASK 0x000001fc 669 670 /* Description RX_ATTENTION_0_RESERVED_0 671 672 <legal 0> 673 */ 674 #define RX_ATTENTION_0_RESERVED_0_OFFSET 0x00000000 675 #define RX_ATTENTION_0_RESERVED_0_LSB 9 676 #define RX_ATTENTION_0_RESERVED_0_MASK 0x0000fe00 677 678 /* Description RX_ATTENTION_0_PHY_PPDU_ID 679 680 A ppdu counter value that PHY increments for every PPDU 681 received. The counter value wraps around 682 683 <legal all> 684 */ 685 #define RX_ATTENTION_0_PHY_PPDU_ID_OFFSET 0x00000000 686 #define RX_ATTENTION_0_PHY_PPDU_ID_LSB 16 687 #define RX_ATTENTION_0_PHY_PPDU_ID_MASK 0xffff0000 688 689 /* Description RX_ATTENTION_1_FIRST_MPDU 690 691 Indicates the first MSDU of the PPDU. If both 692 first_mpdu and last_mpdu are set in the MSDU then this is a 693 not an A-MPDU frame but a stand alone MPDU. Interior MPDU 694 in an A-MPDU shall have both first_mpdu and last_mpdu bits 695 set to 0. The PPDU start status will only be valid when 696 this bit is set. 697 */ 698 #define RX_ATTENTION_1_FIRST_MPDU_OFFSET 0x00000004 699 #define RX_ATTENTION_1_FIRST_MPDU_LSB 0 700 #define RX_ATTENTION_1_FIRST_MPDU_MASK 0x00000001 701 702 /* Description RX_ATTENTION_1_RESERVED_1A 703 704 <legal 0> 705 */ 706 #define RX_ATTENTION_1_RESERVED_1A_OFFSET 0x00000004 707 #define RX_ATTENTION_1_RESERVED_1A_LSB 1 708 #define RX_ATTENTION_1_RESERVED_1A_MASK 0x00000002 709 710 /* Description RX_ATTENTION_1_MCAST_BCAST 711 712 Multicast / broadcast indicator. Only set when the MAC 713 address 1 bit 0 is set indicating mcast/bcast and the BSSID 714 matches one of the 4 BSSID registers. Only set when 715 first_msdu is set. 716 */ 717 #define RX_ATTENTION_1_MCAST_BCAST_OFFSET 0x00000004 718 #define RX_ATTENTION_1_MCAST_BCAST_LSB 2 719 #define RX_ATTENTION_1_MCAST_BCAST_MASK 0x00000004 720 721 /* Description RX_ATTENTION_1_AST_INDEX_NOT_FOUND 722 723 Only valid when first_msdu is set. 724 725 726 727 Indicates no AST matching entries within the the max 728 search count. 729 */ 730 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_OFFSET 0x00000004 731 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_LSB 3 732 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_MASK 0x00000008 733 734 /* Description RX_ATTENTION_1_AST_INDEX_TIMEOUT 735 736 Only valid when first_msdu is set. 737 738 739 740 Indicates an unsuccessful search in the address seach 741 table due to timeout. 742 */ 743 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_OFFSET 0x00000004 744 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_LSB 4 745 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_MASK 0x00000010 746 747 /* Description RX_ATTENTION_1_POWER_MGMT 748 749 Power management bit set in the 802.11 header. Only set 750 when first_msdu is set. 751 */ 752 #define RX_ATTENTION_1_POWER_MGMT_OFFSET 0x00000004 753 #define RX_ATTENTION_1_POWER_MGMT_LSB 5 754 #define RX_ATTENTION_1_POWER_MGMT_MASK 0x00000020 755 756 /* Description RX_ATTENTION_1_NON_QOS 757 758 Set if packet is not a non-QoS data frame. Only set 759 when first_msdu is set. 760 */ 761 #define RX_ATTENTION_1_NON_QOS_OFFSET 0x00000004 762 #define RX_ATTENTION_1_NON_QOS_LSB 6 763 #define RX_ATTENTION_1_NON_QOS_MASK 0x00000040 764 765 /* Description RX_ATTENTION_1_NULL_DATA 766 767 Set if frame type indicates either null data or QoS null 768 data format. Only set when first_msdu is set. 769 */ 770 #define RX_ATTENTION_1_NULL_DATA_OFFSET 0x00000004 771 #define RX_ATTENTION_1_NULL_DATA_LSB 7 772 #define RX_ATTENTION_1_NULL_DATA_MASK 0x00000080 773 774 /* Description RX_ATTENTION_1_MGMT_TYPE 775 776 Set if packet is a management packet. Only set when 777 first_msdu is set. 778 */ 779 #define RX_ATTENTION_1_MGMT_TYPE_OFFSET 0x00000004 780 #define RX_ATTENTION_1_MGMT_TYPE_LSB 8 781 #define RX_ATTENTION_1_MGMT_TYPE_MASK 0x00000100 782 783 /* Description RX_ATTENTION_1_CTRL_TYPE 784 785 Set if packet is a control packet. Only set when 786 first_msdu is set. 787 */ 788 #define RX_ATTENTION_1_CTRL_TYPE_OFFSET 0x00000004 789 #define RX_ATTENTION_1_CTRL_TYPE_LSB 9 790 #define RX_ATTENTION_1_CTRL_TYPE_MASK 0x00000200 791 792 /* Description RX_ATTENTION_1_MORE_DATA 793 794 Set if more bit in frame control is set. Only set when 795 first_msdu is set. 796 */ 797 #define RX_ATTENTION_1_MORE_DATA_OFFSET 0x00000004 798 #define RX_ATTENTION_1_MORE_DATA_LSB 10 799 #define RX_ATTENTION_1_MORE_DATA_MASK 0x00000400 800 801 /* Description RX_ATTENTION_1_EOSP 802 803 Set if the EOSP (end of service period) bit in the QoS 804 control field is set. Only set when first_msdu is set. 805 */ 806 #define RX_ATTENTION_1_EOSP_OFFSET 0x00000004 807 #define RX_ATTENTION_1_EOSP_LSB 11 808 #define RX_ATTENTION_1_EOSP_MASK 0x00000800 809 810 /* Description RX_ATTENTION_1_A_MSDU_ERROR 811 812 Set if number of MSDUs in A-MSDU is above a threshold or 813 if the size of the MSDU is invalid. This receive buffer 814 will contain all of the remainder of the MSDUs in this MPDU 815 without decapsulation. 816 */ 817 #define RX_ATTENTION_1_A_MSDU_ERROR_OFFSET 0x00000004 818 #define RX_ATTENTION_1_A_MSDU_ERROR_LSB 12 819 #define RX_ATTENTION_1_A_MSDU_ERROR_MASK 0x00001000 820 821 /* Description RX_ATTENTION_1_FRAGMENT_FLAG 822 823 Indicates that this is an 802.11 fragment frame. This 824 is set when either the more_frag bit is set in the frame 825 control or the fragment number is not zero. Only set when 826 first_msdu is set. 827 */ 828 #define RX_ATTENTION_1_FRAGMENT_FLAG_OFFSET 0x00000004 829 #define RX_ATTENTION_1_FRAGMENT_FLAG_LSB 13 830 #define RX_ATTENTION_1_FRAGMENT_FLAG_MASK 0x00002000 831 832 /* Description RX_ATTENTION_1_ORDER 833 834 Set if the order bit in the frame control is set. Only 835 set when first_msdu is set. 836 */ 837 #define RX_ATTENTION_1_ORDER_OFFSET 0x00000004 838 #define RX_ATTENTION_1_ORDER_LSB 14 839 #define RX_ATTENTION_1_ORDER_MASK 0x00004000 840 841 /* Description RX_ATTENTION_1_CCE_MATCH 842 843 Indicates that this status has a corresponding MSDU that 844 requires FW processing. The OLE will have classification 845 ring mask registers which will indicate the ring(s) for 846 packets and descriptors which need FW attention. 847 */ 848 #define RX_ATTENTION_1_CCE_MATCH_OFFSET 0x00000004 849 #define RX_ATTENTION_1_CCE_MATCH_LSB 15 850 #define RX_ATTENTION_1_CCE_MATCH_MASK 0x00008000 851 852 /* Description RX_ATTENTION_1_OVERFLOW_ERR 853 854 RXPCU Receive FIFO ran out of space to receive the full 855 MPDU. Therefor this MPDU is terminated early and is thus 856 corrupted. 857 858 859 860 This MPDU will not be ACKed. 861 862 RXPCU might still be able to correctly receive the 863 following MPDUs in the PPDU if enough fifo space became 864 available in time 865 */ 866 #define RX_ATTENTION_1_OVERFLOW_ERR_OFFSET 0x00000004 867 #define RX_ATTENTION_1_OVERFLOW_ERR_LSB 16 868 #define RX_ATTENTION_1_OVERFLOW_ERR_MASK 0x00010000 869 870 /* Description RX_ATTENTION_1_MSDU_LENGTH_ERR 871 872 Indicates that the MSDU length from the 802.3 873 encapsulated length field extends beyond the MPDU boundary 874 or if the length is less than 14 bytes. 875 876 Merged with original other_msdu_err: Indicates that the 877 MSDU threshold was exceeded and thus all the rest of the 878 MSDUs will not be scattered and will not be decasulated but 879 will be DMA'ed in RAW format as a single MSDU buffer 880 */ 881 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_OFFSET 0x00000004 882 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_LSB 17 883 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_MASK 0x00020000 884 885 /* Description RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL 886 887 Indicates that the computed checksum (tcp_udp_chksum in 888 'RX_MSDU_END') did not match the checksum in the TCP/UDP 889 header. 890 */ 891 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000004 892 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_LSB 18 893 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_MASK 0x00040000 894 895 /* Description RX_ATTENTION_1_IP_CHKSUM_FAIL 896 897 Indicates that the computed checksum (ip_hdr_chksum in 898 'RX_MSDU_END') did not match the checksum in the IP header. 899 */ 900 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_OFFSET 0x00000004 901 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_LSB 19 902 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_MASK 0x00080000 903 904 /* Description RX_ATTENTION_1_SA_IDX_INVALID 905 906 Indicates no matching entry was found in the address 907 search table for the source MAC address. 908 */ 909 #define RX_ATTENTION_1_SA_IDX_INVALID_OFFSET 0x00000004 910 #define RX_ATTENTION_1_SA_IDX_INVALID_LSB 20 911 #define RX_ATTENTION_1_SA_IDX_INVALID_MASK 0x00100000 912 913 /* Description RX_ATTENTION_1_DA_IDX_INVALID 914 915 Indicates no matching entry was found in the address 916 search table for the destination MAC address. 917 */ 918 #define RX_ATTENTION_1_DA_IDX_INVALID_OFFSET 0x00000004 919 #define RX_ATTENTION_1_DA_IDX_INVALID_LSB 21 920 #define RX_ATTENTION_1_DA_IDX_INVALID_MASK 0x00200000 921 922 /* Description RX_ATTENTION_1_RESERVED_1B 923 924 <legal 0> 925 */ 926 #define RX_ATTENTION_1_RESERVED_1B_OFFSET 0x00000004 927 #define RX_ATTENTION_1_RESERVED_1B_LSB 22 928 #define RX_ATTENTION_1_RESERVED_1B_MASK 0x00400000 929 930 /* Description RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP 931 932 Indicates that RX packet is not decrypted as Crypto is 933 busy with TX packet processing. 934 */ 935 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_OFFSET 0x00000004 936 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_LSB 23 937 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_MASK 0x00800000 938 939 /* Description RX_ATTENTION_1_ENCRYPT_REQUIRED 940 941 Indicates that this data type frame is not encrypted 942 even if the policy for this MPDU requires encryption as 943 indicated in the peer entry key type. 944 */ 945 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_OFFSET 0x00000004 946 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_LSB 24 947 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_MASK 0x01000000 948 949 /* Description RX_ATTENTION_1_DIRECTED 950 951 MPDU is a directed packet which means that the RA 952 matched our STA addresses. In proxySTA it means that the TA 953 matched an entry in our address search table with the 954 corresponding no_ack bit is the address search entry 955 cleared. 956 */ 957 #define RX_ATTENTION_1_DIRECTED_OFFSET 0x00000004 958 #define RX_ATTENTION_1_DIRECTED_LSB 25 959 #define RX_ATTENTION_1_DIRECTED_MASK 0x02000000 960 961 /* Description RX_ATTENTION_1_BUFFER_FRAGMENT 962 963 Indicates that at least one of the rx buffers has been 964 fragmented. If set the FW should look at the rx_frag_info 965 descriptor described below. 966 */ 967 #define RX_ATTENTION_1_BUFFER_FRAGMENT_OFFSET 0x00000004 968 #define RX_ATTENTION_1_BUFFER_FRAGMENT_LSB 26 969 #define RX_ATTENTION_1_BUFFER_FRAGMENT_MASK 0x04000000 970 971 /* Description RX_ATTENTION_1_MPDU_LENGTH_ERR 972 973 Indicates that the MPDU was pre-maturely terminated 974 resulting in a truncated MPDU. Don't trust the MPDU length 975 field. 976 */ 977 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_OFFSET 0x00000004 978 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_LSB 27 979 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_MASK 0x08000000 980 981 /* Description RX_ATTENTION_1_TKIP_MIC_ERR 982 983 Indicates that the MPDU Michael integrity check failed 984 */ 985 #define RX_ATTENTION_1_TKIP_MIC_ERR_OFFSET 0x00000004 986 #define RX_ATTENTION_1_TKIP_MIC_ERR_LSB 28 987 #define RX_ATTENTION_1_TKIP_MIC_ERR_MASK 0x10000000 988 989 /* Description RX_ATTENTION_1_DECRYPT_ERR 990 991 Indicates that the MPDU decrypt integrity check failed 992 or CRYPTO received an encrypted frame, but did not get a 993 valid corresponding key id in the peer entry. 994 */ 995 #define RX_ATTENTION_1_DECRYPT_ERR_OFFSET 0x00000004 996 #define RX_ATTENTION_1_DECRYPT_ERR_LSB 29 997 #define RX_ATTENTION_1_DECRYPT_ERR_MASK 0x20000000 998 999 /* Description RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR 1000 1001 Copied here by RX OLE from the RX_MPDU_END TLV 1002 */ 1003 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_OFFSET 0x00000004 1004 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_LSB 30 1005 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_MASK 0x40000000 1006 1007 /* Description RX_ATTENTION_1_FCS_ERR 1008 1009 Indicates that the MPDU FCS check failed 1010 */ 1011 #define RX_ATTENTION_1_FCS_ERR_OFFSET 0x00000004 1012 #define RX_ATTENTION_1_FCS_ERR_LSB 31 1013 #define RX_ATTENTION_1_FCS_ERR_MASK 0x80000000 1014 1015 /* Description RX_ATTENTION_2_FLOW_IDX_TIMEOUT 1016 1017 Indicates an unsuccessful flow search due to the 1018 expiring of the search timer. 1019 1020 <legal all> 1021 */ 1022 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_OFFSET 0x00000008 1023 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_LSB 0 1024 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_MASK 0x00000001 1025 1026 /* Description RX_ATTENTION_2_FLOW_IDX_INVALID 1027 1028 flow id is not valid 1029 1030 <legal all> 1031 */ 1032 #define RX_ATTENTION_2_FLOW_IDX_INVALID_OFFSET 0x00000008 1033 #define RX_ATTENTION_2_FLOW_IDX_INVALID_LSB 1 1034 #define RX_ATTENTION_2_FLOW_IDX_INVALID_MASK 0x00000002 1035 1036 /* Description RX_ATTENTION_2_WIFI_PARSER_ERROR 1037 1038 Indicates that the WiFi frame has one of the following 1039 errors 1040 1041 o has less than minimum allowed bytes as per standard 1042 1043 o has incomplete VLAN LLC/SNAP (only for non A-MSDUs) 1044 1045 <legal all> 1046 */ 1047 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_OFFSET 0x00000008 1048 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_LSB 2 1049 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_MASK 0x00000004 1050 1051 /* Description RX_ATTENTION_2_AMSDU_PARSER_ERROR 1052 1053 A-MSDU could not be properly de-agregated. 1054 1055 <legal all> 1056 */ 1057 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_OFFSET 0x00000008 1058 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_LSB 3 1059 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_MASK 0x00000008 1060 1061 /* Description RX_ATTENTION_2_SA_IDX_TIMEOUT 1062 1063 Indicates an unsuccessful MAC source address search due 1064 to the expiring of the search timer. 1065 */ 1066 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_OFFSET 0x00000008 1067 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_LSB 4 1068 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_MASK 0x00000010 1069 1070 /* Description RX_ATTENTION_2_DA_IDX_TIMEOUT 1071 1072 Indicates an unsuccessful MAC destination address search 1073 due to the expiring of the search timer. 1074 */ 1075 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_OFFSET 0x00000008 1076 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_LSB 5 1077 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_MASK 0x00000020 1078 1079 /* Description RX_ATTENTION_2_MSDU_LIMIT_ERROR 1080 1081 Indicates that the MSDU threshold was exceeded and thus 1082 all the rest of the MSDUs will not be scattered and will not 1083 be decasulated but will be DMA'ed in RAW format as a single 1084 MSDU buffer 1085 */ 1086 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_OFFSET 0x00000008 1087 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_LSB 6 1088 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_MASK 0x00000040 1089 1090 /* Description RX_ATTENTION_2_DA_IS_VALID 1091 1092 Indicates that OLE found a valid DA entry 1093 */ 1094 #define RX_ATTENTION_2_DA_IS_VALID_OFFSET 0x00000008 1095 #define RX_ATTENTION_2_DA_IS_VALID_LSB 7 1096 #define RX_ATTENTION_2_DA_IS_VALID_MASK 0x00000080 1097 1098 /* Description RX_ATTENTION_2_DA_IS_MCBC 1099 1100 Field Only valid if da_is_valid is set 1101 1102 1103 1104 Indicates the DA address was a Multicast of Broadcast 1105 address. 1106 */ 1107 #define RX_ATTENTION_2_DA_IS_MCBC_OFFSET 0x00000008 1108 #define RX_ATTENTION_2_DA_IS_MCBC_LSB 8 1109 #define RX_ATTENTION_2_DA_IS_MCBC_MASK 0x00000100 1110 1111 /* Description RX_ATTENTION_2_SA_IS_VALID 1112 1113 Indicates that OLE found a valid SA entry 1114 */ 1115 #define RX_ATTENTION_2_SA_IS_VALID_OFFSET 0x00000008 1116 #define RX_ATTENTION_2_SA_IS_VALID_LSB 9 1117 #define RX_ATTENTION_2_SA_IS_VALID_MASK 0x00000200 1118 1119 /* Description RX_ATTENTION_2_DECRYPT_STATUS_CODE 1120 1121 Field provides insight into the decryption performed 1122 1123 1124 1125 <enum 0 decrypt_ok> Frame had protection enabled and 1126 decrypted properly 1127 1128 <enum 1 decrypt_unprotected_frame > Frame is unprotected 1129 and hence bypassed 1130 1131 <enum 2 decrypt_data_err > Frame has protection enabled 1132 and could not be properly decrypted due to MIC/ICV mismatch 1133 etc. 1134 1135 <enum 3 decrypt_key_invalid > Frame has protection 1136 enabled but the key that was required to decrypt this frame 1137 was not valid 1138 1139 <enum 4 decrypt_peer_entry_invalid > Frame has 1140 protection enabled but the key that was required to decrypt 1141 this frame was not valid 1142 1143 <enum 5 decrypt_other > Reserved for other indications 1144 1145 1146 1147 <legal 0 - 5> 1148 */ 1149 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_OFFSET 0x00000008 1150 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_LSB 10 1151 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_MASK 0x00001c00 1152 1153 /* Description RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED 1154 1155 Frame is received, but RXPCU could not update the 1156 receive bitmap due to (temporary) fifo contraints. 1157 1158 <legal all> 1159 */ 1160 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_OFFSET 0x00000008 1161 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_LSB 13 1162 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_MASK 0x00002000 1163 1164 /* Description RX_ATTENTION_2_RESERVED_2 1165 1166 <legal 0> 1167 */ 1168 #define RX_ATTENTION_2_RESERVED_2_OFFSET 0x00000008 1169 #define RX_ATTENTION_2_RESERVED_2_LSB 14 1170 #define RX_ATTENTION_2_RESERVED_2_MASK 0x7fffc000 1171 1172 /* Description RX_ATTENTION_2_MSDU_DONE 1173 1174 If set indicates that the RX packet data, RX header 1175 data, RX PPDU start descriptor, RX MPDU start/end 1176 descriptor, RX MSDU start/end descriptors and RX Attention 1177 descriptor are all valid. This bit must be in the last 1178 octet of the descriptor. 1179 */ 1180 #define RX_ATTENTION_2_MSDU_DONE_OFFSET 0x00000008 1181 #define RX_ATTENTION_2_MSDU_DONE_LSB 31 1182 #define RX_ATTENTION_2_MSDU_DONE_MASK 0x80000000 1183 1184 1185 #endif // _RX_ATTENTION_H_ 1186