xref: /wlan-driver/fw-api/hw/qca6750/v1/rx_timing_offset_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 //
20 // DO NOT EDIT!  This file is automatically generated
21 //               These definitions are tied to a particular hardware layout
22 
23 
24 #ifndef _RX_TIMING_OFFSET_INFO_H_
25 #define _RX_TIMING_OFFSET_INFO_H_
26 #if !defined(__ASSEMBLER__)
27 #endif
28 
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0	residual_phase_offset[11:0], reserved[31:12]
34 //
35 // ################ END SUMMARY #################
36 
37 #define NUM_OF_DWORDS_RX_TIMING_OFFSET_INFO 1
38 
39 struct rx_timing_offset_info {
40              uint32_t residual_phase_offset           : 12, //[11:0]
41                       reserved                        : 20; //[31:12]
42 };
43 
44 /*
45 
46 residual_phase_offset
47 
48 			Cumulative reference frequency error at end of RX
49 
50 			<legal all>
51 
52 reserved
53 
54 			<legal 0>
55 */
56 
57 
58 /* Description		RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET
59 
60 			Cumulative reference frequency error at end of RX
61 
62 			<legal all>
63 */
64 #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_OFFSET         0x00000000
65 #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_LSB            0
66 #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_MASK           0x00000fff
67 
68 /* Description		RX_TIMING_OFFSET_INFO_0_RESERVED
69 
70 			<legal 0>
71 */
72 #define RX_TIMING_OFFSET_INFO_0_RESERVED_OFFSET                      0x00000000
73 #define RX_TIMING_OFFSET_INFO_0_RESERVED_LSB                         12
74 #define RX_TIMING_OFFSET_INFO_0_RESERVED_MASK                        0xfffff000
75 
76 
77 #endif // _RX_TIMING_OFFSET_INFO_H_
78