1 /* 2 * Copyright (c) 2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // 20 // DO NOT EDIT! This file is automatically generated 21 // These definitions are tied to a particular hardware layout 22 23 24 #ifndef _RXPT_CLASSIFY_INFO_H_ 25 #define _RXPT_CLASSIFY_INFO_H_ 26 #if !defined(__ASSEMBLER__) 27 #endif 28 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0 reo_destination_indication[4:0], lmac_peer_id_msb[6:5], use_flow_id_toeplitz_clfy[7], pkt_selection_fp_ucast_data[8], pkt_selection_fp_mcast_data[9], pkt_selection_fp_1000[10], rxdma0_source_ring_selection[12:11], rxdma0_destination_ring_selection[14:13], reserved_0b[31:15] 34 // 35 // ################ END SUMMARY ################# 36 37 #define NUM_OF_DWORDS_RXPT_CLASSIFY_INFO 1 38 39 struct rxpt_classify_info { 40 uint32_t reo_destination_indication : 5, //[4:0] 41 lmac_peer_id_msb : 2, //[6:5] 42 use_flow_id_toeplitz_clfy : 1, //[7] 43 pkt_selection_fp_ucast_data : 1, //[8] 44 pkt_selection_fp_mcast_data : 1, //[9] 45 pkt_selection_fp_1000 : 1, //[10] 46 rxdma0_source_ring_selection : 2, //[12:11] 47 rxdma0_destination_ring_selection: 2, //[14:13] 48 reserved_0b : 17; //[31:15] 49 }; 50 51 /* 52 53 reo_destination_indication 54 55 The ID of the REO exit ring where the MSDU frame shall 56 push after (MPDU level) reordering has finished. 57 58 59 60 <enum 0 reo_destination_tcl> Reo will push the frame 61 into the REO2TCL ring 62 63 <enum 1 reo_destination_sw1> Reo will push the frame 64 into the REO2SW1 ring 65 66 <enum 2 reo_destination_sw2> Reo will push the frame 67 into the REO2SW2 ring 68 69 <enum 3 reo_destination_sw3> Reo will push the frame 70 into the REO2SW3 ring 71 72 <enum 4 reo_destination_sw4> Reo will push the frame 73 into the REO2SW4 ring 74 75 <enum 5 reo_destination_release> Reo will push the frame 76 into the REO_release ring 77 78 <enum 6 reo_destination_fw> Reo will push the frame into 79 the REO2FW ring 80 81 <enum 7 reo_destination_sw5> Reo will push the frame 82 into the REO2SW5 ring (REO remaps this in chips without 83 REO2SW5 ring, e.g. Pine) 84 85 <enum 8 reo_destination_sw6> Reo will push the frame 86 into the REO2SW6 ring (REO remaps this in chips without 87 REO2SW6 ring, e.g. Pine) 88 89 <enum 9 reo_destination_9> REO remaps this <enum 10 90 reo_destination_10> REO remaps this 91 92 <enum 11 reo_destination_11> REO remaps this 93 94 <enum 12 reo_destination_12> REO remaps this <enum 13 95 reo_destination_13> REO remaps this 96 97 <enum 14 reo_destination_14> REO remaps this 98 99 <enum 15 reo_destination_15> REO remaps this 100 101 <enum 16 reo_destination_16> REO remaps this 102 103 <enum 17 reo_destination_17> REO remaps this 104 105 <enum 18 reo_destination_18> REO remaps this 106 107 <enum 19 reo_destination_19> REO remaps this 108 109 <enum 20 reo_destination_20> REO remaps this 110 111 <enum 21 reo_destination_21> REO remaps this 112 113 <enum 22 reo_destination_22> REO remaps this 114 115 <enum 23 reo_destination_23> REO remaps this 116 117 <enum 24 reo_destination_24> REO remaps this 118 119 <enum 25 reo_destination_25> REO remaps this 120 121 <enum 26 reo_destination_26> REO remaps this 122 123 <enum 27 reo_destination_27> REO remaps this 124 125 <enum 28 reo_destination_28> REO remaps this 126 127 <enum 29 reo_destination_29> REO remaps this 128 129 <enum 30 reo_destination_30> REO remaps this 130 131 <enum 31 reo_destination_31> REO remaps this 132 133 134 135 <legal all> 136 137 lmac_peer_id_msb 138 139 If use_flow_id_toeplitz_clfy is set and lmac_peer_id_'sb 140 is 2'b00, Rx OLE uses a REO desination indicati'n of {1'b1, 141 hash[3:0]} using the chosen Toeplitz hash from Common Parser 142 if flow search fails. 143 144 If use_flow_id_toeplitz_clfy is set and lmac_peer_id_msb 145 's not 2'b00, Rx OLE uses a REO desination indication of 146 {lmac_peer_id_msb, hash[2:0]} using the chosen Toeplitz hash 147 from Common Parser if flow search fails. 148 149 This LMAC/peer-based routing is not supported in 150 Hastings80 and HastingsPrime. 151 152 <legal all> 153 154 use_flow_id_toeplitz_clfy 155 156 Indication to Rx OLE to enable REO destination routing 157 based on the chosen Toeplitz hash from Common Parser, in 158 case flow search fails 159 160 <legal all> 161 162 pkt_selection_fp_ucast_data 163 164 Filter pass Unicast data frame (matching 165 rxpcu_filter_pass and sw_frame_group_Unicast_data) routing 166 selection 167 168 169 170 1'b0: source and destination rings are selected from the 171 RxOLE register settings for the packet type 172 173 174 175 1'b1: source ring and destination ring is selected from 176 the rxdma0_source_ring_selection and 177 rxdma0_destination_ring_selection fields in this STRUCT 178 179 <legal all> 180 181 pkt_selection_fp_mcast_data 182 183 Filter pass Multicast data frame (matching 184 rxpcu_filter_pass and sw_frame_group_Multicast_data) routing 185 selection 186 187 188 189 1'b0: source and destination rings are selected from the 190 RxOLE register settings for the packet type 191 192 193 194 1'b1: source ring and destination ring is selected from 195 the rxdma0_source_ring_selection and 196 rxdma0_destination_ring_selection fields in this STRUCT 197 198 <legal all> 199 200 pkt_selection_fp_1000 201 202 Filter pass BAR frame (matching rxpcu_filter_pass and 203 sw_frame_group_ctrl_1000) routing selection 204 205 206 207 1'b0: source and destination rings are selected from the 208 RxOLE register settings for the packet type 209 210 211 212 1'b1: source ring and destination ring is selected from 213 the rxdma0_source_ring_selection and 214 rxdma0_destination_ring_selection fields in this STRUCT 215 216 <legal all> 217 218 rxdma0_source_ring_selection 219 220 Field only valid when for the received frame type the 221 corresponding pkt_selection_fp_... bit is set 222 223 224 225 <enum 0 wbm2rxdma_buf_source_ring> The data buffer for 226 227 <enum 1 fw2rxdma_buf_source_ring> The data buffer for 228 this frame shall be sourced by fw2rxdma buffer source ring. 229 230 <enum 2 sw2rxdma_buf_source_ring> The data buffer for 231 this frame shall be sourced by sw2rxdma buffer source ring. 232 233 <enum 3 no_buffer_ring> The frame shall not be written 234 to any data buffer. 235 236 237 238 <legal all> 239 240 rxdma0_destination_ring_selection 241 242 Field only valid when for the received frame type the 243 corresponding pkt_selection_fp_... bit is set 244 245 246 247 <enum 0 rxdma_release_ring> RXDMA0 shall push the frame 248 to the Release ring. Effectively this means the frame needs 249 to be dropped. 250 251 <enum 1 rxdma2fw_ring> RXDMA0 shall push the frame to 252 the FW ring. 253 254 <enum 2 rxdma2sw_ring> RXDMA0 shall push the frame to 255 the SW ring. 256 257 <enum 3 rxdma2reo_ring> RXDMA0 shall push the frame to 258 the REO entrance ring. 259 260 261 262 <legal all> 263 264 reserved_0b 265 266 <legal 0> 267 */ 268 269 270 /* Description RXPT_CLASSIFY_INFO_0_REO_DESTINATION_INDICATION 271 272 The ID of the REO exit ring where the MSDU frame shall 273 push after (MPDU level) reordering has finished. 274 275 276 277 <enum 0 reo_destination_tcl> Reo will push the frame 278 into the REO2TCL ring 279 280 <enum 1 reo_destination_sw1> Reo will push the frame 281 into the REO2SW1 ring 282 283 <enum 2 reo_destination_sw2> Reo will push the frame 284 into the REO2SW2 ring 285 286 <enum 3 reo_destination_sw3> Reo will push the frame 287 into the REO2SW3 ring 288 289 <enum 4 reo_destination_sw4> Reo will push the frame 290 into the REO2SW4 ring 291 292 <enum 5 reo_destination_release> Reo will push the frame 293 into the REO_release ring 294 295 <enum 6 reo_destination_fw> Reo will push the frame into 296 the REO2FW ring 297 298 <enum 7 reo_destination_sw5> Reo will push the frame 299 into the REO2SW5 ring (REO remaps this in chips without 300 REO2SW5 ring, e.g. Pine) 301 302 <enum 8 reo_destination_sw6> Reo will push the frame 303 into the REO2SW6 ring (REO remaps this in chips without 304 REO2SW6 ring, e.g. Pine) 305 306 <enum 9 reo_destination_9> REO remaps this <enum 10 307 reo_destination_10> REO remaps this 308 309 <enum 11 reo_destination_11> REO remaps this 310 311 <enum 12 reo_destination_12> REO remaps this <enum 13 312 reo_destination_13> REO remaps this 313 314 <enum 14 reo_destination_14> REO remaps this 315 316 <enum 15 reo_destination_15> REO remaps this 317 318 <enum 16 reo_destination_16> REO remaps this 319 320 <enum 17 reo_destination_17> REO remaps this 321 322 <enum 18 reo_destination_18> REO remaps this 323 324 <enum 19 reo_destination_19> REO remaps this 325 326 <enum 20 reo_destination_20> REO remaps this 327 328 <enum 21 reo_destination_21> REO remaps this 329 330 <enum 22 reo_destination_22> REO remaps this 331 332 <enum 23 reo_destination_23> REO remaps this 333 334 <enum 24 reo_destination_24> REO remaps this 335 336 <enum 25 reo_destination_25> REO remaps this 337 338 <enum 26 reo_destination_26> REO remaps this 339 340 <enum 27 reo_destination_27> REO remaps this 341 342 <enum 28 reo_destination_28> REO remaps this 343 344 <enum 29 reo_destination_29> REO remaps this 345 346 <enum 30 reo_destination_30> REO remaps this 347 348 <enum 31 reo_destination_31> REO remaps this 349 350 351 352 <legal all> 353 */ 354 #define RXPT_CLASSIFY_INFO_0_REO_DESTINATION_INDICATION_OFFSET 0x00000000 355 #define RXPT_CLASSIFY_INFO_0_REO_DESTINATION_INDICATION_LSB 0 356 #define RXPT_CLASSIFY_INFO_0_REO_DESTINATION_INDICATION_MASK 0x0000001f 357 358 /* Description RXPT_CLASSIFY_INFO_0_LMAC_PEER_ID_MSB 359 360 If use_flow_id_toeplitz_clfy is set and lmac_peer_id_'sb 361 is 2'b00, Rx OLE uses a REO desination indicati'n of {1'b1, 362 hash[3:0]} using the chosen Toeplitz hash from Common Parser 363 if flow search fails. 364 365 If use_flow_id_toeplitz_clfy is set and lmac_peer_id_msb 366 's not 2'b00, Rx OLE uses a REO desination indication of 367 {lmac_peer_id_msb, hash[2:0]} using the chosen Toeplitz hash 368 from Common Parser if flow search fails. 369 370 This LMAC/peer-based routing is not supported in 371 Hastings80 and HastingsPrime. 372 373 <legal all> 374 */ 375 #define RXPT_CLASSIFY_INFO_0_LMAC_PEER_ID_MSB_OFFSET 0x00000000 376 #define RXPT_CLASSIFY_INFO_0_LMAC_PEER_ID_MSB_LSB 5 377 #define RXPT_CLASSIFY_INFO_0_LMAC_PEER_ID_MSB_MASK 0x00000060 378 379 /* Description RXPT_CLASSIFY_INFO_0_USE_FLOW_ID_TOEPLITZ_CLFY 380 381 Indication to Rx OLE to enable REO destination routing 382 based on the chosen Toeplitz hash from Common Parser, in 383 case flow search fails 384 385 <legal all> 386 */ 387 #define RXPT_CLASSIFY_INFO_0_USE_FLOW_ID_TOEPLITZ_CLFY_OFFSET 0x00000000 388 #define RXPT_CLASSIFY_INFO_0_USE_FLOW_ID_TOEPLITZ_CLFY_LSB 7 389 #define RXPT_CLASSIFY_INFO_0_USE_FLOW_ID_TOEPLITZ_CLFY_MASK 0x00000080 390 391 /* Description RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_UCAST_DATA 392 393 Filter pass Unicast data frame (matching 394 rxpcu_filter_pass and sw_frame_group_Unicast_data) routing 395 selection 396 397 398 399 1'b0: source and destination rings are selected from the 400 RxOLE register settings for the packet type 401 402 403 404 1'b1: source ring and destination ring is selected from 405 the rxdma0_source_ring_selection and 406 rxdma0_destination_ring_selection fields in this STRUCT 407 408 <legal all> 409 */ 410 #define RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_UCAST_DATA_OFFSET 0x00000000 411 #define RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_UCAST_DATA_LSB 8 412 #define RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_UCAST_DATA_MASK 0x00000100 413 414 /* Description RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_MCAST_DATA 415 416 Filter pass Multicast data frame (matching 417 rxpcu_filter_pass and sw_frame_group_Multicast_data) routing 418 selection 419 420 421 422 1'b0: source and destination rings are selected from the 423 RxOLE register settings for the packet type 424 425 426 427 1'b1: source ring and destination ring is selected from 428 the rxdma0_source_ring_selection and 429 rxdma0_destination_ring_selection fields in this STRUCT 430 431 <legal all> 432 */ 433 #define RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_MCAST_DATA_OFFSET 0x00000000 434 #define RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_MCAST_DATA_LSB 9 435 #define RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_MCAST_DATA_MASK 0x00000200 436 437 /* Description RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_1000 438 439 Filter pass BAR frame (matching rxpcu_filter_pass and 440 sw_frame_group_ctrl_1000) routing selection 441 442 443 444 1'b0: source and destination rings are selected from the 445 RxOLE register settings for the packet type 446 447 448 449 1'b1: source ring and destination ring is selected from 450 the rxdma0_source_ring_selection and 451 rxdma0_destination_ring_selection fields in this STRUCT 452 453 <legal all> 454 */ 455 #define RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_1000_OFFSET 0x00000000 456 #define RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_1000_LSB 10 457 #define RXPT_CLASSIFY_INFO_0_PKT_SELECTION_FP_1000_MASK 0x00000400 458 459 /* Description RXPT_CLASSIFY_INFO_0_RXDMA0_SOURCE_RING_SELECTION 460 461 Field only valid when for the received frame type the 462 corresponding pkt_selection_fp_... bit is set 463 464 465 466 <enum 0 wbm2rxdma_buf_source_ring> The data buffer for 467 468 <enum 1 fw2rxdma_buf_source_ring> The data buffer for 469 this frame shall be sourced by fw2rxdma buffer source ring. 470 471 <enum 2 sw2rxdma_buf_source_ring> The data buffer for 472 this frame shall be sourced by sw2rxdma buffer source ring. 473 474 <enum 3 no_buffer_ring> The frame shall not be written 475 to any data buffer. 476 477 478 479 <legal all> 480 */ 481 #define RXPT_CLASSIFY_INFO_0_RXDMA0_SOURCE_RING_SELECTION_OFFSET 0x00000000 482 #define RXPT_CLASSIFY_INFO_0_RXDMA0_SOURCE_RING_SELECTION_LSB 11 483 #define RXPT_CLASSIFY_INFO_0_RXDMA0_SOURCE_RING_SELECTION_MASK 0x00001800 484 485 /* Description RXPT_CLASSIFY_INFO_0_RXDMA0_DESTINATION_RING_SELECTION 486 487 Field only valid when for the received frame type the 488 corresponding pkt_selection_fp_... bit is set 489 490 491 492 <enum 0 rxdma_release_ring> RXDMA0 shall push the frame 493 to the Release ring. Effectively this means the frame needs 494 to be dropped. 495 496 <enum 1 rxdma2fw_ring> RXDMA0 shall push the frame to 497 the FW ring. 498 499 <enum 2 rxdma2sw_ring> RXDMA0 shall push the frame to 500 the SW ring. 501 502 <enum 3 rxdma2reo_ring> RXDMA0 shall push the frame to 503 the REO entrance ring. 504 505 506 507 <legal all> 508 */ 509 #define RXPT_CLASSIFY_INFO_0_RXDMA0_DESTINATION_RING_SELECTION_OFFSET 0x00000000 510 #define RXPT_CLASSIFY_INFO_0_RXDMA0_DESTINATION_RING_SELECTION_LSB 13 511 #define RXPT_CLASSIFY_INFO_0_RXDMA0_DESTINATION_RING_SELECTION_MASK 0x00006000 512 513 /* Description RXPT_CLASSIFY_INFO_0_RESERVED_0B 514 515 <legal 0> 516 */ 517 #define RXPT_CLASSIFY_INFO_0_RESERVED_0B_OFFSET 0x00000000 518 #define RXPT_CLASSIFY_INFO_0_RESERVED_0B_LSB 15 519 #define RXPT_CLASSIFY_INFO_0_RESERVED_0B_MASK 0xffff8000 520 521 522 #endif // _RXPT_CLASSIFY_INFO_H_ 523