1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2020 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 20*5113495bSYour Name // 21*5113495bSYour Name // wcss_seq_hwiobase.h : automatically generated by Autoseq 3.8 11/13/2019 22*5113495bSYour Name // User Name:sanjdas 23*5113495bSYour Name // 24*5113495bSYour Name // !! WARNING !! DO NOT MANUALLY EDIT THIS FILE. 25*5113495bSYour Name // 26*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 27*5113495bSYour Name 28*5113495bSYour Name #ifndef __WCSS_SEQ_BASE_H__ 29*5113495bSYour Name #define __WCSS_SEQ_BASE_H__ 30*5113495bSYour Name 31*5113495bSYour Name #ifdef SCALE_INCLUDES 32*5113495bSYour Name #include "HALhwio.h" 33*5113495bSYour Name #else 34*5113495bSYour Name #include "msmhwio.h" 35*5113495bSYour Name #endif 36*5113495bSYour Name 37*5113495bSYour Name #ifndef SOC_WCSS_BASE_ADDR 38*5113495bSYour Name #if defined(WCSS_BASE) 39*5113495bSYour Name #if ( WCSS_BASE != 0x0 ) 40*5113495bSYour Name #error WCSS_BASE incorrectly redefined! 41*5113495bSYour Name #endif 42*5113495bSYour Name #endif 43*5113495bSYour Name 44*5113495bSYour Name #define SOC_WCSS_BASE_ADDR 0x0 45*5113495bSYour Name #else 46*5113495bSYour Name #if ( SOC_WCSS_BASE_ADDR != 0x0 ) 47*5113495bSYour Name #error SOC_WCSS_BASE_ADDR incorrectly redefined! 48*5113495bSYour Name #endif 49*5113495bSYour Name #endif 50*5113495bSYour Name 51*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 52*5113495bSYour Name // Instance Relative Offsets from Block wcss 53*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 54*5113495bSYour Name 55*5113495bSYour Name #define SEQ_WCSS_UMAC_NOC_OFFSET 0x00140000 56*5113495bSYour Name #define SEQ_WCSS_PHYA_OFFSET 0x00300000 57*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00300000 58*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_REG_MAP_OFFSET 0x00380000 59*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00380400 60*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00380800 61*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00380c00 62*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00381000 63*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00381400 64*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00381800 65*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00381c00 66*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_XDMAC5_REG_MAP_OFFSET 0x00382c00 67*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_XDMAC6_REG_MAP_OFFSET 0x00383000 68*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_NOC_REG_MAP_OFFSET 0x00388000 69*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXFD_REG_MAP_OFFSET 0x00390000 70*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_RXTD_REG_MAP_OFFSET 0x003a0000 71*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXTD_REG_MAP_OFFSET 0x003b0000 72*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXBF_REG_MAP_OFFSET 0x003c0000 73*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_DEMFRONT_0_REG_MAP_OFFSET 0x00400000 74*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PHYRF_REG_MAP_OFFSET 0x00480000 75*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_ROBE_REG_MAP_OFFSET 0x004b0000 76*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_DEMFRONT_1_REG_MAP_OFFSET 0x00500000 77*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_OFFSET 0x005c0000 78*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_OFFSET 0x005c0000 79*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_SYSCTRL_OFFSET 0x005cf000 80*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_TLMM_OFFSET 0x005cf400 81*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_OVERRIDE_REG_OFFSET 0x005cf800 82*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_AON_1P8_REG_OFFSET 0x005cfc00 83*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TLMM_OFFSET 0x005c0000 84*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TRC_OFFSET 0x005c0200 85*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_COEX_LTE_REG_OFFSET 0x005c5000 86*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_PMU_OFFSET 0x005d1000 87*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_OFFSET 0x005c7000 88*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x005c9b00 89*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x005c7000 90*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x005cb000 91*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x005d4000 92*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_CAL_OFFSET 0x005d42f0 93*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x005d4000 94*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x005d4240 95*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x005d42c0 96*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x005d4300 97*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x005d4400 98*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x005d4480 99*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x005d4800 100*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x005d4c00 101*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_OFFSET 0x005d5000 102*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x005d5400 103*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x005d6000 104*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x005d6040 105*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x005d6100 106*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x005d6140 107*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x005d6180 108*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x005d61c0 109*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x005d6280 110*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x005d6800 111*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x005d6840 112*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x005d6900 113*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x005d6940 114*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x005d6980 115*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x005d69c0 116*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x005d6a80 117*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x005d7000 118*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x005d7040 119*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x005d7100 120*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x005d7140 121*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x005d7180 122*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x005d71c0 123*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x005d7280 124*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_PMU_TEST_OFFSET 0x005da000 125*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET 0x005dc000 126*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_MTOP_OFFSET 0x005dc000 127*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TXBB_OFFSET 0x005dc800 128*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TXFE_CH0_OFFSET 0x005dcc00 129*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TXFE_CH1_OFFSET 0x005dd000 130*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x005de800 131*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_OFFSET 0x005de980 132*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x005de9c0 133*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_MISC_OFFSET 0x005deac0 134*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RXBB_CH0_OFFSET 0x005dec00 135*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RXBB_CH1_OFFSET 0x005dee00 136*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RXFE_CH0_OFFSET 0x005df000 137*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RXFE_CH1_OFFSET 0x005df200 138*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x005dfc00 139*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x005dfc40 140*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x005dfc80 141*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x005dfcc0 142*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x005e0000 143*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x005e0000 144*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x005e1000 145*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x005e1300 146*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x005e2000 147*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x005e4000 148*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x005e8000 149*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x005e8400 150*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH0_OFFSET 0x005e8800 151*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x005e9000 152*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x005e9300 153*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x005ea000 154*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_CH0_OFFSET 0x005ea400 155*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CH0_OFFSET 0x005ea580 156*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_CH0_OFFSET 0x005ea5c0 157*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_CH0_OFFSET 0x005ea6c0 158*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_CH0_OFFSET 0x005ea734 159*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_CH0_OFFSET 0x005ea740 160*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_CH0_OFFSET 0x005ea800 161*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_CH0_OFFSET 0x005ea840 162*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_CH0_OFFSET 0x005ea880 163*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_CH0_OFFSET 0x005ea8c0 164*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_CH0_OFFSET 0x005ea900 165*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_CH0_OFFSET 0x005ea99c 166*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x005ec000 167*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x005f0000 168*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x005f1000 169*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x005f1300 170*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x005f2000 171*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x005f4000 172*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x005f8000 173*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH1_OFFSET 0x005f8400 174*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH1_OFFSET 0x005f8800 175*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x005f9000 176*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x005f9300 177*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x005fa000 178*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_CH1_OFFSET 0x005fa400 179*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CH1_OFFSET 0x005fa580 180*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_CH1_OFFSET 0x005fa5c0 181*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_CH1_OFFSET 0x005fa6c0 182*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_CH1_OFFSET 0x005fa734 183*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_CH1_OFFSET 0x005fa740 184*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_CH1_OFFSET 0x005fa800 185*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_CH1_OFFSET 0x005fa840 186*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_CH1_OFFSET 0x005fa880 187*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_CH1_OFFSET 0x005fa8c0 188*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_CH1_OFFSET 0x005fa900 189*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_CH1_OFFSET 0x005fa99c 190*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x005fc000 191*5113495bSYour Name #define SEQ_WCSS_UMAC_OFFSET 0x00a00000 192*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_OFFSET 0x00a20000 193*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00a20000 194*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00a22000 195*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00a24000 196*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00a26000 197*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00a28000 198*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x00a2a000 199*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TRACER_REG_OFFSET 0x00a30000 200*5113495bSYour Name #define SEQ_WCSS_UMAC_WBM_REG_OFFSET 0x00a34000 201*5113495bSYour Name #define SEQ_WCSS_UMAC_REO_REG_OFFSET 0x00a38000 202*5113495bSYour Name #define SEQ_WCSS_UMAC_TQM_REG_OFFSET 0x00a3c000 203*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_UMCMN_REG_OFFSET 0x00a40000 204*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET 0x00a44000 205*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_CMN_PARSER_CE_REG_OFFSET 0x00a47000 206*5113495bSYour Name #define SEQ_WCSS_WMAC0_OFFSET 0x00a80000 207*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_PDG_REG_OFFSET 0x00a80000 208*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXDMA_REG_OFFSET 0x00a83000 209*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXDMA_REG_OFFSET 0x00a86000 210*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MCMN_REG_OFFSET 0x00a89000 211*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXPCU_REG_OFFSET 0x00a8c000 212*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXPCU_REG_OFFSET 0x00a8f000 213*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_AMPI_REG_OFFSET 0x00a92000 214*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_REG_OFFSET 0x00a95000 215*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_PARSER_REG_OFFSET 0x00a98000 216*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CCE_REG_OFFSET 0x00a9b000 217*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_REG_OFFSET 0x00a9e000 218*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_PARSER_REG_OFFSET 0x00aa1000 219*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RRI_REG_OFFSET 0x00aa4000 220*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CRYPTO_REG_OFFSET 0x00aa7000 221*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_HWSCH_REG_OFFSET 0x00aaa000 222*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MXI_REG_OFFSET 0x00ab0000 223*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_SFM_REG_OFFSET 0x00ab3000 224*5113495bSYour Name #define SEQ_WCSS_APB_TSLV_OFFSET 0x00b40000 225*5113495bSYour Name #define SEQ_WCSS_TOP_CMN_OFFSET 0x00b50000 226*5113495bSYour Name #define SEQ_WCSS_WCMN_CORE_OFFSET 0x00b58000 227*5113495bSYour Name #define SEQ_WCSS_WFSS_PMM_OFFSET 0x00b60000 228*5113495bSYour Name #define SEQ_WCSS_PMM_TOP_OFFSET 0x00b70000 229*5113495bSYour Name #define SEQ_WCSS_DBG_OFFSET 0x00b90000 230*5113495bSYour Name #define SEQ_WCSS_DBG_WCSS_DBG_DAPROM_OFFSET 0x00b90000 231*5113495bSYour Name #define SEQ_WCSS_DBG_CSR_WCSS_DBG_CSR_OFFSET 0x00b91000 232*5113495bSYour Name #define SEQ_WCSS_DBG_TSGEN_CXTSGEN_OFFSET 0x00b92000 233*5113495bSYour Name #define SEQ_WCSS_DBG_CTIDBG_QC_CTI_32T_8CH_OFFSET 0x00b94000 234*5113495bSYour Name #define SEQ_WCSS_DBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00b95000 235*5113495bSYour Name #define SEQ_WCSS_DBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00b96000 236*5113495bSYour Name #define SEQ_WCSS_DBG_EVENT_MACEVENT_OFFSET 0x00bb0000 237*5113495bSYour Name #define SEQ_WCSS_DBG_EVENTFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb1000 238*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_MACTLV_OFFSET 0x00bb2000 239*5113495bSYour Name #define SEQ_WCSS_DBG_TLVFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb3000 240*5113495bSYour Name #define SEQ_WCSS_DBG_TBUS_MACTBUS_OFFSET 0x00bb4000 241*5113495bSYour Name #define SEQ_WCSS_DBG_TBUSFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb5000 242*5113495bSYour Name #define SEQ_WCSS_DBG_CTIMAC_QC_CTI_12T_8CH_OFFSET 0x00bb6000 243*5113495bSYour Name #define SEQ_WCSS_DBG_WCSS_DBG_TSTMP_INJCTR_OFFSET 0x00bb8000 244*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_OFFSET 0x00bb9000 245*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00bb9280 246*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00bb9000 247*5113495bSYour Name #define SEQ_WCSS_DBG_TPDA_OFFSET 0x00bba000 248*5113495bSYour Name #define SEQ_WCSS_DBG_CXATBFUNNEL_128W8SP_OFFSET 0x00bbb000 249*5113495bSYour Name #define SEQ_WCSS_DBG_TMC_CXTMC_F128W32K_OFFSET 0x00bbc000 250*5113495bSYour Name #define SEQ_WCSS_DBG_OUTFUN_CXATBFUNNEL_128W2SP_OFFSET 0x00bbe000 251*5113495bSYour Name #define SEQ_WCSS_DBG_PHYFUN_CXATBFUNNEL_128W2SP_OFFSET 0x00bbf000 252*5113495bSYour Name #define SEQ_WCSS_DBG_OUTDMUX_ATB_DEMUX_OFFSET 0x00bc0000 253*5113495bSYour Name #define SEQ_WCSS_DBG_TRCCNTRS_OFFSET 0x00bc1000 254*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_OFFSET 0x00bc2000 255*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00bc2280 256*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00bc2000 257*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_OFFSET 0x00bc3000 258*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00bc3280 259*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00bc3000 260*5113495bSYour Name #define SEQ_WCSS_DBG_QC_TGU_APCLK_CSAE4EA8E3_OFFSET 0x00bc4000 261*5113495bSYour Name #define SEQ_WCSS_DBG_CTITGU_QC_CTI_4T_8CH_OFFSET 0x00bc5000 262*5113495bSYour Name #define SEQ_WCSS_DBG_PHYADMUX_ATB_DEMUX_OFFSET 0x00bc6000 263*5113495bSYour Name #define SEQ_WCSS_DBG_MISCFUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bc8000 264*5113495bSYour Name #define SEQ_WCSS_DBG_UNOC_UMAC_NOC_OFFSET 0x00bd0000 265*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_OFFSET 0x00be0000 266*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_PHYA_NOC_OFFSET 0x00be0000 267*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00be4000 268*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00be5000 269*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00be6000 270*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_ITM_OFFSET 0x00be8000 271*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_DWT_OFFSET 0x00be9000 272*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_FPB_OFFSET 0x00bea000 273*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_SCS_OFFSET 0x00beb000 274*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_M3_ETM_OFFSET 0x00bec000 275*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x00bed000 276*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x00bee000 277*5113495bSYour Name #define SEQ_WCSS_DBG_BUS_TIMEOUT_OFFSET 0x00c31000 278*5113495bSYour Name #define SEQ_WCSS_RET_AHB_OFFSET 0x00c90000 279*5113495bSYour Name #define SEQ_WCSS_WAHB_TSLV_OFFSET 0x00ca0000 280*5113495bSYour Name #define SEQ_WCSS_CC_OFFSET 0x00cb0000 281*5113495bSYour Name #define SEQ_WCSS_UMAC_ACMT_OFFSET 0x00cc0000 282*5113495bSYour Name 283*5113495bSYour Name 284*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 285*5113495bSYour Name // Instance Relative Offsets from Block wfax_top 286*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 287*5113495bSYour Name 288*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00000000 289*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_REG_MAP_OFFSET 0x00080000 290*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00080400 291*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00080800 292*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00080c00 293*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00081000 294*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00081400 295*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00081800 296*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00081c00 297*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_XDMAC5_REG_MAP_OFFSET 0x00082c00 298*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_XDMAC6_REG_MAP_OFFSET 0x00083000 299*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_NOC_REG_MAP_OFFSET 0x00088000 300*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXFD_REG_MAP_OFFSET 0x00090000 301*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_RXTD_REG_MAP_OFFSET 0x000a0000 302*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXTD_REG_MAP_OFFSET 0x000b0000 303*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXBF_REG_MAP_OFFSET 0x000c0000 304*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_DEMFRONT_0_REG_MAP_OFFSET 0x00100000 305*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PHYRF_REG_MAP_OFFSET 0x00180000 306*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_ROBE_REG_MAP_OFFSET 0x001b0000 307*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_DEMFRONT_1_REG_MAP_OFFSET 0x00200000 308*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_OFFSET 0x002c0000 309*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_OFFSET 0x002c0000 310*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_SYSCTRL_OFFSET 0x002cf000 311*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_TLMM_OFFSET 0x002cf400 312*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_AO_OVERRIDE_REG_OFFSET 0x002cf800 313*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_AON_1P8_REG_OFFSET 0x002cfc00 314*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TLMM_OFFSET 0x002c0000 315*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_TRC_OFFSET 0x002c0200 316*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_HZ_COEX_LTE_REG_OFFSET 0x002c5000 317*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_PMU_OFFSET 0x002d1000 318*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_OFFSET 0x002c7000 319*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x002c9b00 320*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x002c7000 321*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x002cb000 322*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x002d4000 323*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_CAL_OFFSET 0x002d42f0 324*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x002d4000 325*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x002d4240 326*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x002d42c0 327*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x002d4300 328*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x002d4400 329*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x002d4480 330*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x002d4800 331*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_BTFMPLL_OFFSET 0x002d4c00 332*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_BBPLL_OFFSET 0x002d5000 333*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x002d5400 334*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x002d6000 335*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x002d6040 336*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x002d6100 337*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x002d6140 338*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x002d6180 339*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x002d61c0 340*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x002d6280 341*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x002d6800 342*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x002d6840 343*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x002d6900 344*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x002d6940 345*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x002d6980 346*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x002d69c0 347*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x002d6a80 348*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x002d7000 349*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x002d7040 350*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x002d7100 351*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x002d7140 352*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x002d7180 353*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x002d71c0 354*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x002d7280 355*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_PMU_TEST_OFFSET 0x002da000 356*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET 0x002dc000 357*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_MTOP_OFFSET 0x002dc000 358*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TXBB_OFFSET 0x002dc800 359*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TXFE_CH0_OFFSET 0x002dcc00 360*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TXFE_CH1_OFFSET 0x002dd000 361*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x002de800 362*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_OFFSET 0x002de980 363*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x002de9c0 364*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_DAC_MISC_OFFSET 0x002deac0 365*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RXBB_CH0_OFFSET 0x002dec00 366*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RXBB_CH1_OFFSET 0x002dee00 367*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RXFE_CH0_OFFSET 0x002df000 368*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_RXFE_CH1_OFFSET 0x002df200 369*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x002dfc00 370*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x002dfc40 371*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x002dfc80 372*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x002dfcc0 373*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x002e0000 374*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH0_OFFSET 0x002e0000 375*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x002e1000 376*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x002e1300 377*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x002e2000 378*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x002e4000 379*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH0_OFFSET 0x002e8000 380*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x002e8400 381*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH0_OFFSET 0x002e8800 382*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x002e9000 383*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x002e9300 384*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x002ea000 385*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_CH0_OFFSET 0x002ea400 386*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CH0_OFFSET 0x002ea580 387*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_CH0_OFFSET 0x002ea5c0 388*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_CH0_OFFSET 0x002ea6c0 389*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_CH0_OFFSET 0x002ea734 390*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_CH0_OFFSET 0x002ea740 391*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_CH0_OFFSET 0x002ea800 392*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_CH0_OFFSET 0x002ea840 393*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_CH0_OFFSET 0x002ea880 394*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_CH0_OFFSET 0x002ea8c0 395*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_CH0_OFFSET 0x002ea900 396*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_CH0_OFFSET 0x002ea99c 397*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x002ec000 398*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_2G_CH1_OFFSET 0x002f0000 399*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x002f1000 400*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x002f1300 401*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x002f2000 402*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x002f4000 403*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_5G_CH1_OFFSET 0x002f8000 404*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH1_OFFSET 0x002f8400 405*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH1_OFFSET 0x002f8800 406*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x002f9000 407*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x002f9300 408*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x002fa000 409*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_RBIST_TX_CH1_OFFSET 0x002fa400 410*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_CH1_OFFSET 0x002fa580 411*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_DIG_CORRECTION_CH1_OFFSET 0x002fa5c0 412*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_MISC_CH1_OFFSET 0x002fa6c0 413*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_DAC_BBCLKGEN_CH1_OFFSET 0x002fa734 414*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_CH1_OFFSET 0x002fa740 415*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_EVEN_CH1_OFFSET 0x002fa800 416*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_I_ODD_CH1_OFFSET 0x002fa840 417*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_CH1_OFFSET 0x002fa880 418*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_Q_ODD_CH1_OFFSET 0x002fa8c0 419*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_POSTPROC_RO_CH1_OFFSET 0x002fa900 420*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_ADC_BBCLKGEN_CH1_OFFSET 0x002fa99c 421*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x002fc000 422*5113495bSYour Name 423*5113495bSYour Name 424*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 425*5113495bSYour Name // Instance Relative Offsets from Block rfa_from_wsi 426*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 427*5113495bSYour Name 428*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_OFFSET 0x00000000 429*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_AO_SYSCTRL_OFFSET 0x0000f000 430*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_AO_TLMM_OFFSET 0x0000f400 431*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_AO_OVERRIDE_REG_OFFSET 0x0000f800 432*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_AON_1P8_REG_OFFSET 0x0000fc00 433*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_HZ_TLMM_OFFSET 0x00000000 434*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_HZ_TRC_OFFSET 0x00000200 435*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_HZ_COEX_LTE_REG_OFFSET 0x00005000 436*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_PMU_OFFSET 0x00011000 437*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_BT_SECURITY_CONTROL_OFFSET 0x00007000 438*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x00009b00 439*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x00007000 440*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x0000b000 441*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_OFFSET 0x00014000 442*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_COEX_CAL_OFFSET 0x000142f0 443*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_OFFSET 0x00014000 444*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_XFEM_OFFSET 0x00014240 445*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_COEX_OFFSET 0x000142c0 446*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFFE_M_OFFSET 0x00014300 447*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFA_SHD_OTP_OFFSET 0x00014400 448*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFA_OTP_OFFSET 0x00014480 449*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_CLKGEN_OFFSET 0x00014800 450*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_BTFMPLL_OFFSET 0x00014c00 451*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_BBPLL_OFFSET 0x00015000 452*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x00015400 453*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00016000 454*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00016040 455*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00016100 456*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00016140 457*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00016180 458*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x000161c0 459*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00016280 460*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x00016800 461*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x00016840 462*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x00016900 463*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x00016940 464*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00016980 465*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x000169c0 466*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x00016a80 467*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x00017000 468*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x00017040 469*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x00017100 470*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x00017140 471*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x00017180 472*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x000171c0 473*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x00017280 474*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_PMU_TEST_OFFSET 0x0001a000 475*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_OFFSET 0x0001c000 476*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_MTOP_OFFSET 0x0001c000 477*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_TXBB_OFFSET 0x0001c800 478*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_TXFE_CH0_OFFSET 0x0001cc00 479*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_TXFE_CH1_OFFSET 0x0001d000 480*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x0001e800 481*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_DAC_OFFSET 0x0001e980 482*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x0001e9c0 483*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_DAC_MISC_OFFSET 0x0001eac0 484*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_RXBB_CH0_OFFSET 0x0001ec00 485*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_RXBB_CH1_OFFSET 0x0001ee00 486*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_RXFE_CH0_OFFSET 0x0001f000 487*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_RXFE_CH1_OFFSET 0x0001f200 488*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_BS_OFFSET 0x0001fc00 489*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_BIST_OFFSET 0x0001fc40 490*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_PC_OFFSET 0x0001fc80 491*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_AC_OFFSET 0x0001fcc0 492*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_OFFSET 0x00020000 493*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_2G_CH0_OFFSET 0x00020000 494*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x00021000 495*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x00021300 496*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x00022000 497*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x00024000 498*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_5G_CH0_OFFSET 0x00028000 499*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_CH0_OFFSET 0x00028400 500*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_CH0_OFFSET 0x00028800 501*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x00029000 502*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x00029300 503*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x0002a000 504*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_CH0_OFFSET 0x0002a400 505*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_CH0_OFFSET 0x0002a580 506*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_DIG_CORRECTION_CH0_OFFSET 0x0002a5c0 507*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_MISC_CH0_OFFSET 0x0002a6c0 508*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BBCLKGEN_CH0_OFFSET 0x0002a734 509*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_CH0_OFFSET 0x0002a740 510*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_EVEN_CH0_OFFSET 0x0002a800 511*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_ODD_CH0_OFFSET 0x0002a840 512*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_CH0_OFFSET 0x0002a880 513*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_ODD_CH0_OFFSET 0x0002a8c0 514*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_RO_CH0_OFFSET 0x0002a900 515*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BBCLKGEN_CH0_OFFSET 0x0002a99c 516*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x0002c000 517*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_2G_CH1_OFFSET 0x00030000 518*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x00031000 519*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x00031300 520*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x00032000 521*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x00034000 522*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_5G_CH1_OFFSET 0x00038000 523*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_CH1_OFFSET 0x00038400 524*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_CH1_OFFSET 0x00038800 525*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x00039000 526*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x00039300 527*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x0003a000 528*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_RBIST_TX_CH1_OFFSET 0x0003a400 529*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_CH1_OFFSET 0x0003a580 530*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_DIG_CORRECTION_CH1_OFFSET 0x0003a5c0 531*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_MISC_CH1_OFFSET 0x0003a6c0 532*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_DAC_BBCLKGEN_CH1_OFFSET 0x0003a734 533*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_CH1_OFFSET 0x0003a740 534*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_EVEN_CH1_OFFSET 0x0003a800 535*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_I_ODD_CH1_OFFSET 0x0003a840 536*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_CH1_OFFSET 0x0003a880 537*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_Q_ODD_CH1_OFFSET 0x0003a8c0 538*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_POSTPROC_RO_CH1_OFFSET 0x0003a900 539*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_ADC_BBCLKGEN_CH1_OFFSET 0x0003a99c 540*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x0003c000 541*5113495bSYour Name 542*5113495bSYour Name 543*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 544*5113495bSYour Name // Instance Relative Offsets from Block rfa_soc 545*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 546*5113495bSYour Name 547*5113495bSYour Name #define SEQ_RFA_SOC_AO_SYSCTRL_OFFSET 0x0000f000 548*5113495bSYour Name #define SEQ_RFA_SOC_AO_TLMM_OFFSET 0x0000f400 549*5113495bSYour Name #define SEQ_RFA_SOC_AO_OVERRIDE_REG_OFFSET 0x0000f800 550*5113495bSYour Name #define SEQ_RFA_SOC_AON_1P8_REG_OFFSET 0x0000fc00 551*5113495bSYour Name #define SEQ_RFA_SOC_HZ_TLMM_OFFSET 0x00000000 552*5113495bSYour Name #define SEQ_RFA_SOC_HZ_TRC_OFFSET 0x00000200 553*5113495bSYour Name #define SEQ_RFA_SOC_HZ_COEX_LTE_REG_OFFSET 0x00005000 554*5113495bSYour Name #define SEQ_RFA_SOC_PMU_OFFSET 0x00011000 555*5113495bSYour Name #define SEQ_RFA_SOC_BT_SECURITY_CONTROL_OFFSET 0x00007000 556*5113495bSYour Name #define SEQ_RFA_SOC_BT_SECURITY_CONTROL_BT_SECURITY_CONTROL_CORE_OFFSET 0x00009b00 557*5113495bSYour Name #define SEQ_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x00007000 558*5113495bSYour Name #define SEQ_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x0000b000 559*5113495bSYour Name 560*5113495bSYour Name 561*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 562*5113495bSYour Name // Instance Relative Offsets from Block security_control_bt 563*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 564*5113495bSYour Name 565*5113495bSYour Name #define SEQ_SECURITY_CONTROL_BT_BT_SECURITY_CONTROL_CORE_OFFSET 0x00002b00 566*5113495bSYour Name #define SEQ_SECURITY_CONTROL_BT_BT_QFPROM_RAW_FUSE_OFFSET 0x00000000 567*5113495bSYour Name #define SEQ_SECURITY_CONTROL_BT_BT_QFPROM_CORR_FUSE_OFFSET 0x00004000 568*5113495bSYour Name 569*5113495bSYour Name 570*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 571*5113495bSYour Name // Instance Relative Offsets from Block rfa_cmn 572*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 573*5113495bSYour Name 574*5113495bSYour Name #define SEQ_RFA_CMN_AON_COEX_CAL_OFFSET 0x000002f0 575*5113495bSYour Name #define SEQ_RFA_CMN_AON_OFFSET 0x00000000 576*5113495bSYour Name #define SEQ_RFA_CMN_AON_XFEM_OFFSET 0x00000240 577*5113495bSYour Name #define SEQ_RFA_CMN_AON_COEX_OFFSET 0x000002c0 578*5113495bSYour Name #define SEQ_RFA_CMN_RFFE_M_OFFSET 0x00000300 579*5113495bSYour Name #define SEQ_RFA_CMN_RFA_SHD_OTP_OFFSET 0x00000400 580*5113495bSYour Name #define SEQ_RFA_CMN_RFA_OTP_OFFSET 0x00000480 581*5113495bSYour Name #define SEQ_RFA_CMN_CLKGEN_OFFSET 0x00000800 582*5113495bSYour Name #define SEQ_RFA_CMN_BTFMPLL_OFFSET 0x00000c00 583*5113495bSYour Name #define SEQ_RFA_CMN_BBPLL_OFFSET 0x00001000 584*5113495bSYour Name #define SEQ_RFA_CMN_WL_TOP_CLKGEN_OFFSET 0x00001400 585*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00002000 586*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00002040 587*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00002100 588*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00002140 589*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00002180 590*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x000021c0 591*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00002280 592*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_BS_OFFSET 0x00002800 593*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_CLBS_OFFSET 0x00002840 594*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_BIST_OFFSET 0x00002900 595*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_PC_OFFSET 0x00002940 596*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00002980 597*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x000029c0 598*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x00002a80 599*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_BS_OFFSET 0x00003000 600*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_CLBS_OFFSET 0x00003040 601*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_BIST_OFFSET 0x00003100 602*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_PC_OFFSET 0x00003140 603*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x00003180 604*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x000031c0 605*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x00003280 606*5113495bSYour Name #define SEQ_RFA_CMN_PMU_TEST_OFFSET 0x00006000 607*5113495bSYour Name 608*5113495bSYour Name 609*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 610*5113495bSYour Name // Instance Relative Offsets from Block rfa_bt 611*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 612*5113495bSYour Name 613*5113495bSYour Name #define SEQ_RFA_BT_BT_MTOP_OFFSET 0x00000000 614*5113495bSYour Name #define SEQ_RFA_BT_BT_TXBB_OFFSET 0x00000800 615*5113495bSYour Name #define SEQ_RFA_BT_BT_TXFE_CH0_OFFSET 0x00000c00 616*5113495bSYour Name #define SEQ_RFA_BT_BT_TXFE_CH1_OFFSET 0x00001000 617*5113495bSYour Name #define SEQ_RFA_BT_BT_RBIST_TX_BAREBONE_OFFSET 0x00002800 618*5113495bSYour Name #define SEQ_RFA_BT_BT_DAC_OFFSET 0x00002980 619*5113495bSYour Name #define SEQ_RFA_BT_BT_DAC_DIG_CORRECTION_OFFSET 0x000029c0 620*5113495bSYour Name #define SEQ_RFA_BT_BT_DAC_MISC_OFFSET 0x00002ac0 621*5113495bSYour Name #define SEQ_RFA_BT_BT_RXBB_CH0_OFFSET 0x00002c00 622*5113495bSYour Name #define SEQ_RFA_BT_BT_RXBB_CH1_OFFSET 0x00002e00 623*5113495bSYour Name #define SEQ_RFA_BT_BT_RXFE_CH0_OFFSET 0x00003000 624*5113495bSYour Name #define SEQ_RFA_BT_BT_RXFE_CH1_OFFSET 0x00003200 625*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_BS_OFFSET 0x00003c00 626*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_BIST_OFFSET 0x00003c40 627*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_PC_OFFSET 0x00003c80 628*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_AC_OFFSET 0x00003cc0 629*5113495bSYour Name 630*5113495bSYour Name 631*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 632*5113495bSYour Name // Instance Relative Offsets from Block rfa_wl 633*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 634*5113495bSYour Name 635*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_2G_CH0_OFFSET 0x00000000 636*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_2G_CH0_OFFSET 0x00001000 637*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_2G_CH0_OFFSET 0x00001300 638*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_2G_CH0_OFFSET 0x00002000 639*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_2G_CH0_OFFSET 0x00004000 640*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_5G_CH0_OFFSET 0x00008000 641*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_CH0_OFFSET 0x00008400 642*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_CH0_OFFSET 0x00008800 643*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_5G_CH0_OFFSET 0x00009000 644*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_5G_CH0_OFFSET 0x00009300 645*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_5G_CH0_OFFSET 0x0000a000 646*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_CH0_OFFSET 0x0000a400 647*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_CH0_OFFSET 0x0000a580 648*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_DIG_CORRECTION_CH0_OFFSET 0x0000a5c0 649*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_MISC_CH0_OFFSET 0x0000a6c0 650*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BBCLKGEN_CH0_OFFSET 0x0000a734 651*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_CH0_OFFSET 0x0000a740 652*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_EVEN_CH0_OFFSET 0x0000a800 653*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_ODD_CH0_OFFSET 0x0000a840 654*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_CH0_OFFSET 0x0000a880 655*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_ODD_CH0_OFFSET 0x0000a8c0 656*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_RO_CH0_OFFSET 0x0000a900 657*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BBCLKGEN_CH0_OFFSET 0x0000a99c 658*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_5G_CH0_OFFSET 0x0000c000 659*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_2G_CH1_OFFSET 0x00010000 660*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_2G_CH1_OFFSET 0x00011000 661*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_2G_CH1_OFFSET 0x00011300 662*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_2G_CH1_OFFSET 0x00012000 663*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_2G_CH1_OFFSET 0x00014000 664*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_5G_CH1_OFFSET 0x00018000 665*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_CH1_OFFSET 0x00018400 666*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_CH1_OFFSET 0x00018800 667*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_5G_CH1_OFFSET 0x00019000 668*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_5G_CH1_OFFSET 0x00019300 669*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_5G_CH1_OFFSET 0x0001a000 670*5113495bSYour Name #define SEQ_RFA_WL_RBIST_TX_CH1_OFFSET 0x0001a400 671*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_CH1_OFFSET 0x0001a580 672*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_DIG_CORRECTION_CH1_OFFSET 0x0001a5c0 673*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_MISC_CH1_OFFSET 0x0001a6c0 674*5113495bSYour Name #define SEQ_RFA_WL_WL_DAC_BBCLKGEN_CH1_OFFSET 0x0001a734 675*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_CH1_OFFSET 0x0001a740 676*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_EVEN_CH1_OFFSET 0x0001a800 677*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_I_ODD_CH1_OFFSET 0x0001a840 678*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_EVEN_CH1_OFFSET 0x0001a880 679*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_Q_ODD_CH1_OFFSET 0x0001a8c0 680*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_POSTPROC_RO_CH1_OFFSET 0x0001a900 681*5113495bSYour Name #define SEQ_RFA_WL_WL_ADC_BBCLKGEN_CH1_OFFSET 0x0001a99c 682*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_5G_CH1_OFFSET 0x0001c000 683*5113495bSYour Name 684*5113495bSYour Name 685*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 686*5113495bSYour Name // Instance Relative Offsets from Block umac_top_reg 687*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 688*5113495bSYour Name 689*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_OFFSET 0x00020000 690*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00020000 691*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00022000 692*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00024000 693*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00026000 694*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00028000 695*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0002a000 696*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TRACER_REG_OFFSET 0x00030000 697*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WBM_REG_OFFSET 0x00034000 698*5113495bSYour Name #define SEQ_UMAC_TOP_REG_REO_REG_OFFSET 0x00038000 699*5113495bSYour Name #define SEQ_UMAC_TOP_REG_TQM_REG_OFFSET 0x0003c000 700*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_UMCMN_REG_OFFSET 0x00040000 701*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TCL_REG_OFFSET 0x00044000 702*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_CMN_PARSER_CE_REG_OFFSET 0x00047000 703*5113495bSYour Name 704*5113495bSYour Name 705*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 706*5113495bSYour Name // Instance Relative Offsets from Block cxc_top_reg 707*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 708*5113495bSYour Name 709*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00000000 710*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00002000 711*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00004000 712*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00006000 713*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00008000 714*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0000a000 715*5113495bSYour Name 716*5113495bSYour Name 717*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 718*5113495bSYour Name // Instance Relative Offsets from Block wmac_top_reg 719*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 720*5113495bSYour Name 721*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_PDG_REG_OFFSET 0x00000000 722*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXDMA_REG_OFFSET 0x00003000 723*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXDMA_REG_OFFSET 0x00006000 724*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MCMN_REG_OFFSET 0x00009000 725*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXPCU_REG_OFFSET 0x0000c000 726*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXPCU_REG_OFFSET 0x0000f000 727*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_AMPI_REG_OFFSET 0x00012000 728*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_REG_OFFSET 0x00015000 729*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_PARSER_REG_OFFSET 0x00018000 730*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CCE_REG_OFFSET 0x0001b000 731*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_REG_OFFSET 0x0001e000 732*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_PARSER_REG_OFFSET 0x00021000 733*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RRI_REG_OFFSET 0x00024000 734*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CRYPTO_REG_OFFSET 0x00027000 735*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_HWSCH_REG_OFFSET 0x0002a000 736*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MXI_REG_OFFSET 0x00030000 737*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_SFM_REG_OFFSET 0x00033000 738*5113495bSYour Name 739*5113495bSYour Name 740*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 741*5113495bSYour Name // Instance Relative Offsets from Block wcssdbg 742*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 743*5113495bSYour Name 744*5113495bSYour Name #define SEQ_WCSSDBG_WCSS_DBG_DAPROM_OFFSET 0x00000000 745*5113495bSYour Name #define SEQ_WCSSDBG_CSR_WCSS_DBG_CSR_OFFSET 0x00001000 746*5113495bSYour Name #define SEQ_WCSSDBG_TSGEN_CXTSGEN_OFFSET 0x00002000 747*5113495bSYour Name #define SEQ_WCSSDBG_CTIDBG_QC_CTI_32T_8CH_OFFSET 0x00004000 748*5113495bSYour Name #define SEQ_WCSSDBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00005000 749*5113495bSYour Name #define SEQ_WCSSDBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00006000 750*5113495bSYour Name #define SEQ_WCSSDBG_EVENT_MACEVENT_OFFSET 0x00020000 751*5113495bSYour Name #define SEQ_WCSSDBG_EVENTFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00021000 752*5113495bSYour Name #define SEQ_WCSSDBG_TLV_MACTLV_OFFSET 0x00022000 753*5113495bSYour Name #define SEQ_WCSSDBG_TLVFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00023000 754*5113495bSYour Name #define SEQ_WCSSDBG_TBUS_MACTBUS_OFFSET 0x00024000 755*5113495bSYour Name #define SEQ_WCSSDBG_TBUSFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00025000 756*5113495bSYour Name #define SEQ_WCSSDBG_CTIMAC_QC_CTI_12T_8CH_OFFSET 0x00026000 757*5113495bSYour Name #define SEQ_WCSSDBG_WCSS_DBG_TSTMP_INJCTR_OFFSET 0x00028000 758*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_OFFSET 0x00029000 759*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00029280 760*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00029000 761*5113495bSYour Name #define SEQ_WCSSDBG_TPDA_OFFSET 0x0002a000 762*5113495bSYour Name #define SEQ_WCSSDBG_CXATBFUNNEL_128W8SP_OFFSET 0x0002b000 763*5113495bSYour Name #define SEQ_WCSSDBG_TMC_CXTMC_F128W32K_OFFSET 0x0002c000 764*5113495bSYour Name #define SEQ_WCSSDBG_OUTFUN_CXATBFUNNEL_128W2SP_OFFSET 0x0002e000 765*5113495bSYour Name #define SEQ_WCSSDBG_PHYFUN_CXATBFUNNEL_128W2SP_OFFSET 0x0002f000 766*5113495bSYour Name #define SEQ_WCSSDBG_OUTDMUX_ATB_DEMUX_OFFSET 0x00030000 767*5113495bSYour Name #define SEQ_WCSSDBG_TRCCNTRS_OFFSET 0x00031000 768*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_OFFSET 0x00032000 769*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00032280 770*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00032000 771*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_OFFSET 0x00033000 772*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00033280 773*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00033000 774*5113495bSYour Name #define SEQ_WCSSDBG_QC_TGU_APCLK_CSAE4EA8E3_OFFSET 0x00034000 775*5113495bSYour Name #define SEQ_WCSSDBG_CTITGU_QC_CTI_4T_8CH_OFFSET 0x00035000 776*5113495bSYour Name #define SEQ_WCSSDBG_PHYADMUX_ATB_DEMUX_OFFSET 0x00036000 777*5113495bSYour Name #define SEQ_WCSSDBG_MISCFUN_CXATBFUNNEL_64W8SP_OFFSET 0x00038000 778*5113495bSYour Name #define SEQ_WCSSDBG_UNOC_UMAC_NOC_OFFSET 0x00040000 779*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_OFFSET 0x00050000 780*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_PHYA_NOC_OFFSET 0x00050000 781*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00054000 782*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00055000 783*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00056000 784*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_ITM_OFFSET 0x00058000 785*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_DWT_OFFSET 0x00059000 786*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_FPB_OFFSET 0x0005a000 787*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_SCS_OFFSET 0x0005b000 788*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_M3_ETM_OFFSET 0x0005c000 789*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0005d000 790*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x0005e000 791*5113495bSYour Name #define SEQ_WCSSDBG_BUS_TIMEOUT_OFFSET 0x000a1000 792*5113495bSYour Name 793*5113495bSYour Name 794*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 795*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb64_cmb40_dsb256_csbe6c04f7 796*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 797*5113495bSYour Name 798*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00000280 799*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00000000 800*5113495bSYour Name 801*5113495bSYour Name 802*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 803*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb128_cmb64 804*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 805*5113495bSYour Name 806*5113495bSYour Name #define SEQ_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00000280 807*5113495bSYour Name #define SEQ_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00000000 808*5113495bSYour Name 809*5113495bSYour Name 810*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 811*5113495bSYour Name // Instance Relative Offsets from Block phya_dbg 812*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 813*5113495bSYour Name 814*5113495bSYour Name #define SEQ_PHYA_DBG_PHYA_NOC_OFFSET 0x00000000 815*5113495bSYour Name #define SEQ_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00004000 816*5113495bSYour Name #define SEQ_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00005000 817*5113495bSYour Name #define SEQ_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00006000 818*5113495bSYour Name #define SEQ_PHYA_DBG_ITM_OFFSET 0x00008000 819*5113495bSYour Name #define SEQ_PHYA_DBG_DWT_OFFSET 0x00009000 820*5113495bSYour Name #define SEQ_PHYA_DBG_FPB_OFFSET 0x0000a000 821*5113495bSYour Name #define SEQ_PHYA_DBG_SCS_OFFSET 0x0000b000 822*5113495bSYour Name #define SEQ_PHYA_DBG_M3_ETM_OFFSET 0x0000c000 823*5113495bSYour Name #define SEQ_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0000d000 824*5113495bSYour Name #define SEQ_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x0000e000 825*5113495bSYour Name 826*5113495bSYour Name 827*5113495bSYour Name #endif 828*5113495bSYour Name 829