xref: /wlan-driver/fw-api/hw/qca8074/v1/he_sig_a_mu_ul_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2018 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 // $ATH_LICENSE_HW_HDR_C$
20 //
21 // DO NOT EDIT!  This file is automatically generated
22 //               These definitions are tied to a particular hardware layout
23 
24 
25 #ifndef _HE_SIG_A_MU_UL_INFO_H_
26 #define _HE_SIG_A_MU_UL_INFO_H_
27 #if !defined(__ASSEMBLER__)
28 #endif
29 
30 
31 // ################ START SUMMARY #################
32 //
33 //	Dword	Fields
34 //	0	format_indication[0], bss_color_id[6:1], spatial_reuse[22:7], reserved_0a[23], transmit_bw[25:24], reserved_0b[31:26]
35 //	1	txop_duration[6:0], reserved_1a[15:7], crc[19:16], tail[25:20], reserved_1b[31:26]
36 //
37 // ################ END SUMMARY #################
38 
39 #define NUM_OF_DWORDS_HE_SIG_A_MU_UL_INFO 2
40 
41 struct he_sig_a_mu_ul_info {
42              uint32_t format_indication               :  1, //[0]
43                       bss_color_id                    :  6, //[6:1]
44                       spatial_reuse                   : 16, //[22:7]
45                       reserved_0a                     :  1, //[23]
46                       transmit_bw                     :  2, //[25:24]
47                       reserved_0b                     :  6; //[31:26]
48              uint32_t txop_duration                   :  7, //[6:0]
49                       reserved_1a                     :  9, //[15:7]
50                       crc                             :  4, //[19:16]
51                       tail                            :  6, //[25:20]
52                       reserved_1b                     :  6; //[31:26]
53 };
54 
55 /*
56 
57 format_indication
58 
59 			Indicates whether the transmission is SU PPDU or a
60 			trigger based UL MU PDDU
61 
62 			<enum 0 HE_SIGA_FORMAT_HE_TRIG>
63 
64 			<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
65 
66 			<legal all>
67 
68 bss_color_id
69 
70 			BSS color ID
71 
72 			<legal all>
73 
74 spatial_reuse
75 
76 			Spatial reuse
77 
78 
79 
80 			<legal all>
81 
82 reserved_0a
83 
84 			Note: spec indicates this shall be set to 1
85 
86 			<legal 1>
87 
88 transmit_bw
89 
90 			Bandwidth of the PPDU.
91 
92 
93 
94 			<enum 0 HE_SIG_A_MU_UL_BW20> 20 Mhz
95 
96 			<enum 1 HE_SIG_A_MU_UL_BW40> 40 Mhz
97 
98 			<enum 2 HE_SIG_A_MU_UL_BW80> 80 Mhz
99 
100 			<enum 3 HE_SIG_A_MU_UL_BW160> 160 MHz or 80+80 MHz
101 
102 
103 
104 			On RX side, Field Used by MAC HW
105 
106 			<legal 0-3>
107 
108 reserved_0b
109 
110 			<legal 0>
111 
112 txop_duration
113 
114 			Indicates the remaining time in the current TXOP <legal
115 			all>
116 
117 reserved_1a
118 
119 			Note: spec indicates every bit shall be set to 1
120 
121 			<legal 255>
122 
123 crc
124 
125 			CRC for HE-SIG-A contents.
126 
127 			This CRC may also cover some fields of L-SIG (TBD)
128 
129 			<legal all>
130 
131 tail
132 
133 			BCC encoding (similar to VHT-SIG-A) with 6 tail bits is
134 			used
135 
136 			<legal 0>
137 
138 reserved_1b
139 
140 			<legal 0>
141 */
142 
143 
144 /* Description		HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION
145 
146 			Indicates whether the transmission is SU PPDU or a
147 			trigger based UL MU PDDU
148 
149 			<enum 0 HE_SIGA_FORMAT_HE_TRIG>
150 
151 			<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
152 
153 			<legal all>
154 */
155 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_OFFSET               0x00000000
156 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_LSB                  0
157 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_MASK                 0x00000001
158 
159 /* Description		HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID
160 
161 			BSS color ID
162 
163 			<legal all>
164 */
165 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_OFFSET                    0x00000000
166 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_LSB                       1
167 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_MASK                      0x0000007e
168 
169 /* Description		HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE
170 
171 			Spatial reuse
172 
173 
174 
175 			<legal all>
176 */
177 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_OFFSET                   0x00000000
178 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_LSB                      7
179 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_MASK                     0x007fff80
180 
181 /* Description		HE_SIG_A_MU_UL_INFO_0_RESERVED_0A
182 
183 			Note: spec indicates this shall be set to 1
184 
185 			<legal 1>
186 */
187 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_OFFSET                     0x00000000
188 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_LSB                        23
189 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_MASK                       0x00800000
190 
191 /* Description		HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW
192 
193 			Bandwidth of the PPDU.
194 
195 
196 
197 			<enum 0 HE_SIG_A_MU_UL_BW20> 20 Mhz
198 
199 			<enum 1 HE_SIG_A_MU_UL_BW40> 40 Mhz
200 
201 			<enum 2 HE_SIG_A_MU_UL_BW80> 80 Mhz
202 
203 			<enum 3 HE_SIG_A_MU_UL_BW160> 160 MHz or 80+80 MHz
204 
205 
206 
207 			On RX side, Field Used by MAC HW
208 
209 			<legal 0-3>
210 */
211 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_OFFSET                     0x00000000
212 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_LSB                        24
213 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_MASK                       0x03000000
214 
215 /* Description		HE_SIG_A_MU_UL_INFO_0_RESERVED_0B
216 
217 			<legal 0>
218 */
219 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_OFFSET                     0x00000000
220 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_LSB                        26
221 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_MASK                       0xfc000000
222 
223 /* Description		HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION
224 
225 			Indicates the remaining time in the current TXOP <legal
226 			all>
227 */
228 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_OFFSET                   0x00000004
229 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_LSB                      0
230 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_MASK                     0x0000007f
231 
232 /* Description		HE_SIG_A_MU_UL_INFO_1_RESERVED_1A
233 
234 			Note: spec indicates every bit shall be set to 1
235 
236 			<legal 255>
237 */
238 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_OFFSET                     0x00000004
239 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_LSB                        7
240 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_MASK                       0x0000ff80
241 
242 /* Description		HE_SIG_A_MU_UL_INFO_1_CRC
243 
244 			CRC for HE-SIG-A contents.
245 
246 			This CRC may also cover some fields of L-SIG (TBD)
247 
248 			<legal all>
249 */
250 #define HE_SIG_A_MU_UL_INFO_1_CRC_OFFSET                             0x00000004
251 #define HE_SIG_A_MU_UL_INFO_1_CRC_LSB                                16
252 #define HE_SIG_A_MU_UL_INFO_1_CRC_MASK                               0x000f0000
253 
254 /* Description		HE_SIG_A_MU_UL_INFO_1_TAIL
255 
256 			BCC encoding (similar to VHT-SIG-A) with 6 tail bits is
257 			used
258 
259 			<legal 0>
260 */
261 #define HE_SIG_A_MU_UL_INFO_1_TAIL_OFFSET                            0x00000004
262 #define HE_SIG_A_MU_UL_INFO_1_TAIL_LSB                               20
263 #define HE_SIG_A_MU_UL_INFO_1_TAIL_MASK                              0x03f00000
264 
265 /* Description		HE_SIG_A_MU_UL_INFO_1_RESERVED_1B
266 
267 			<legal 0>
268 */
269 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_OFFSET                     0x00000004
270 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_LSB                        26
271 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_MASK                       0xfc000000
272 
273 
274 #endif // _HE_SIG_A_MU_UL_INFO_H_
275