xref: /wlan-driver/fw-api/hw/qca8074/v1/phyrx_rssi_legacy.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2018 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 // $ATH_LICENSE_HW_HDR_C$
20 //
21 // DO NOT EDIT!  This file is automatically generated
22 //               These definitions are tied to a particular hardware layout
23 
24 
25 #ifndef _PHYRX_RSSI_LEGACY_H_
26 #define _PHYRX_RSSI_LEGACY_H_
27 #if !defined(__ASSEMBLER__)
28 #endif
29 
30 #include "receive_rssi_info.h"
31 
32 // ################ START SUMMARY #################
33 //
34 //	Dword	Fields
35 //	0	reception_type[3:0], reserved_0[7:4], rx_chain_mask[15:8], phy_ppdu_id[31:16]
36 //	1	sw_phy_meta_data[31:0]
37 //	2	ppdu_start_timestamp[31:0]
38 //	3-18	struct receive_rssi_info pre_rssi_info_details;
39 //	19-34	struct receive_rssi_info preamble_rssi_info_details;
40 //	35	pre_rssi_comb[7:0], rssi_comb[15:8], receive_bandwidth[17:16], reserved[31:18]
41 //
42 // ################ END SUMMARY #################
43 
44 #define NUM_OF_DWORDS_PHYRX_RSSI_LEGACY 36
45 
46 struct phyrx_rssi_legacy {
47              uint32_t reception_type                  :  4, //[3:0]
48                       reserved_0                      :  4, //[7:4]
49                       rx_chain_mask                   :  8, //[15:8]
50                       phy_ppdu_id                     : 16; //[31:16]
51              uint32_t sw_phy_meta_data                : 32; //[31:0]
52              uint32_t ppdu_start_timestamp            : 32; //[31:0]
53     struct            receive_rssi_info                       pre_rssi_info_details;
54     struct            receive_rssi_info                       preamble_rssi_info_details;
55              uint32_t pre_rssi_comb                   :  8, //[7:0]
56                       rssi_comb                       :  8, //[15:8]
57                       receive_bandwidth               :  2, //[17:16]
58                       reserved                        : 14; //[31:18]
59 };
60 
61 /*
62 
63 reception_type
64 
65 			This field helps MAC SW determine which field in this
66 			(and following TLVs) will contain valid information. For
67 			example some RSSI info not valid in case of uplink_ofdma..
68 
69 			<enum 0 reception_is_uplink_ofdma>
70 
71 			<enum 1 reception_is_uplink_mimo>
72 
73 			<enum 2 reception_is_other>
74 
75 			<enum 3 reception_is_frameless> PHY RX has been
76 			instructed in advance that the upcoming reception is
77 			frameless. This implieas that in advance it is known that
78 			all frames will collide in the medium, and nothing can be
79 			properly decoded... This can happen during the CTS reception
80 			in response to the triggered MU-RTS transmission.
81 
82 			MAC takes no action when seeing this e_num. For the
83 			frameless reception the indication in pkt_end is the final
84 			one evaluated by the MAC
85 
86 			<legal 0-3>
87 
88 reserved_0
89 
90 			<legal 0>
91 
92 rx_chain_mask
93 
94 			The chain mask at the start of the reception of this
95 			frame.
96 
97 
98 
99 			each bit is one antenna
100 
101 			0: the chain is NOT used
102 
103 			1: the chain is used
104 
105 
106 
107 			Supports up to 8 chains
108 
109 
110 
111 			Used in 11ax TPC calculations for UL OFDMA/MIMO and has
112 			to be in sync with the rssi_comb value as this is also used
113 			by the MAC for the TPC calculations.
114 
115 			<legal all>
116 
117 phy_ppdu_id
118 
119 			A ppdu counter value that PHY increments for every PPDU
120 			received. The counter value wraps around
121 
122 			<legal all>
123 
124 sw_phy_meta_data
125 
126 			32 bit Meta data that SW can program in a 32 bit PHY
127 			register and PHY will insert the value in every
128 			RX_RSSI_LEGACY TLV that it generates.
129 
130 			SW uses this field to embed among other things some SW
131 			channel info.
132 
133 ppdu_start_timestamp
134 
135 			Timestamp that indicates when the PPDU that contained
136 			this MPDU started on the medium.
137 
138 
139 
140 			Note that PHY will detect the start later, and will have
141 			to derive out of the preamble info when the frame actually
142 			appeared on the medium
143 
144 			<legal 0- 10>
145 
146 struct receive_rssi_info pre_rssi_info_details
147 
148 			This field is not valid when reception_is_uplink_ofdma
149 
150 
151 
152 			Overview of the pre-RSSI values. That is RSSI values
153 			measured on the medium before this reception started.
154 
155 struct receive_rssi_info preamble_rssi_info_details
156 
157 			This field is not valid when reception_is_uplink_ofdma
158 
159 
160 
161 			Overview of the RSSI values measured during the
162 			pre-amble phase of this reception
163 
164 pre_rssi_comb
165 
166 			Combined pre_rssi of all chains. Based on primary
167 			channel RSSI.
168 
169 			<legal all>
170 
171 rssi_comb
172 
173 			Combined rssi of all chains. Based on primary channel
174 			RSSI.
175 
176 			<legal all>
177 
178 receive_bandwidth
179 
180 			Full receive Bandwidth
181 
182 
183 
184 			<enum 0     full_rx_bw_20_mhz>
185 
186 			<enum 1      full_rx_bw_40_mhz>
187 
188 			<enum 2      full_rx_bw_80_mhz>
189 
190 			<enum 3      full_rx_bw_160_mhz>
191 
192 
193 
194 			<legal 0-3>
195 
196 reserved
197 
198 			<legal 0>
199 */
200 
201 
202 /* Description		PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE
203 
204 			This field helps MAC SW determine which field in this
205 			(and following TLVs) will contain valid information. For
206 			example some RSSI info not valid in case of uplink_ofdma..
207 
208 			<enum 0 reception_is_uplink_ofdma>
209 
210 			<enum 1 reception_is_uplink_mimo>
211 
212 			<enum 2 reception_is_other>
213 
214 			<enum 3 reception_is_frameless> PHY RX has been
215 			instructed in advance that the upcoming reception is
216 			frameless. This implieas that in advance it is known that
217 			all frames will collide in the medium, and nothing can be
218 			properly decoded... This can happen during the CTS reception
219 			in response to the triggered MU-RTS transmission.
220 
221 			MAC takes no action when seeing this e_num. For the
222 			frameless reception the indication in pkt_end is the final
223 			one evaluated by the MAC
224 
225 			<legal 0-3>
226 */
227 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_OFFSET                    0x00000000
228 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_LSB                       0
229 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_MASK                      0x0000000f
230 
231 /* Description		PHYRX_RSSI_LEGACY_0_RESERVED_0
232 
233 			<legal 0>
234 */
235 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_OFFSET                        0x00000000
236 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_LSB                           4
237 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_MASK                          0x000000f0
238 
239 /* Description		PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK
240 
241 			The chain mask at the start of the reception of this
242 			frame.
243 
244 
245 
246 			each bit is one antenna
247 
248 			0: the chain is NOT used
249 
250 			1: the chain is used
251 
252 
253 
254 			Supports up to 8 chains
255 
256 
257 
258 			Used in 11ax TPC calculations for UL OFDMA/MIMO and has
259 			to be in sync with the rssi_comb value as this is also used
260 			by the MAC for the TPC calculations.
261 
262 			<legal all>
263 */
264 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_OFFSET                     0x00000000
265 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_LSB                        8
266 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_MASK                       0x0000ff00
267 
268 /* Description		PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID
269 
270 			A ppdu counter value that PHY increments for every PPDU
271 			received. The counter value wraps around
272 
273 			<legal all>
274 */
275 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_OFFSET                       0x00000000
276 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_LSB                          16
277 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_MASK                         0xffff0000
278 
279 /* Description		PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA
280 
281 			32 bit Meta data that SW can program in a 32 bit PHY
282 			register and PHY will insert the value in every
283 			RX_RSSI_LEGACY TLV that it generates.
284 
285 			SW uses this field to embed among other things some SW
286 			channel info.
287 */
288 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_OFFSET                  0x00000004
289 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_LSB                     0
290 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_MASK                    0xffffffff
291 
292 /* Description		PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP
293 
294 			Timestamp that indicates when the PPDU that contained
295 			this MPDU started on the medium.
296 
297 
298 
299 			Note that PHY will detect the start later, and will have
300 			to derive out of the preamble info when the frame actually
301 			appeared on the medium
302 
303 			<legal 0- 10>
304 */
305 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_OFFSET              0x00000008
306 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_LSB                 0
307 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_MASK                0xffffffff
308 #define PHYRX_RSSI_LEGACY_3_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000000c
309 #define PHYRX_RSSI_LEGACY_3_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
310 #define PHYRX_RSSI_LEGACY_3_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
311 #define PHYRX_RSSI_LEGACY_4_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000010
312 #define PHYRX_RSSI_LEGACY_4_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
313 #define PHYRX_RSSI_LEGACY_4_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
314 #define PHYRX_RSSI_LEGACY_5_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000014
315 #define PHYRX_RSSI_LEGACY_5_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
316 #define PHYRX_RSSI_LEGACY_5_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
317 #define PHYRX_RSSI_LEGACY_6_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000018
318 #define PHYRX_RSSI_LEGACY_6_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
319 #define PHYRX_RSSI_LEGACY_6_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
320 #define PHYRX_RSSI_LEGACY_7_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000001c
321 #define PHYRX_RSSI_LEGACY_7_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
322 #define PHYRX_RSSI_LEGACY_7_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
323 #define PHYRX_RSSI_LEGACY_8_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000020
324 #define PHYRX_RSSI_LEGACY_8_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
325 #define PHYRX_RSSI_LEGACY_8_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
326 #define PHYRX_RSSI_LEGACY_9_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000024
327 #define PHYRX_RSSI_LEGACY_9_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
328 #define PHYRX_RSSI_LEGACY_9_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
329 #define PHYRX_RSSI_LEGACY_10_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000028
330 #define PHYRX_RSSI_LEGACY_10_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
331 #define PHYRX_RSSI_LEGACY_10_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
332 #define PHYRX_RSSI_LEGACY_11_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000002c
333 #define PHYRX_RSSI_LEGACY_11_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
334 #define PHYRX_RSSI_LEGACY_11_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
335 #define PHYRX_RSSI_LEGACY_12_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000030
336 #define PHYRX_RSSI_LEGACY_12_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
337 #define PHYRX_RSSI_LEGACY_12_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
338 #define PHYRX_RSSI_LEGACY_13_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000034
339 #define PHYRX_RSSI_LEGACY_13_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
340 #define PHYRX_RSSI_LEGACY_13_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
341 #define PHYRX_RSSI_LEGACY_14_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000038
342 #define PHYRX_RSSI_LEGACY_14_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
343 #define PHYRX_RSSI_LEGACY_14_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
344 #define PHYRX_RSSI_LEGACY_15_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000003c
345 #define PHYRX_RSSI_LEGACY_15_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
346 #define PHYRX_RSSI_LEGACY_15_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
347 #define PHYRX_RSSI_LEGACY_16_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000040
348 #define PHYRX_RSSI_LEGACY_16_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
349 #define PHYRX_RSSI_LEGACY_16_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
350 #define PHYRX_RSSI_LEGACY_17_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000044
351 #define PHYRX_RSSI_LEGACY_17_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
352 #define PHYRX_RSSI_LEGACY_17_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
353 #define PHYRX_RSSI_LEGACY_18_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000048
354 #define PHYRX_RSSI_LEGACY_18_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
355 #define PHYRX_RSSI_LEGACY_18_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
356 #define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000004c
357 #define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
358 #define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
359 #define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000050
360 #define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
361 #define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
362 #define PHYRX_RSSI_LEGACY_21_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000054
363 #define PHYRX_RSSI_LEGACY_21_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
364 #define PHYRX_RSSI_LEGACY_21_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
365 #define PHYRX_RSSI_LEGACY_22_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000058
366 #define PHYRX_RSSI_LEGACY_22_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
367 #define PHYRX_RSSI_LEGACY_22_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
368 #define PHYRX_RSSI_LEGACY_23_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000005c
369 #define PHYRX_RSSI_LEGACY_23_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
370 #define PHYRX_RSSI_LEGACY_23_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
371 #define PHYRX_RSSI_LEGACY_24_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000060
372 #define PHYRX_RSSI_LEGACY_24_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
373 #define PHYRX_RSSI_LEGACY_24_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
374 #define PHYRX_RSSI_LEGACY_25_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000064
375 #define PHYRX_RSSI_LEGACY_25_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
376 #define PHYRX_RSSI_LEGACY_25_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
377 #define PHYRX_RSSI_LEGACY_26_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000068
378 #define PHYRX_RSSI_LEGACY_26_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
379 #define PHYRX_RSSI_LEGACY_26_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
380 #define PHYRX_RSSI_LEGACY_27_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000006c
381 #define PHYRX_RSSI_LEGACY_27_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
382 #define PHYRX_RSSI_LEGACY_27_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
383 #define PHYRX_RSSI_LEGACY_28_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000070
384 #define PHYRX_RSSI_LEGACY_28_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
385 #define PHYRX_RSSI_LEGACY_28_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
386 #define PHYRX_RSSI_LEGACY_29_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000074
387 #define PHYRX_RSSI_LEGACY_29_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
388 #define PHYRX_RSSI_LEGACY_29_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
389 #define PHYRX_RSSI_LEGACY_30_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000078
390 #define PHYRX_RSSI_LEGACY_30_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
391 #define PHYRX_RSSI_LEGACY_30_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
392 #define PHYRX_RSSI_LEGACY_31_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000007c
393 #define PHYRX_RSSI_LEGACY_31_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
394 #define PHYRX_RSSI_LEGACY_31_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
395 #define PHYRX_RSSI_LEGACY_32_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000080
396 #define PHYRX_RSSI_LEGACY_32_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
397 #define PHYRX_RSSI_LEGACY_32_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
398 #define PHYRX_RSSI_LEGACY_33_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000084
399 #define PHYRX_RSSI_LEGACY_33_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
400 #define PHYRX_RSSI_LEGACY_33_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
401 #define PHYRX_RSSI_LEGACY_34_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000088
402 #define PHYRX_RSSI_LEGACY_34_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
403 #define PHYRX_RSSI_LEGACY_34_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
404 
405 /* Description		PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB
406 
407 			Combined pre_rssi of all chains. Based on primary
408 			channel RSSI.
409 
410 			<legal all>
411 */
412 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_OFFSET                    0x0000008c
413 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_LSB                       0
414 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_MASK                      0x000000ff
415 
416 /* Description		PHYRX_RSSI_LEGACY_35_RSSI_COMB
417 
418 			Combined rssi of all chains. Based on primary channel
419 			RSSI.
420 
421 			<legal all>
422 */
423 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_OFFSET                        0x0000008c
424 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_LSB                           8
425 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_MASK                          0x0000ff00
426 
427 /* Description		PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH
428 
429 			Full receive Bandwidth
430 
431 
432 
433 			<enum 0     full_rx_bw_20_mhz>
434 
435 			<enum 1      full_rx_bw_40_mhz>
436 
437 			<enum 2      full_rx_bw_80_mhz>
438 
439 			<enum 3      full_rx_bw_160_mhz>
440 
441 
442 
443 			<legal 0-3>
444 */
445 #define PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH_OFFSET                0x0000008c
446 #define PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH_LSB                   16
447 #define PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH_MASK                  0x00030000
448 
449 /* Description		PHYRX_RSSI_LEGACY_35_RESERVED
450 
451 			<legal 0>
452 */
453 #define PHYRX_RSSI_LEGACY_35_RESERVED_OFFSET                         0x0000008c
454 #define PHYRX_RSSI_LEGACY_35_RESERVED_LSB                            18
455 #define PHYRX_RSSI_LEGACY_35_RESERVED_MASK                           0xfffc0000
456 
457 
458 #endif // _PHYRX_RSSI_LEGACY_H_
459