1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // DO NOT EDIT! This file is automatically generated 20 // These definitions are tied to a particular hardware layout 21 22 23 #ifndef _REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_H_ 24 #define _REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 #include "uniform_reo_status_header.h" 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0-1 struct uniform_reo_status_header status_header; 34 // 2 threshold_index[1:0], reserved_2[31:2] 35 // 3 link_descriptor_counter0[23:0], reserved_3[31:24] 36 // 4 link_descriptor_counter1[23:0], reserved_4[31:24] 37 // 5 link_descriptor_counter2[23:0], reserved_5[31:24] 38 // 6 link_descriptor_counter_sum[25:0], reserved_6[31:26] 39 // 7 reserved_7[31:0] 40 // 8 reserved_8[31:0] 41 // 9 reserved_9a[31:0] 42 // 10 reserved_10a[31:0] 43 // 11 reserved_11a[31:0] 44 // 12 reserved_12a[31:0] 45 // 13 reserved_13a[31:0] 46 // 14 reserved_14a[31:0] 47 // 15 reserved_15a[31:0] 48 // 16 reserved_16a[31:0] 49 // 17 reserved_17a[31:0] 50 // 18 reserved_18a[31:0] 51 // 19 reserved_19a[31:0] 52 // 20 reserved_20a[31:0] 53 // 21 reserved_21a[31:0] 54 // 22 reserved_22a[31:0] 55 // 23 reserved_23a[31:0] 56 // 24 reserved_24a[27:0], looping_count[31:28] 57 // 58 // ################ END SUMMARY ################# 59 60 #define NUM_OF_DWORDS_REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS 25 61 62 struct reo_descriptor_threshold_reached_status { 63 struct uniform_reo_status_header status_header; 64 uint32_t threshold_index : 2, //[1:0] 65 reserved_2 : 30; //[31:2] 66 uint32_t link_descriptor_counter0 : 24, //[23:0] 67 reserved_3 : 8; //[31:24] 68 uint32_t link_descriptor_counter1 : 24, //[23:0] 69 reserved_4 : 8; //[31:24] 70 uint32_t link_descriptor_counter2 : 24, //[23:0] 71 reserved_5 : 8; //[31:24] 72 uint32_t link_descriptor_counter_sum : 26, //[25:0] 73 reserved_6 : 6; //[31:26] 74 uint32_t reserved_7 : 32; //[31:0] 75 uint32_t reserved_8 : 32; //[31:0] 76 uint32_t reserved_9a : 32; //[31:0] 77 uint32_t reserved_10a : 32; //[31:0] 78 uint32_t reserved_11a : 32; //[31:0] 79 uint32_t reserved_12a : 32; //[31:0] 80 uint32_t reserved_13a : 32; //[31:0] 81 uint32_t reserved_14a : 32; //[31:0] 82 uint32_t reserved_15a : 32; //[31:0] 83 uint32_t reserved_16a : 32; //[31:0] 84 uint32_t reserved_17a : 32; //[31:0] 85 uint32_t reserved_18a : 32; //[31:0] 86 uint32_t reserved_19a : 32; //[31:0] 87 uint32_t reserved_20a : 32; //[31:0] 88 uint32_t reserved_21a : 32; //[31:0] 89 uint32_t reserved_22a : 32; //[31:0] 90 uint32_t reserved_23a : 32; //[31:0] 91 uint32_t reserved_24a : 28, //[27:0] 92 looping_count : 4; //[31:28] 93 }; 94 95 /* 96 97 struct uniform_reo_status_header status_header 98 99 Consumer: SW 100 101 Producer: REO 102 103 104 105 Details that can link this status with the original 106 command. It also contains info on how long REO took to 107 execute this command. 108 109 threshold_index 110 111 The index of the threshold register whose value got 112 reached 113 114 115 116 <enum 0 reo_desc_counter0_threshold> 117 118 <enum 1 reo_desc_counter1_threshold> 119 120 <enum 2 reo_desc_counter2_threshold> 121 122 <enum 3 reo_desc_counter_sum_threshold> 123 124 125 126 <legal all> 127 128 reserved_2 129 130 <legal 0> 131 132 link_descriptor_counter0 133 134 Value of this counter at generation of this message 135 136 <legal all> 137 138 reserved_3 139 140 <legal 0> 141 142 link_descriptor_counter1 143 144 Value of this counter at generation of this message 145 146 <legal all> 147 148 reserved_4 149 150 <legal 0> 151 152 link_descriptor_counter2 153 154 Value of this counter at generation of this message 155 156 <legal all> 157 158 reserved_5 159 160 <legal 0> 161 162 link_descriptor_counter_sum 163 164 Value of this counter at generation of this message 165 166 <legal all> 167 168 reserved_6 169 170 <legal 0> 171 172 reserved_7 173 174 <legal 0> 175 176 reserved_8 177 178 <legal 0> 179 180 reserved_9a 181 182 <legal 0> 183 184 reserved_10a 185 186 <legal 0> 187 188 reserved_11a 189 190 <legal 0> 191 192 reserved_12a 193 194 <legal 0> 195 196 reserved_13a 197 198 <legal 0> 199 200 reserved_14a 201 202 <legal 0> 203 204 reserved_15a 205 206 <legal 0> 207 208 reserved_16a 209 210 <legal 0> 211 212 reserved_17a 213 214 <legal 0> 215 216 reserved_18a 217 218 <legal 0> 219 220 reserved_19a 221 222 <legal 0> 223 224 reserved_20a 225 226 <legal 0> 227 228 reserved_21a 229 230 <legal 0> 231 232 reserved_22a 233 234 <legal 0> 235 236 reserved_23a 237 238 <legal 0> 239 240 reserved_24a 241 242 <legal 0> 243 244 looping_count 245 246 A count value that indicates the number of times the 247 producer of entries into this Ring has looped around the 248 ring. 249 250 At initialization time, this value is set to 0. On the 251 first loop, this value is set to 1. After the max value is 252 reached allowed by the number of bits for this field, the 253 count value continues with 0 again. 254 255 256 257 In case SW is the consumer of the ring entries, it can 258 use this field to figure out up to where the producer of 259 entries has created new entries. This eliminates the need to 260 check where the head pointer' of the ring is located once 261 the SW starts processing an interrupt indicating that new 262 entries have been put into this ring... 263 264 265 266 Also note that SW if it wants only needs to look at the 267 LSB bit of this count value. 268 269 <legal all> 270 */ 271 272 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000000 273 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28 274 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff 275 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000004 276 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28 277 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff 278 279 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX 280 281 The index of the threshold register whose value got 282 reached 283 284 285 286 <enum 0 reo_desc_counter0_threshold> 287 288 <enum 1 reo_desc_counter1_threshold> 289 290 <enum 2 reo_desc_counter2_threshold> 291 292 <enum 3 reo_desc_counter_sum_threshold> 293 294 295 296 <legal all> 297 */ 298 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX_OFFSET 0x00000008 299 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX_LSB 0 300 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX_MASK 0x00000003 301 302 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2 303 304 <legal 0> 305 */ 306 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2_OFFSET 0x00000008 307 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2_LSB 2 308 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2_MASK 0xfffffffc 309 310 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0 311 312 Value of this counter at generation of this message 313 314 <legal all> 315 */ 316 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0_OFFSET 0x0000000c 317 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0_LSB 0 318 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0_MASK 0x00ffffff 319 320 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3 321 322 <legal 0> 323 */ 324 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3_OFFSET 0x0000000c 325 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3_LSB 24 326 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3_MASK 0xff000000 327 328 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1 329 330 Value of this counter at generation of this message 331 332 <legal all> 333 */ 334 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1_OFFSET 0x00000010 335 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1_LSB 0 336 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1_MASK 0x00ffffff 337 338 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4 339 340 <legal 0> 341 */ 342 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4_OFFSET 0x00000010 343 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4_LSB 24 344 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4_MASK 0xff000000 345 346 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2 347 348 Value of this counter at generation of this message 349 350 <legal all> 351 */ 352 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2_OFFSET 0x00000014 353 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2_LSB 0 354 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2_MASK 0x00ffffff 355 356 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5 357 358 <legal 0> 359 */ 360 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5_OFFSET 0x00000014 361 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5_LSB 24 362 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5_MASK 0xff000000 363 364 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM 365 366 Value of this counter at generation of this message 367 368 <legal all> 369 */ 370 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM_OFFSET 0x00000018 371 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM_LSB 0 372 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM_MASK 0x03ffffff 373 374 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6 375 376 <legal 0> 377 */ 378 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6_OFFSET 0x00000018 379 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6_LSB 26 380 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6_MASK 0xfc000000 381 382 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7 383 384 <legal 0> 385 */ 386 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7_OFFSET 0x0000001c 387 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7_LSB 0 388 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7_MASK 0xffffffff 389 390 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8 391 392 <legal 0> 393 */ 394 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8_OFFSET 0x00000020 395 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8_LSB 0 396 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8_MASK 0xffffffff 397 398 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A 399 400 <legal 0> 401 */ 402 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A_OFFSET 0x00000024 403 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A_LSB 0 404 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A_MASK 0xffffffff 405 406 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A 407 408 <legal 0> 409 */ 410 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A_OFFSET 0x00000028 411 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A_LSB 0 412 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A_MASK 0xffffffff 413 414 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A 415 416 <legal 0> 417 */ 418 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A_OFFSET 0x0000002c 419 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A_LSB 0 420 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A_MASK 0xffffffff 421 422 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A 423 424 <legal 0> 425 */ 426 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A_OFFSET 0x00000030 427 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A_LSB 0 428 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A_MASK 0xffffffff 429 430 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A 431 432 <legal 0> 433 */ 434 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A_OFFSET 0x00000034 435 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A_LSB 0 436 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A_MASK 0xffffffff 437 438 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A 439 440 <legal 0> 441 */ 442 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A_OFFSET 0x00000038 443 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A_LSB 0 444 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A_MASK 0xffffffff 445 446 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A 447 448 <legal 0> 449 */ 450 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A_OFFSET 0x0000003c 451 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A_LSB 0 452 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A_MASK 0xffffffff 453 454 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A 455 456 <legal 0> 457 */ 458 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A_OFFSET 0x00000040 459 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A_LSB 0 460 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A_MASK 0xffffffff 461 462 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A 463 464 <legal 0> 465 */ 466 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A_OFFSET 0x00000044 467 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A_LSB 0 468 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A_MASK 0xffffffff 469 470 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A 471 472 <legal 0> 473 */ 474 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A_OFFSET 0x00000048 475 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A_LSB 0 476 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A_MASK 0xffffffff 477 478 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A 479 480 <legal 0> 481 */ 482 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A_OFFSET 0x0000004c 483 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A_LSB 0 484 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A_MASK 0xffffffff 485 486 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A 487 488 <legal 0> 489 */ 490 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A_OFFSET 0x00000050 491 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A_LSB 0 492 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A_MASK 0xffffffff 493 494 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A 495 496 <legal 0> 497 */ 498 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A_OFFSET 0x00000054 499 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A_LSB 0 500 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A_MASK 0xffffffff 501 502 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A 503 504 <legal 0> 505 */ 506 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A_OFFSET 0x00000058 507 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A_LSB 0 508 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A_MASK 0xffffffff 509 510 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A 511 512 <legal 0> 513 */ 514 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A_OFFSET 0x0000005c 515 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A_LSB 0 516 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A_MASK 0xffffffff 517 518 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A 519 520 <legal 0> 521 */ 522 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A_OFFSET 0x00000060 523 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A_LSB 0 524 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A_MASK 0x0fffffff 525 526 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT 527 528 A count value that indicates the number of times the 529 producer of entries into this Ring has looped around the 530 ring. 531 532 At initialization time, this value is set to 0. On the 533 first loop, this value is set to 1. After the max value is 534 reached allowed by the number of bits for this field, the 535 count value continues with 0 again. 536 537 538 539 In case SW is the consumer of the ring entries, it can 540 use this field to figure out up to where the producer of 541 entries has created new entries. This eliminates the need to 542 check where the head pointer' of the ring is located once 543 the SW starts processing an interrupt indicating that new 544 entries have been put into this ring... 545 546 547 548 Also note that SW if it wants only needs to look at the 549 LSB bit of this count value. 550 551 <legal all> 552 */ 553 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT_OFFSET 0x00000060 554 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT_LSB 28 555 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT_MASK 0xf0000000 556 557 558 #endif // _REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_H_ 559