1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2016 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name // $ATH_LICENSE_HW_HDR_C$ 20*5113495bSYour Name // 21*5113495bSYour Name // DO NOT EDIT! This file is automatically generated 22*5113495bSYour Name // These definitions are tied to a particular hardware layout 23*5113495bSYour Name 24*5113495bSYour Name 25*5113495bSYour Name #ifndef _REO_ENTRANCE_RING_H_ 26*5113495bSYour Name #define _REO_ENTRANCE_RING_H_ 27*5113495bSYour Name #if !defined(__ASSEMBLER__) 28*5113495bSYour Name #endif 29*5113495bSYour Name 30*5113495bSYour Name #include "rx_mpdu_details.h" 31*5113495bSYour Name 32*5113495bSYour Name // ################ START SUMMARY ################# 33*5113495bSYour Name // 34*5113495bSYour Name // Dword Fields 35*5113495bSYour Name // 0-3 struct rx_mpdu_details reo_level_mpdu_frame_info; 36*5113495bSYour Name // 4 rx_reo_queue_desc_addr_31_0[31:0] 37*5113495bSYour Name // 5 rx_reo_queue_desc_addr_39_32[7:0], rounded_mpdu_byte_count[21:8], reo_destination_indication[26:22], frameless_bar[27], reserved_5a[31:28] 38*5113495bSYour Name // 6 rxdma_push_reason[1:0], rxdma_error_code[6:2], reserved_6a[31:7] 39*5113495bSYour Name // 7 reserved_7a[19:0], ring_id[27:20], looping_count[31:28] 40*5113495bSYour Name // 41*5113495bSYour Name // ################ END SUMMARY ################# 42*5113495bSYour Name 43*5113495bSYour Name #define NUM_OF_DWORDS_REO_ENTRANCE_RING 8 44*5113495bSYour Name 45*5113495bSYour Name struct reo_entrance_ring { 46*5113495bSYour Name struct rx_mpdu_details reo_level_mpdu_frame_info; 47*5113495bSYour Name uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0] 48*5113495bSYour Name uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0] 49*5113495bSYour Name rounded_mpdu_byte_count : 14, //[21:8] 50*5113495bSYour Name reo_destination_indication : 5, //[26:22] 51*5113495bSYour Name frameless_bar : 1, //[27] 52*5113495bSYour Name reserved_5a : 4; //[31:28] 53*5113495bSYour Name uint32_t rxdma_push_reason : 2, //[1:0] 54*5113495bSYour Name rxdma_error_code : 5, //[6:2] 55*5113495bSYour Name reserved_6a : 25; //[31:7] 56*5113495bSYour Name uint32_t reserved_7a : 20, //[19:0] 57*5113495bSYour Name ring_id : 8, //[27:20] 58*5113495bSYour Name looping_count : 4; //[31:28] 59*5113495bSYour Name }; 60*5113495bSYour Name 61*5113495bSYour Name /* 62*5113495bSYour Name 63*5113495bSYour Name struct rx_mpdu_details reo_level_mpdu_frame_info 64*5113495bSYour Name 65*5113495bSYour Name Consumer: REO 66*5113495bSYour Name 67*5113495bSYour Name Producer: RXDMA 68*5113495bSYour Name 69*5113495bSYour Name 70*5113495bSYour Name 71*5113495bSYour Name Details related to the MPDU being pushed into the REO 72*5113495bSYour Name 73*5113495bSYour Name rx_reo_queue_desc_addr_31_0 74*5113495bSYour Name 75*5113495bSYour Name Consumer: REO 76*5113495bSYour Name 77*5113495bSYour Name Producer: RXDMA 78*5113495bSYour Name 79*5113495bSYour Name 80*5113495bSYour Name 81*5113495bSYour Name Address (lower 32 bits) of the REO queue descriptor. 82*5113495bSYour Name 83*5113495bSYour Name <legal all> 84*5113495bSYour Name 85*5113495bSYour Name rx_reo_queue_desc_addr_39_32 86*5113495bSYour Name 87*5113495bSYour Name Consumer: REO 88*5113495bSYour Name 89*5113495bSYour Name Producer: RXDMA 90*5113495bSYour Name 91*5113495bSYour Name 92*5113495bSYour Name 93*5113495bSYour Name Address (upper 8 bits) of the REO queue descriptor. 94*5113495bSYour Name 95*5113495bSYour Name <legal all> 96*5113495bSYour Name 97*5113495bSYour Name rounded_mpdu_byte_count 98*5113495bSYour Name 99*5113495bSYour Name An approximation of the number of bytes received in this 100*5113495bSYour Name MPDU. 101*5113495bSYour Name 102*5113495bSYour Name Used to keeps stats on the amount of data flowing 103*5113495bSYour Name through a queue. 104*5113495bSYour Name 105*5113495bSYour Name <legal all> 106*5113495bSYour Name 107*5113495bSYour Name reo_destination_indication 108*5113495bSYour Name 109*5113495bSYour Name RXDMA copy the MPDU's first MSDU's destination 110*5113495bSYour Name indication field here. This is used for REO to be able to 111*5113495bSYour Name re-route the packet to a different SW destination ring if 112*5113495bSYour Name the packet is detected as error in REO. 113*5113495bSYour Name 114*5113495bSYour Name 115*5113495bSYour Name 116*5113495bSYour Name The ID of the REO exit ring where the MSDU frame shall 117*5113495bSYour Name push after (MPDU level) reordering has finished. 118*5113495bSYour Name 119*5113495bSYour Name 120*5113495bSYour Name 121*5113495bSYour Name <enum 0 reo_destination_tcl> Reo will push the frame 122*5113495bSYour Name into the REO2TCL ring 123*5113495bSYour Name 124*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame 125*5113495bSYour Name into the REO2SW1 ring 126*5113495bSYour Name 127*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame 128*5113495bSYour Name into the REO2SW1 ring 129*5113495bSYour Name 130*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame 131*5113495bSYour Name into the REO2SW1 ring 132*5113495bSYour Name 133*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame 134*5113495bSYour Name into the REO2SW1 ring 135*5113495bSYour Name 136*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 137*5113495bSYour Name into the REO_release ring 138*5113495bSYour Name 139*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 140*5113495bSYour Name the REO2FW ring 141*5113495bSYour Name 142*5113495bSYour Name <enum 7 reo_destination_7> REO remaps this 143*5113495bSYour Name 144*5113495bSYour Name <enum 8 reo_destination_8> REO remaps this <enum 9 145*5113495bSYour Name reo_destination_9> REO remaps this <enum 10 146*5113495bSYour Name reo_destination_10> REO remaps this 147*5113495bSYour Name 148*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 149*5113495bSYour Name 150*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 151*5113495bSYour Name reo_destination_13> REO remaps this 152*5113495bSYour Name 153*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 154*5113495bSYour Name 155*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 156*5113495bSYour Name 157*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 158*5113495bSYour Name 159*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 160*5113495bSYour Name 161*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 162*5113495bSYour Name 163*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 164*5113495bSYour Name 165*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 166*5113495bSYour Name 167*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 168*5113495bSYour Name 169*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 170*5113495bSYour Name 171*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 172*5113495bSYour Name 173*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 174*5113495bSYour Name 175*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 176*5113495bSYour Name 177*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 178*5113495bSYour Name 179*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 180*5113495bSYour Name 181*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 182*5113495bSYour Name 183*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 184*5113495bSYour Name 185*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 186*5113495bSYour Name 187*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 188*5113495bSYour Name 189*5113495bSYour Name 190*5113495bSYour Name 191*5113495bSYour Name <legal all> 192*5113495bSYour Name 193*5113495bSYour Name frameless_bar 194*5113495bSYour Name 195*5113495bSYour Name When set, this REO entrance ring struct contains BAR 196*5113495bSYour Name info from a multi TID BAR frame. The original multi TID BAR 197*5113495bSYour Name frame itself contained all the REO info for the first TID, 198*5113495bSYour Name but all the subsequent TID info and their linkage to the REO 199*5113495bSYour Name descriptors is passed down as 'frameless' BAR info. 200*5113495bSYour Name 201*5113495bSYour Name 202*5113495bSYour Name 203*5113495bSYour Name The only fields valid in this descriptor when this bit 204*5113495bSYour Name is set are: 205*5113495bSYour Name 206*5113495bSYour Name Rx_reo_queue_desc_addr_31_0 207*5113495bSYour Name 208*5113495bSYour Name RX_reo_queue_desc_addr_39_32 209*5113495bSYour Name 210*5113495bSYour Name 211*5113495bSYour Name 212*5113495bSYour Name And within the 213*5113495bSYour Name 214*5113495bSYour Name Reo_level_mpdu_frame_info: 215*5113495bSYour Name 216*5113495bSYour Name Within Rx_mpdu_desc_info_details: 217*5113495bSYour Name 218*5113495bSYour Name Mpdu_Sequence_number 219*5113495bSYour Name 220*5113495bSYour Name BAR_frame 221*5113495bSYour Name 222*5113495bSYour Name Peer_meta_data 223*5113495bSYour Name 224*5113495bSYour Name All other fields shall be set to 0 225*5113495bSYour Name 226*5113495bSYour Name 227*5113495bSYour Name 228*5113495bSYour Name <legal all> 229*5113495bSYour Name 230*5113495bSYour Name reserved_5a 231*5113495bSYour Name 232*5113495bSYour Name <legal 0> 233*5113495bSYour Name 234*5113495bSYour Name rxdma_push_reason 235*5113495bSYour Name 236*5113495bSYour Name Indicates why rxdma pushed the frame to this ring 237*5113495bSYour Name 238*5113495bSYour Name 239*5113495bSYour Name 240*5113495bSYour Name <enum 0 rxdma_error_detected> RXDMA detected an error an 241*5113495bSYour Name pushed this frame to this queue 242*5113495bSYour Name 243*5113495bSYour Name <enum 1 rxdma_routing_instruction> RXDMA pushed the 244*5113495bSYour Name frame to this queue per received routing instructions. No 245*5113495bSYour Name error within RXDMA was detected 246*5113495bSYour Name 247*5113495bSYour Name 248*5113495bSYour Name 249*5113495bSYour Name This field is ignored by REO. 250*5113495bSYour Name 251*5113495bSYour Name <legal 0 - 1> 252*5113495bSYour Name 253*5113495bSYour Name rxdma_error_code 254*5113495bSYour Name 255*5113495bSYour Name Field only valid when 'rxdma_push_reason' set to 256*5113495bSYour Name 'rxdma_error_detected'. 257*5113495bSYour Name 258*5113495bSYour Name 259*5113495bSYour Name 260*5113495bSYour Name This field is ignored by REO. 261*5113495bSYour Name 262*5113495bSYour Name 263*5113495bSYour Name 264*5113495bSYour Name <enum 0 rxdma_overflow_err>MPDU frame is not complete 265*5113495bSYour Name due to a FIFO overflow error in RXPCU. 266*5113495bSYour Name 267*5113495bSYour Name <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete 268*5113495bSYour Name due to receiving incomplete MPDU from the PHY 269*5113495bSYour Name 270*5113495bSYour Name 271*5113495bSYour Name <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption 272*5113495bSYour Name error 273*5113495bSYour Name 274*5113495bSYour Name <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC 275*5113495bSYour Name error 276*5113495bSYour Name 277*5113495bSYour Name <enum 5 rxdma_unecrypted_err>CRYPTO reported an 278*5113495bSYour Name unencrypted frame error when encrypted was expected 279*5113495bSYour Name 280*5113495bSYour Name <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU 281*5113495bSYour Name length error 282*5113495bSYour Name 283*5113495bSYour Name <enum 7 rxdma_msdu_limit_err>RX OLE reported that max 284*5113495bSYour Name number of MSDUs allowed in an MPDU got exceeded 285*5113495bSYour Name 286*5113495bSYour Name <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing 287*5113495bSYour Name error 288*5113495bSYour Name 289*5113495bSYour Name <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU 290*5113495bSYour Name parsing error 291*5113495bSYour Name 292*5113495bSYour Name <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout 293*5113495bSYour Name during SA search 294*5113495bSYour Name 295*5113495bSYour Name <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout 296*5113495bSYour Name during DA search 297*5113495bSYour Name 298*5113495bSYour Name <enum 12 rxdma_flow_timeout_err>RX OLE reported a 299*5113495bSYour Name timeout during flow search 300*5113495bSYour Name 301*5113495bSYour Name <enum 13 Rxdma_flush_request>RXDMA received a flush 302*5113495bSYour Name request 303*5113495bSYour Name 304*5113495bSYour Name reserved_6a 305*5113495bSYour Name 306*5113495bSYour Name <legal 0> 307*5113495bSYour Name 308*5113495bSYour Name reserved_7a 309*5113495bSYour Name 310*5113495bSYour Name <legal 0> 311*5113495bSYour Name 312*5113495bSYour Name ring_id 313*5113495bSYour Name 314*5113495bSYour Name Consumer: SW/REO/DEBUG 315*5113495bSYour Name 316*5113495bSYour Name Producer: SRNG (of RXDMA) 317*5113495bSYour Name 318*5113495bSYour Name 319*5113495bSYour Name 320*5113495bSYour Name For debugging. 321*5113495bSYour Name 322*5113495bSYour Name This field is filled in by the SRNG module. 323*5113495bSYour Name 324*5113495bSYour Name It help to identify the ring that is being looked <legal 325*5113495bSYour Name all> 326*5113495bSYour Name 327*5113495bSYour Name looping_count 328*5113495bSYour Name 329*5113495bSYour Name Consumer: SW/REO/DEBUG 330*5113495bSYour Name 331*5113495bSYour Name Producer: SRNG (of RXDMA) 332*5113495bSYour Name 333*5113495bSYour Name 334*5113495bSYour Name 335*5113495bSYour Name For debugging. 336*5113495bSYour Name 337*5113495bSYour Name This field is filled in by the SRNG module. 338*5113495bSYour Name 339*5113495bSYour Name 340*5113495bSYour Name 341*5113495bSYour Name A count value that indicates the number of times the 342*5113495bSYour Name producer of entries into this Ring has looped around the 343*5113495bSYour Name ring. 344*5113495bSYour Name 345*5113495bSYour Name At initialization time, this value is set to 0. On the 346*5113495bSYour Name first loop, this value is set to 1. After the max value is 347*5113495bSYour Name reached allowed by the number of bits for this field, the 348*5113495bSYour Name count value continues with 0 again. 349*5113495bSYour Name 350*5113495bSYour Name 351*5113495bSYour Name 352*5113495bSYour Name In case SW is the consumer of the ring entries, it can 353*5113495bSYour Name use this field to figure out up to where the producer of 354*5113495bSYour Name entries has created new entries. This eliminates the need to 355*5113495bSYour Name check where the head pointer' of the ring is located once 356*5113495bSYour Name the SW starts processing an interrupt indicating that new 357*5113495bSYour Name entries have been put into this ring... 358*5113495bSYour Name 359*5113495bSYour Name 360*5113495bSYour Name 361*5113495bSYour Name Also note that SW if it wants only needs to look at the 362*5113495bSYour Name LSB bit of this count value. 363*5113495bSYour Name 364*5113495bSYour Name <legal all> 365*5113495bSYour Name */ 366*5113495bSYour Name 367*5113495bSYour Name #define REO_ENTRANCE_RING_0_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_OFFSET 0x00000000 368*5113495bSYour Name #define REO_ENTRANCE_RING_0_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_LSB 28 369*5113495bSYour Name #define REO_ENTRANCE_RING_0_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_MASK 0xffffffff 370*5113495bSYour Name #define REO_ENTRANCE_RING_1_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_OFFSET 0x00000004 371*5113495bSYour Name #define REO_ENTRANCE_RING_1_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_LSB 28 372*5113495bSYour Name #define REO_ENTRANCE_RING_1_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_MASK 0xffffffff 373*5113495bSYour Name #define REO_ENTRANCE_RING_2_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_OFFSET 0x00000008 374*5113495bSYour Name #define REO_ENTRANCE_RING_2_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_LSB 28 375*5113495bSYour Name #define REO_ENTRANCE_RING_2_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_MASK 0xffffffff 376*5113495bSYour Name #define REO_ENTRANCE_RING_3_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_OFFSET 0x0000000c 377*5113495bSYour Name #define REO_ENTRANCE_RING_3_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_LSB 28 378*5113495bSYour Name #define REO_ENTRANCE_RING_3_RX_MPDU_DETAILS_REO_LEVEL_MPDU_FRAME_INFO_MASK 0xffffffff 379*5113495bSYour Name 380*5113495bSYour Name /* Description REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0 381*5113495bSYour Name 382*5113495bSYour Name Consumer: REO 383*5113495bSYour Name 384*5113495bSYour Name Producer: RXDMA 385*5113495bSYour Name 386*5113495bSYour Name 387*5113495bSYour Name 388*5113495bSYour Name Address (lower 32 bits) of the REO queue descriptor. 389*5113495bSYour Name 390*5113495bSYour Name <legal all> 391*5113495bSYour Name */ 392*5113495bSYour Name #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000010 393*5113495bSYour Name #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0 394*5113495bSYour Name #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff 395*5113495bSYour Name 396*5113495bSYour Name /* Description REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32 397*5113495bSYour Name 398*5113495bSYour Name Consumer: REO 399*5113495bSYour Name 400*5113495bSYour Name Producer: RXDMA 401*5113495bSYour Name 402*5113495bSYour Name 403*5113495bSYour Name 404*5113495bSYour Name Address (upper 8 bits) of the REO queue descriptor. 405*5113495bSYour Name 406*5113495bSYour Name <legal all> 407*5113495bSYour Name */ 408*5113495bSYour Name #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000014 409*5113495bSYour Name #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 410*5113495bSYour Name #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff 411*5113495bSYour Name 412*5113495bSYour Name /* Description REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT 413*5113495bSYour Name 414*5113495bSYour Name An approximation of the number of bytes received in this 415*5113495bSYour Name MPDU. 416*5113495bSYour Name 417*5113495bSYour Name Used to keeps stats on the amount of data flowing 418*5113495bSYour Name through a queue. 419*5113495bSYour Name 420*5113495bSYour Name <legal all> 421*5113495bSYour Name */ 422*5113495bSYour Name #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_OFFSET 0x00000014 423*5113495bSYour Name #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_LSB 8 424*5113495bSYour Name #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_MASK 0x003fff00 425*5113495bSYour Name 426*5113495bSYour Name /* Description REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION 427*5113495bSYour Name 428*5113495bSYour Name RXDMA copy the MPDU's first MSDU's destination 429*5113495bSYour Name indication field here. This is used for REO to be able to 430*5113495bSYour Name re-route the packet to a different SW destination ring if 431*5113495bSYour Name the packet is detected as error in REO. 432*5113495bSYour Name 433*5113495bSYour Name 434*5113495bSYour Name 435*5113495bSYour Name The ID of the REO exit ring where the MSDU frame shall 436*5113495bSYour Name push after (MPDU level) reordering has finished. 437*5113495bSYour Name 438*5113495bSYour Name 439*5113495bSYour Name 440*5113495bSYour Name <enum 0 reo_destination_tcl> Reo will push the frame 441*5113495bSYour Name into the REO2TCL ring 442*5113495bSYour Name 443*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame 444*5113495bSYour Name into the REO2SW1 ring 445*5113495bSYour Name 446*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame 447*5113495bSYour Name into the REO2SW1 ring 448*5113495bSYour Name 449*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame 450*5113495bSYour Name into the REO2SW1 ring 451*5113495bSYour Name 452*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame 453*5113495bSYour Name into the REO2SW1 ring 454*5113495bSYour Name 455*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 456*5113495bSYour Name into the REO_release ring 457*5113495bSYour Name 458*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 459*5113495bSYour Name the REO2FW ring 460*5113495bSYour Name 461*5113495bSYour Name <enum 7 reo_destination_7> REO remaps this 462*5113495bSYour Name 463*5113495bSYour Name <enum 8 reo_destination_8> REO remaps this <enum 9 464*5113495bSYour Name reo_destination_9> REO remaps this <enum 10 465*5113495bSYour Name reo_destination_10> REO remaps this 466*5113495bSYour Name 467*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 468*5113495bSYour Name 469*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 470*5113495bSYour Name reo_destination_13> REO remaps this 471*5113495bSYour Name 472*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 473*5113495bSYour Name 474*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 475*5113495bSYour Name 476*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 477*5113495bSYour Name 478*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 479*5113495bSYour Name 480*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 481*5113495bSYour Name 482*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 483*5113495bSYour Name 484*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 485*5113495bSYour Name 486*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 487*5113495bSYour Name 488*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 489*5113495bSYour Name 490*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 491*5113495bSYour Name 492*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 493*5113495bSYour Name 494*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 495*5113495bSYour Name 496*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 497*5113495bSYour Name 498*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 499*5113495bSYour Name 500*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 501*5113495bSYour Name 502*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 503*5113495bSYour Name 504*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 505*5113495bSYour Name 506*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 507*5113495bSYour Name 508*5113495bSYour Name 509*5113495bSYour Name 510*5113495bSYour Name <legal all> 511*5113495bSYour Name */ 512*5113495bSYour Name #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_OFFSET 0x00000014 513*5113495bSYour Name #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_LSB 22 514*5113495bSYour Name #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_MASK 0x07c00000 515*5113495bSYour Name 516*5113495bSYour Name /* Description REO_ENTRANCE_RING_5_FRAMELESS_BAR 517*5113495bSYour Name 518*5113495bSYour Name When set, this REO entrance ring struct contains BAR 519*5113495bSYour Name info from a multi TID BAR frame. The original multi TID BAR 520*5113495bSYour Name frame itself contained all the REO info for the first TID, 521*5113495bSYour Name but all the subsequent TID info and their linkage to the REO 522*5113495bSYour Name descriptors is passed down as 'frameless' BAR info. 523*5113495bSYour Name 524*5113495bSYour Name 525*5113495bSYour Name 526*5113495bSYour Name The only fields valid in this descriptor when this bit 527*5113495bSYour Name is set are: 528*5113495bSYour Name 529*5113495bSYour Name Rx_reo_queue_desc_addr_31_0 530*5113495bSYour Name 531*5113495bSYour Name RX_reo_queue_desc_addr_39_32 532*5113495bSYour Name 533*5113495bSYour Name 534*5113495bSYour Name 535*5113495bSYour Name And within the 536*5113495bSYour Name 537*5113495bSYour Name Reo_level_mpdu_frame_info: 538*5113495bSYour Name 539*5113495bSYour Name Within Rx_mpdu_desc_info_details: 540*5113495bSYour Name 541*5113495bSYour Name Mpdu_Sequence_number 542*5113495bSYour Name 543*5113495bSYour Name BAR_frame 544*5113495bSYour Name 545*5113495bSYour Name Peer_meta_data 546*5113495bSYour Name 547*5113495bSYour Name All other fields shall be set to 0 548*5113495bSYour Name 549*5113495bSYour Name 550*5113495bSYour Name 551*5113495bSYour Name <legal all> 552*5113495bSYour Name */ 553*5113495bSYour Name #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_OFFSET 0x00000014 554*5113495bSYour Name #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_LSB 27 555*5113495bSYour Name #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_MASK 0x08000000 556*5113495bSYour Name 557*5113495bSYour Name /* Description REO_ENTRANCE_RING_5_RESERVED_5A 558*5113495bSYour Name 559*5113495bSYour Name <legal 0> 560*5113495bSYour Name */ 561*5113495bSYour Name #define REO_ENTRANCE_RING_5_RESERVED_5A_OFFSET 0x00000014 562*5113495bSYour Name #define REO_ENTRANCE_RING_5_RESERVED_5A_LSB 28 563*5113495bSYour Name #define REO_ENTRANCE_RING_5_RESERVED_5A_MASK 0xf0000000 564*5113495bSYour Name 565*5113495bSYour Name /* Description REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON 566*5113495bSYour Name 567*5113495bSYour Name Indicates why rxdma pushed the frame to this ring 568*5113495bSYour Name 569*5113495bSYour Name 570*5113495bSYour Name 571*5113495bSYour Name <enum 0 rxdma_error_detected> RXDMA detected an error an 572*5113495bSYour Name pushed this frame to this queue 573*5113495bSYour Name 574*5113495bSYour Name <enum 1 rxdma_routing_instruction> RXDMA pushed the 575*5113495bSYour Name frame to this queue per received routing instructions. No 576*5113495bSYour Name error within RXDMA was detected 577*5113495bSYour Name 578*5113495bSYour Name 579*5113495bSYour Name 580*5113495bSYour Name This field is ignored by REO. 581*5113495bSYour Name 582*5113495bSYour Name <legal 0 - 1> 583*5113495bSYour Name */ 584*5113495bSYour Name #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_OFFSET 0x00000018 585*5113495bSYour Name #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_LSB 0 586*5113495bSYour Name #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_MASK 0x00000003 587*5113495bSYour Name 588*5113495bSYour Name /* Description REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE 589*5113495bSYour Name 590*5113495bSYour Name Field only valid when 'rxdma_push_reason' set to 591*5113495bSYour Name 'rxdma_error_detected'. 592*5113495bSYour Name 593*5113495bSYour Name 594*5113495bSYour Name 595*5113495bSYour Name This field is ignored by REO. 596*5113495bSYour Name 597*5113495bSYour Name 598*5113495bSYour Name 599*5113495bSYour Name <enum 0 rxdma_overflow_err>MPDU frame is not complete 600*5113495bSYour Name due to a FIFO overflow error in RXPCU. 601*5113495bSYour Name 602*5113495bSYour Name <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete 603*5113495bSYour Name due to receiving incomplete MPDU from the PHY 604*5113495bSYour Name 605*5113495bSYour Name 606*5113495bSYour Name <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption 607*5113495bSYour Name error 608*5113495bSYour Name 609*5113495bSYour Name <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC 610*5113495bSYour Name error 611*5113495bSYour Name 612*5113495bSYour Name <enum 5 rxdma_unecrypted_err>CRYPTO reported an 613*5113495bSYour Name unencrypted frame error when encrypted was expected 614*5113495bSYour Name 615*5113495bSYour Name <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU 616*5113495bSYour Name length error 617*5113495bSYour Name 618*5113495bSYour Name <enum 7 rxdma_msdu_limit_err>RX OLE reported that max 619*5113495bSYour Name number of MSDUs allowed in an MPDU got exceeded 620*5113495bSYour Name 621*5113495bSYour Name <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing 622*5113495bSYour Name error 623*5113495bSYour Name 624*5113495bSYour Name <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU 625*5113495bSYour Name parsing error 626*5113495bSYour Name 627*5113495bSYour Name <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout 628*5113495bSYour Name during SA search 629*5113495bSYour Name 630*5113495bSYour Name <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout 631*5113495bSYour Name during DA search 632*5113495bSYour Name 633*5113495bSYour Name <enum 12 rxdma_flow_timeout_err>RX OLE reported a 634*5113495bSYour Name timeout during flow search 635*5113495bSYour Name 636*5113495bSYour Name <enum 13 Rxdma_flush_request>RXDMA received a flush 637*5113495bSYour Name request 638*5113495bSYour Name */ 639*5113495bSYour Name #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_OFFSET 0x00000018 640*5113495bSYour Name #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_LSB 2 641*5113495bSYour Name #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_MASK 0x0000007c 642*5113495bSYour Name 643*5113495bSYour Name /* Description REO_ENTRANCE_RING_6_RESERVED_6A 644*5113495bSYour Name 645*5113495bSYour Name <legal 0> 646*5113495bSYour Name */ 647*5113495bSYour Name #define REO_ENTRANCE_RING_6_RESERVED_6A_OFFSET 0x00000018 648*5113495bSYour Name #define REO_ENTRANCE_RING_6_RESERVED_6A_LSB 7 649*5113495bSYour Name #define REO_ENTRANCE_RING_6_RESERVED_6A_MASK 0xffffff80 650*5113495bSYour Name 651*5113495bSYour Name /* Description REO_ENTRANCE_RING_7_RESERVED_7A 652*5113495bSYour Name 653*5113495bSYour Name <legal 0> 654*5113495bSYour Name */ 655*5113495bSYour Name #define REO_ENTRANCE_RING_7_RESERVED_7A_OFFSET 0x0000001c 656*5113495bSYour Name #define REO_ENTRANCE_RING_7_RESERVED_7A_LSB 0 657*5113495bSYour Name #define REO_ENTRANCE_RING_7_RESERVED_7A_MASK 0x000fffff 658*5113495bSYour Name 659*5113495bSYour Name /* Description REO_ENTRANCE_RING_7_RING_ID 660*5113495bSYour Name 661*5113495bSYour Name Consumer: SW/REO/DEBUG 662*5113495bSYour Name 663*5113495bSYour Name Producer: SRNG (of RXDMA) 664*5113495bSYour Name 665*5113495bSYour Name 666*5113495bSYour Name 667*5113495bSYour Name For debugging. 668*5113495bSYour Name 669*5113495bSYour Name This field is filled in by the SRNG module. 670*5113495bSYour Name 671*5113495bSYour Name It help to identify the ring that is being looked <legal 672*5113495bSYour Name all> 673*5113495bSYour Name */ 674*5113495bSYour Name #define REO_ENTRANCE_RING_7_RING_ID_OFFSET 0x0000001c 675*5113495bSYour Name #define REO_ENTRANCE_RING_7_RING_ID_LSB 20 676*5113495bSYour Name #define REO_ENTRANCE_RING_7_RING_ID_MASK 0x0ff00000 677*5113495bSYour Name 678*5113495bSYour Name /* Description REO_ENTRANCE_RING_7_LOOPING_COUNT 679*5113495bSYour Name 680*5113495bSYour Name Consumer: SW/REO/DEBUG 681*5113495bSYour Name 682*5113495bSYour Name Producer: SRNG (of RXDMA) 683*5113495bSYour Name 684*5113495bSYour Name 685*5113495bSYour Name 686*5113495bSYour Name For debugging. 687*5113495bSYour Name 688*5113495bSYour Name This field is filled in by the SRNG module. 689*5113495bSYour Name 690*5113495bSYour Name 691*5113495bSYour Name 692*5113495bSYour Name A count value that indicates the number of times the 693*5113495bSYour Name producer of entries into this Ring has looped around the 694*5113495bSYour Name ring. 695*5113495bSYour Name 696*5113495bSYour Name At initialization time, this value is set to 0. On the 697*5113495bSYour Name first loop, this value is set to 1. After the max value is 698*5113495bSYour Name reached allowed by the number of bits for this field, the 699*5113495bSYour Name count value continues with 0 again. 700*5113495bSYour Name 701*5113495bSYour Name 702*5113495bSYour Name 703*5113495bSYour Name In case SW is the consumer of the ring entries, it can 704*5113495bSYour Name use this field to figure out up to where the producer of 705*5113495bSYour Name entries has created new entries. This eliminates the need to 706*5113495bSYour Name check where the head pointer' of the ring is located once 707*5113495bSYour Name the SW starts processing an interrupt indicating that new 708*5113495bSYour Name entries have been put into this ring... 709*5113495bSYour Name 710*5113495bSYour Name 711*5113495bSYour Name 712*5113495bSYour Name Also note that SW if it wants only needs to look at the 713*5113495bSYour Name LSB bit of this count value. 714*5113495bSYour Name 715*5113495bSYour Name <legal all> 716*5113495bSYour Name */ 717*5113495bSYour Name #define REO_ENTRANCE_RING_7_LOOPING_COUNT_OFFSET 0x0000001c 718*5113495bSYour Name #define REO_ENTRANCE_RING_7_LOOPING_COUNT_LSB 28 719*5113495bSYour Name #define REO_ENTRANCE_RING_7_LOOPING_COUNT_MASK 0xf0000000 720*5113495bSYour Name 721*5113495bSYour Name 722*5113495bSYour Name #endif // _REO_ENTRANCE_RING_H_ 723