1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name // DO NOT EDIT! This file is automatically generated 20*5113495bSYour Name // These definitions are tied to a particular hardware layout 21*5113495bSYour Name 22*5113495bSYour Name 23*5113495bSYour Name #ifndef _REO_FLUSH_CACHE_H_ 24*5113495bSYour Name #define _REO_FLUSH_CACHE_H_ 25*5113495bSYour Name #if !defined(__ASSEMBLER__) 26*5113495bSYour Name #endif 27*5113495bSYour Name 28*5113495bSYour Name #include "uniform_reo_cmd_header.h" 29*5113495bSYour Name 30*5113495bSYour Name // ################ START SUMMARY ################# 31*5113495bSYour Name // 32*5113495bSYour Name // Dword Fields 33*5113495bSYour Name // 0 struct uniform_reo_cmd_header cmd_header; 34*5113495bSYour Name // 1 flush_addr_31_0[31:0] 35*5113495bSYour Name // 2 flush_addr_39_32[7:0], forward_all_mpdus_in_queue[8], release_cache_block_index[9], cache_block_resource_index[11:10], flush_without_invalidate[12], block_cache_usage_after_flush[13], flush_entire_cache[14], reserved_2b[31:15] 36*5113495bSYour Name // 3 reserved_3a[31:0] 37*5113495bSYour Name // 4 reserved_4a[31:0] 38*5113495bSYour Name // 5 reserved_5a[31:0] 39*5113495bSYour Name // 6 reserved_6a[31:0] 40*5113495bSYour Name // 7 reserved_7a[31:0] 41*5113495bSYour Name // 8 reserved_8a[31:0] 42*5113495bSYour Name // 43*5113495bSYour Name // ################ END SUMMARY ################# 44*5113495bSYour Name 45*5113495bSYour Name #define NUM_OF_DWORDS_REO_FLUSH_CACHE 9 46*5113495bSYour Name 47*5113495bSYour Name struct reo_flush_cache { 48*5113495bSYour Name struct uniform_reo_cmd_header cmd_header; 49*5113495bSYour Name uint32_t flush_addr_31_0 : 32; //[31:0] 50*5113495bSYour Name uint32_t flush_addr_39_32 : 8, //[7:0] 51*5113495bSYour Name forward_all_mpdus_in_queue : 1, //[8] 52*5113495bSYour Name release_cache_block_index : 1, //[9] 53*5113495bSYour Name cache_block_resource_index : 2, //[11:10] 54*5113495bSYour Name flush_without_invalidate : 1, //[12] 55*5113495bSYour Name block_cache_usage_after_flush : 1, //[13] 56*5113495bSYour Name flush_entire_cache : 1, //[14] 57*5113495bSYour Name reserved_2b : 17; //[31:15] 58*5113495bSYour Name uint32_t reserved_3a : 32; //[31:0] 59*5113495bSYour Name uint32_t reserved_4a : 32; //[31:0] 60*5113495bSYour Name uint32_t reserved_5a : 32; //[31:0] 61*5113495bSYour Name uint32_t reserved_6a : 32; //[31:0] 62*5113495bSYour Name uint32_t reserved_7a : 32; //[31:0] 63*5113495bSYour Name uint32_t reserved_8a : 32; //[31:0] 64*5113495bSYour Name }; 65*5113495bSYour Name 66*5113495bSYour Name /* 67*5113495bSYour Name 68*5113495bSYour Name struct uniform_reo_cmd_header cmd_header 69*5113495bSYour Name 70*5113495bSYour Name Consumer: REO 71*5113495bSYour Name 72*5113495bSYour Name Producer: SW 73*5113495bSYour Name 74*5113495bSYour Name 75*5113495bSYour Name 76*5113495bSYour Name Details for command execution tracking purposes. 77*5113495bSYour Name 78*5113495bSYour Name flush_addr_31_0 79*5113495bSYour Name 80*5113495bSYour Name Consumer: REO 81*5113495bSYour Name 82*5113495bSYour Name Producer: SW 83*5113495bSYour Name 84*5113495bSYour Name 85*5113495bSYour Name 86*5113495bSYour Name Address (lower 32 bits) of the descriptor to flush 87*5113495bSYour Name 88*5113495bSYour Name <legal all> 89*5113495bSYour Name 90*5113495bSYour Name flush_addr_39_32 91*5113495bSYour Name 92*5113495bSYour Name Consumer: REO 93*5113495bSYour Name 94*5113495bSYour Name Producer: SW 95*5113495bSYour Name 96*5113495bSYour Name 97*5113495bSYour Name 98*5113495bSYour Name Address (upper 8 bits) of the descriptor to flush 99*5113495bSYour Name 100*5113495bSYour Name <legal all> 101*5113495bSYour Name 102*5113495bSYour Name forward_all_mpdus_in_queue 103*5113495bSYour Name 104*5113495bSYour Name Is only allowed to be set when the flush address 105*5113495bSYour Name corresponds with a REO descriptor. 106*5113495bSYour Name 107*5113495bSYour Name 108*5113495bSYour Name 109*5113495bSYour Name When set, REO shall first forward all the MPDUs held in 110*5113495bSYour Name the indicated re-order queue, before flushing the descriptor 111*5113495bSYour Name from the cache. 112*5113495bSYour Name 113*5113495bSYour Name <legal all> 114*5113495bSYour Name 115*5113495bSYour Name release_cache_block_index 116*5113495bSYour Name 117*5113495bSYour Name Field not valid when Flush_entire_cache is set. 118*5113495bSYour Name 119*5113495bSYour Name 120*5113495bSYour Name 121*5113495bSYour Name If SW has previously used a blocking resource that it 122*5113495bSYour Name now wants to re-use for this command, this bit shall be set. 123*5113495bSYour Name It prevents SW from having to send a separate 124*5113495bSYour Name REO_UNBLOCK_CACHE command. 125*5113495bSYour Name 126*5113495bSYour Name 127*5113495bSYour Name 128*5113495bSYour Name When set, HW will first release the blocking resource 129*5113495bSYour Name (indicated in field 'Cache_block_resouce_index') before this 130*5113495bSYour Name command gets executed. 131*5113495bSYour Name 132*5113495bSYour Name If that resource was already unblocked, this will be 133*5113495bSYour Name considered an error. This command will not be executed, and 134*5113495bSYour Name an error shall be returned. 135*5113495bSYour Name 136*5113495bSYour Name <legal all> 137*5113495bSYour Name 138*5113495bSYour Name cache_block_resource_index 139*5113495bSYour Name 140*5113495bSYour Name Field not valid when Flush_entire_cache is set. 141*5113495bSYour Name 142*5113495bSYour Name 143*5113495bSYour Name 144*5113495bSYour Name Indicates which of the four blocking resources in REO 145*5113495bSYour Name will be assigned for managing the blocking of this 146*5113495bSYour Name (descriptor) address 147*5113495bSYour Name 148*5113495bSYour Name <legal all> 149*5113495bSYour Name 150*5113495bSYour Name flush_without_invalidate 151*5113495bSYour Name 152*5113495bSYour Name Field not valid when Flush_entire_cache is set. 153*5113495bSYour Name 154*5113495bSYour Name 155*5113495bSYour Name 156*5113495bSYour Name When set, REO shall flush the cache line contents from 157*5113495bSYour Name the cache, but there is NO need to invalidate the cache line 158*5113495bSYour Name entry... The contents in the cache can be maintained. This 159*5113495bSYour Name feature can be used by SW (and DV) to get a current snapshot 160*5113495bSYour Name of the contents in the cache 161*5113495bSYour Name 162*5113495bSYour Name 163*5113495bSYour Name 164*5113495bSYour Name <legal all> 165*5113495bSYour Name 166*5113495bSYour Name block_cache_usage_after_flush 167*5113495bSYour Name 168*5113495bSYour Name Field not valid when Flush_entire_cache is set. 169*5113495bSYour Name 170*5113495bSYour Name 171*5113495bSYour Name 172*5113495bSYour Name When set, REO shall block any cache accesses to this 173*5113495bSYour Name address till explicitly unblocked. 174*5113495bSYour Name 175*5113495bSYour Name 176*5113495bSYour Name 177*5113495bSYour Name Whenever SW sets this bit, SW shall also set bit 178*5113495bSYour Name 'Forward_all_mpdus_in_queue' to ensure all packets are 179*5113495bSYour Name flushed out in order to make sure this queue desc is not in 180*5113495bSYour Name one of the aging link lists. In case SW does not want to 181*5113495bSYour Name flush the MPDUs in the queue, see the recipe description 182*5113495bSYour Name below this TLV definition. 183*5113495bSYour Name 184*5113495bSYour Name 185*5113495bSYour Name 186*5113495bSYour Name The 'blocking' index to be used for this is indicated in 187*5113495bSYour Name field 'cache_block_resource_index'. If SW had previously 188*5113495bSYour Name used this blocking resource and was not freed up yet, SW 189*5113495bSYour Name shall first unblock that index (by setting bit 190*5113495bSYour Name Release_cache_block_index) or use an unblock command. 191*5113495bSYour Name 192*5113495bSYour Name 193*5113495bSYour Name 194*5113495bSYour Name If the resource indicated here was already blocked (and 195*5113495bSYour Name did not get unblocked in this command), it is considered an 196*5113495bSYour Name error scenario... 197*5113495bSYour Name 198*5113495bSYour Name No flush shall happen. The status for this command shall 199*5113495bSYour Name indicate error. 200*5113495bSYour Name 201*5113495bSYour Name 202*5113495bSYour Name 203*5113495bSYour Name <legal all> 204*5113495bSYour Name 205*5113495bSYour Name flush_entire_cache 206*5113495bSYour Name 207*5113495bSYour Name When set, the entire cache shall be flushed. The entire 208*5113495bSYour Name cache will also remain blocked, till the 209*5113495bSYour Name 'REO_UNBLOCK_COMMAND' is received with bit unblock type set 210*5113495bSYour Name to unblock_cache. All other fields in this command are to be 211*5113495bSYour Name ignored. 212*5113495bSYour Name 213*5113495bSYour Name 214*5113495bSYour Name 215*5113495bSYour Name Note that flushing the entire cache has no changes to 216*5113495bSYour Name the current settings of the blocking resource settings 217*5113495bSYour Name 218*5113495bSYour Name 219*5113495bSYour Name 220*5113495bSYour Name <legal all> 221*5113495bSYour Name 222*5113495bSYour Name reserved_2b 223*5113495bSYour Name 224*5113495bSYour Name <legal 0> 225*5113495bSYour Name 226*5113495bSYour Name reserved_3a 227*5113495bSYour Name 228*5113495bSYour Name <legal 0> 229*5113495bSYour Name 230*5113495bSYour Name reserved_4a 231*5113495bSYour Name 232*5113495bSYour Name <legal 0> 233*5113495bSYour Name 234*5113495bSYour Name reserved_5a 235*5113495bSYour Name 236*5113495bSYour Name <legal 0> 237*5113495bSYour Name 238*5113495bSYour Name reserved_6a 239*5113495bSYour Name 240*5113495bSYour Name <legal 0> 241*5113495bSYour Name 242*5113495bSYour Name reserved_7a 243*5113495bSYour Name 244*5113495bSYour Name <legal 0> 245*5113495bSYour Name 246*5113495bSYour Name reserved_8a 247*5113495bSYour Name 248*5113495bSYour Name <legal 0> 249*5113495bSYour Name */ 250*5113495bSYour Name 251*5113495bSYour Name #define REO_FLUSH_CACHE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_OFFSET 0x00000000 252*5113495bSYour Name #define REO_FLUSH_CACHE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_LSB 0 253*5113495bSYour Name #define REO_FLUSH_CACHE_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_MASK 0xffffffff 254*5113495bSYour Name 255*5113495bSYour Name /* Description REO_FLUSH_CACHE_1_FLUSH_ADDR_31_0 256*5113495bSYour Name 257*5113495bSYour Name Consumer: REO 258*5113495bSYour Name 259*5113495bSYour Name Producer: SW 260*5113495bSYour Name 261*5113495bSYour Name 262*5113495bSYour Name 263*5113495bSYour Name Address (lower 32 bits) of the descriptor to flush 264*5113495bSYour Name 265*5113495bSYour Name <legal all> 266*5113495bSYour Name */ 267*5113495bSYour Name #define REO_FLUSH_CACHE_1_FLUSH_ADDR_31_0_OFFSET 0x00000004 268*5113495bSYour Name #define REO_FLUSH_CACHE_1_FLUSH_ADDR_31_0_LSB 0 269*5113495bSYour Name #define REO_FLUSH_CACHE_1_FLUSH_ADDR_31_0_MASK 0xffffffff 270*5113495bSYour Name 271*5113495bSYour Name /* Description REO_FLUSH_CACHE_2_FLUSH_ADDR_39_32 272*5113495bSYour Name 273*5113495bSYour Name Consumer: REO 274*5113495bSYour Name 275*5113495bSYour Name Producer: SW 276*5113495bSYour Name 277*5113495bSYour Name 278*5113495bSYour Name 279*5113495bSYour Name Address (upper 8 bits) of the descriptor to flush 280*5113495bSYour Name 281*5113495bSYour Name <legal all> 282*5113495bSYour Name */ 283*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ADDR_39_32_OFFSET 0x00000008 284*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ADDR_39_32_LSB 0 285*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ADDR_39_32_MASK 0x000000ff 286*5113495bSYour Name 287*5113495bSYour Name /* Description REO_FLUSH_CACHE_2_FORWARD_ALL_MPDUS_IN_QUEUE 288*5113495bSYour Name 289*5113495bSYour Name Is only allowed to be set when the flush address 290*5113495bSYour Name corresponds with a REO descriptor. 291*5113495bSYour Name 292*5113495bSYour Name 293*5113495bSYour Name 294*5113495bSYour Name When set, REO shall first forward all the MPDUs held in 295*5113495bSYour Name the indicated re-order queue, before flushing the descriptor 296*5113495bSYour Name from the cache. 297*5113495bSYour Name 298*5113495bSYour Name <legal all> 299*5113495bSYour Name */ 300*5113495bSYour Name #define REO_FLUSH_CACHE_2_FORWARD_ALL_MPDUS_IN_QUEUE_OFFSET 0x00000008 301*5113495bSYour Name #define REO_FLUSH_CACHE_2_FORWARD_ALL_MPDUS_IN_QUEUE_LSB 8 302*5113495bSYour Name #define REO_FLUSH_CACHE_2_FORWARD_ALL_MPDUS_IN_QUEUE_MASK 0x00000100 303*5113495bSYour Name 304*5113495bSYour Name /* Description REO_FLUSH_CACHE_2_RELEASE_CACHE_BLOCK_INDEX 305*5113495bSYour Name 306*5113495bSYour Name Field not valid when Flush_entire_cache is set. 307*5113495bSYour Name 308*5113495bSYour Name 309*5113495bSYour Name 310*5113495bSYour Name If SW has previously used a blocking resource that it 311*5113495bSYour Name now wants to re-use for this command, this bit shall be set. 312*5113495bSYour Name It prevents SW from having to send a separate 313*5113495bSYour Name REO_UNBLOCK_CACHE command. 314*5113495bSYour Name 315*5113495bSYour Name 316*5113495bSYour Name 317*5113495bSYour Name When set, HW will first release the blocking resource 318*5113495bSYour Name (indicated in field 'Cache_block_resouce_index') before this 319*5113495bSYour Name command gets executed. 320*5113495bSYour Name 321*5113495bSYour Name If that resource was already unblocked, this will be 322*5113495bSYour Name considered an error. This command will not be executed, and 323*5113495bSYour Name an error shall be returned. 324*5113495bSYour Name 325*5113495bSYour Name <legal all> 326*5113495bSYour Name */ 327*5113495bSYour Name #define REO_FLUSH_CACHE_2_RELEASE_CACHE_BLOCK_INDEX_OFFSET 0x00000008 328*5113495bSYour Name #define REO_FLUSH_CACHE_2_RELEASE_CACHE_BLOCK_INDEX_LSB 9 329*5113495bSYour Name #define REO_FLUSH_CACHE_2_RELEASE_CACHE_BLOCK_INDEX_MASK 0x00000200 330*5113495bSYour Name 331*5113495bSYour Name /* Description REO_FLUSH_CACHE_2_CACHE_BLOCK_RESOURCE_INDEX 332*5113495bSYour Name 333*5113495bSYour Name Field not valid when Flush_entire_cache is set. 334*5113495bSYour Name 335*5113495bSYour Name 336*5113495bSYour Name 337*5113495bSYour Name Indicates which of the four blocking resources in REO 338*5113495bSYour Name will be assigned for managing the blocking of this 339*5113495bSYour Name (descriptor) address 340*5113495bSYour Name 341*5113495bSYour Name <legal all> 342*5113495bSYour Name */ 343*5113495bSYour Name #define REO_FLUSH_CACHE_2_CACHE_BLOCK_RESOURCE_INDEX_OFFSET 0x00000008 344*5113495bSYour Name #define REO_FLUSH_CACHE_2_CACHE_BLOCK_RESOURCE_INDEX_LSB 10 345*5113495bSYour Name #define REO_FLUSH_CACHE_2_CACHE_BLOCK_RESOURCE_INDEX_MASK 0x00000c00 346*5113495bSYour Name 347*5113495bSYour Name /* Description REO_FLUSH_CACHE_2_FLUSH_WITHOUT_INVALIDATE 348*5113495bSYour Name 349*5113495bSYour Name Field not valid when Flush_entire_cache is set. 350*5113495bSYour Name 351*5113495bSYour Name 352*5113495bSYour Name 353*5113495bSYour Name When set, REO shall flush the cache line contents from 354*5113495bSYour Name the cache, but there is NO need to invalidate the cache line 355*5113495bSYour Name entry... The contents in the cache can be maintained. This 356*5113495bSYour Name feature can be used by SW (and DV) to get a current snapshot 357*5113495bSYour Name of the contents in the cache 358*5113495bSYour Name 359*5113495bSYour Name 360*5113495bSYour Name 361*5113495bSYour Name <legal all> 362*5113495bSYour Name */ 363*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_WITHOUT_INVALIDATE_OFFSET 0x00000008 364*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_WITHOUT_INVALIDATE_LSB 12 365*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_WITHOUT_INVALIDATE_MASK 0x00001000 366*5113495bSYour Name 367*5113495bSYour Name /* Description REO_FLUSH_CACHE_2_BLOCK_CACHE_USAGE_AFTER_FLUSH 368*5113495bSYour Name 369*5113495bSYour Name Field not valid when Flush_entire_cache is set. 370*5113495bSYour Name 371*5113495bSYour Name 372*5113495bSYour Name 373*5113495bSYour Name When set, REO shall block any cache accesses to this 374*5113495bSYour Name address till explicitly unblocked. 375*5113495bSYour Name 376*5113495bSYour Name 377*5113495bSYour Name 378*5113495bSYour Name Whenever SW sets this bit, SW shall also set bit 379*5113495bSYour Name 'Forward_all_mpdus_in_queue' to ensure all packets are 380*5113495bSYour Name flushed out in order to make sure this queue desc is not in 381*5113495bSYour Name one of the aging link lists. In case SW does not want to 382*5113495bSYour Name flush the MPDUs in the queue, see the recipe description 383*5113495bSYour Name below this TLV definition. 384*5113495bSYour Name 385*5113495bSYour Name 386*5113495bSYour Name 387*5113495bSYour Name The 'blocking' index to be used for this is indicated in 388*5113495bSYour Name field 'cache_block_resource_index'. If SW had previously 389*5113495bSYour Name used this blocking resource and was not freed up yet, SW 390*5113495bSYour Name shall first unblock that index (by setting bit 391*5113495bSYour Name Release_cache_block_index) or use an unblock command. 392*5113495bSYour Name 393*5113495bSYour Name 394*5113495bSYour Name 395*5113495bSYour Name If the resource indicated here was already blocked (and 396*5113495bSYour Name did not get unblocked in this command), it is considered an 397*5113495bSYour Name error scenario... 398*5113495bSYour Name 399*5113495bSYour Name No flush shall happen. The status for this command shall 400*5113495bSYour Name indicate error. 401*5113495bSYour Name 402*5113495bSYour Name 403*5113495bSYour Name 404*5113495bSYour Name <legal all> 405*5113495bSYour Name */ 406*5113495bSYour Name #define REO_FLUSH_CACHE_2_BLOCK_CACHE_USAGE_AFTER_FLUSH_OFFSET 0x00000008 407*5113495bSYour Name #define REO_FLUSH_CACHE_2_BLOCK_CACHE_USAGE_AFTER_FLUSH_LSB 13 408*5113495bSYour Name #define REO_FLUSH_CACHE_2_BLOCK_CACHE_USAGE_AFTER_FLUSH_MASK 0x00002000 409*5113495bSYour Name 410*5113495bSYour Name /* Description REO_FLUSH_CACHE_2_FLUSH_ENTIRE_CACHE 411*5113495bSYour Name 412*5113495bSYour Name When set, the entire cache shall be flushed. The entire 413*5113495bSYour Name cache will also remain blocked, till the 414*5113495bSYour Name 'REO_UNBLOCK_COMMAND' is received with bit unblock type set 415*5113495bSYour Name to unblock_cache. All other fields in this command are to be 416*5113495bSYour Name ignored. 417*5113495bSYour Name 418*5113495bSYour Name 419*5113495bSYour Name 420*5113495bSYour Name Note that flushing the entire cache has no changes to 421*5113495bSYour Name the current settings of the blocking resource settings 422*5113495bSYour Name 423*5113495bSYour Name 424*5113495bSYour Name 425*5113495bSYour Name <legal all> 426*5113495bSYour Name */ 427*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ENTIRE_CACHE_OFFSET 0x00000008 428*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ENTIRE_CACHE_LSB 14 429*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ENTIRE_CACHE_MASK 0x00004000 430*5113495bSYour Name 431*5113495bSYour Name /* Description REO_FLUSH_CACHE_2_RESERVED_2B 432*5113495bSYour Name 433*5113495bSYour Name <legal 0> 434*5113495bSYour Name */ 435*5113495bSYour Name #define REO_FLUSH_CACHE_2_RESERVED_2B_OFFSET 0x00000008 436*5113495bSYour Name #define REO_FLUSH_CACHE_2_RESERVED_2B_LSB 15 437*5113495bSYour Name #define REO_FLUSH_CACHE_2_RESERVED_2B_MASK 0xffff8000 438*5113495bSYour Name 439*5113495bSYour Name /* Description REO_FLUSH_CACHE_3_RESERVED_3A 440*5113495bSYour Name 441*5113495bSYour Name <legal 0> 442*5113495bSYour Name */ 443*5113495bSYour Name #define REO_FLUSH_CACHE_3_RESERVED_3A_OFFSET 0x0000000c 444*5113495bSYour Name #define REO_FLUSH_CACHE_3_RESERVED_3A_LSB 0 445*5113495bSYour Name #define REO_FLUSH_CACHE_3_RESERVED_3A_MASK 0xffffffff 446*5113495bSYour Name 447*5113495bSYour Name /* Description REO_FLUSH_CACHE_4_RESERVED_4A 448*5113495bSYour Name 449*5113495bSYour Name <legal 0> 450*5113495bSYour Name */ 451*5113495bSYour Name #define REO_FLUSH_CACHE_4_RESERVED_4A_OFFSET 0x00000010 452*5113495bSYour Name #define REO_FLUSH_CACHE_4_RESERVED_4A_LSB 0 453*5113495bSYour Name #define REO_FLUSH_CACHE_4_RESERVED_4A_MASK 0xffffffff 454*5113495bSYour Name 455*5113495bSYour Name /* Description REO_FLUSH_CACHE_5_RESERVED_5A 456*5113495bSYour Name 457*5113495bSYour Name <legal 0> 458*5113495bSYour Name */ 459*5113495bSYour Name #define REO_FLUSH_CACHE_5_RESERVED_5A_OFFSET 0x00000014 460*5113495bSYour Name #define REO_FLUSH_CACHE_5_RESERVED_5A_LSB 0 461*5113495bSYour Name #define REO_FLUSH_CACHE_5_RESERVED_5A_MASK 0xffffffff 462*5113495bSYour Name 463*5113495bSYour Name /* Description REO_FLUSH_CACHE_6_RESERVED_6A 464*5113495bSYour Name 465*5113495bSYour Name <legal 0> 466*5113495bSYour Name */ 467*5113495bSYour Name #define REO_FLUSH_CACHE_6_RESERVED_6A_OFFSET 0x00000018 468*5113495bSYour Name #define REO_FLUSH_CACHE_6_RESERVED_6A_LSB 0 469*5113495bSYour Name #define REO_FLUSH_CACHE_6_RESERVED_6A_MASK 0xffffffff 470*5113495bSYour Name 471*5113495bSYour Name /* Description REO_FLUSH_CACHE_7_RESERVED_7A 472*5113495bSYour Name 473*5113495bSYour Name <legal 0> 474*5113495bSYour Name */ 475*5113495bSYour Name #define REO_FLUSH_CACHE_7_RESERVED_7A_OFFSET 0x0000001c 476*5113495bSYour Name #define REO_FLUSH_CACHE_7_RESERVED_7A_LSB 0 477*5113495bSYour Name #define REO_FLUSH_CACHE_7_RESERVED_7A_MASK 0xffffffff 478*5113495bSYour Name 479*5113495bSYour Name /* Description REO_FLUSH_CACHE_8_RESERVED_8A 480*5113495bSYour Name 481*5113495bSYour Name <legal 0> 482*5113495bSYour Name */ 483*5113495bSYour Name #define REO_FLUSH_CACHE_8_RESERVED_8A_OFFSET 0x00000020 484*5113495bSYour Name #define REO_FLUSH_CACHE_8_RESERVED_8A_LSB 0 485*5113495bSYour Name #define REO_FLUSH_CACHE_8_RESERVED_8A_MASK 0xffffffff 486*5113495bSYour Name 487*5113495bSYour Name 488*5113495bSYour Name #endif // _REO_FLUSH_CACHE_H_ 489