xref: /wlan-driver/fw-api/hw/qca8074/v1/reo_flush_cache_status.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 // DO NOT EDIT!  This file is automatically generated
20 //               These definitions are tied to a particular hardware layout
21 
22 
23 #ifndef _REO_FLUSH_CACHE_STATUS_H_
24 #define _REO_FLUSH_CACHE_STATUS_H_
25 #if !defined(__ASSEMBLER__)
26 #endif
27 
28 #include "uniform_reo_status_header.h"
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0-1	struct uniform_reo_status_header status_header;
34 //	2	error_detected[0], block_error_details[2:1], reserved_2a[7:3], cache_controller_flush_status_hit[8], cache_controller_flush_status_desc_type[11:9], cache_controller_flush_status_client_id[15:12], cache_controller_flush_status_error[17:16], cache_controller_flush_count[25:18], reserved_2b[31:26]
35 //	3	reserved_3a[31:0]
36 //	4	reserved_4a[31:0]
37 //	5	reserved_5a[31:0]
38 //	6	reserved_6a[31:0]
39 //	7	reserved_7a[31:0]
40 //	8	reserved_8a[31:0]
41 //	9	reserved_9a[31:0]
42 //	10	reserved_10a[31:0]
43 //	11	reserved_11a[31:0]
44 //	12	reserved_12a[31:0]
45 //	13	reserved_13a[31:0]
46 //	14	reserved_14a[31:0]
47 //	15	reserved_15a[31:0]
48 //	16	reserved_16a[31:0]
49 //	17	reserved_17a[31:0]
50 //	18	reserved_18a[31:0]
51 //	19	reserved_19a[31:0]
52 //	20	reserved_20a[31:0]
53 //	21	reserved_21a[31:0]
54 //	22	reserved_22a[31:0]
55 //	23	reserved_23a[31:0]
56 //	24	reserved_24a[27:0], looping_count[31:28]
57 //
58 // ################ END SUMMARY #################
59 
60 #define NUM_OF_DWORDS_REO_FLUSH_CACHE_STATUS 25
61 
62 struct reo_flush_cache_status {
63     struct            uniform_reo_status_header                       status_header;
64              uint32_t error_detected                  :  1, //[0]
65                       block_error_details             :  2, //[2:1]
66                       reserved_2a                     :  5, //[7:3]
67                       cache_controller_flush_status_hit:  1, //[8]
68                       cache_controller_flush_status_desc_type:  3, //[11:9]
69                       cache_controller_flush_status_client_id:  4, //[15:12]
70                       cache_controller_flush_status_error:  2, //[17:16]
71                       cache_controller_flush_count    :  8, //[25:18]
72                       reserved_2b                     :  6; //[31:26]
73              uint32_t reserved_3a                     : 32; //[31:0]
74              uint32_t reserved_4a                     : 32; //[31:0]
75              uint32_t reserved_5a                     : 32; //[31:0]
76              uint32_t reserved_6a                     : 32; //[31:0]
77              uint32_t reserved_7a                     : 32; //[31:0]
78              uint32_t reserved_8a                     : 32; //[31:0]
79              uint32_t reserved_9a                     : 32; //[31:0]
80              uint32_t reserved_10a                    : 32; //[31:0]
81              uint32_t reserved_11a                    : 32; //[31:0]
82              uint32_t reserved_12a                    : 32; //[31:0]
83              uint32_t reserved_13a                    : 32; //[31:0]
84              uint32_t reserved_14a                    : 32; //[31:0]
85              uint32_t reserved_15a                    : 32; //[31:0]
86              uint32_t reserved_16a                    : 32; //[31:0]
87              uint32_t reserved_17a                    : 32; //[31:0]
88              uint32_t reserved_18a                    : 32; //[31:0]
89              uint32_t reserved_19a                    : 32; //[31:0]
90              uint32_t reserved_20a                    : 32; //[31:0]
91              uint32_t reserved_21a                    : 32; //[31:0]
92              uint32_t reserved_22a                    : 32; //[31:0]
93              uint32_t reserved_23a                    : 32; //[31:0]
94              uint32_t reserved_24a                    : 28, //[27:0]
95                       looping_count                   :  4; //[31:28]
96 };
97 
98 /*
99 
100 struct uniform_reo_status_header status_header
101 
102 			Consumer: SW
103 
104 			Producer: REO
105 
106 
107 
108 			Details that can link this status with the original
109 			command. It also contains info on how long REO took to
110 			execute this command.
111 
112 error_detected
113 
114 			Status for blocking resource handling
115 
116 
117 
118 			0: No error has been detected while executing this
119 			command
120 
121 			1: an error in the blocking resource management was
122 			detected
123 
124 			See field 'Block_error_details'
125 
126 block_error_details
127 
128 			Field only valid when 'Error_detected' is set.
129 
130 			0: no blocking related error found
131 
132 			1: blocking resource was already in use
133 
134 			2: resource that was asked to be unblocked, was not
135 			blocked
136 
137 			<legal 0-2>
138 
139 reserved_2a
140 
141 			<legal 0>
142 
143 cache_controller_flush_status_hit
144 
145 			The status that the cache controller returned for
146 			executing the flush command
147 
148 
149 
150 			descriptor hit
151 
152 			1 = hit
153 
154 			0 = miss
155 
156 			<legal all>
157 
158 cache_controller_flush_status_desc_type
159 
160 			The status that the cache controller returned for
161 			executing the flush command
162 
163 			Descriptor type
164 
165 			FLOW_QUEUE_DESCRIPTOR                
166 			3'd0
167 
168 
169 			 <legal all>
170 
171 cache_controller_flush_status_client_id
172 
173 			The status that the cache controller returned for
174 			executing the flush command
175 
176 
177 
178 			client ID
179 
180 			Module who made flush the request
181 
182 
183 
184 			In REO, this is always set to 0
185 
186 			<legal 0>
187 
188 cache_controller_flush_status_error
189 
190 			The status that the cache controller returned for
191 			executing the flush command
192 
193 
194 
195 			Error condition
196 
197 			2'b00: No error found
198 
199 			2'b01: HW IF still busy
200 
201 			2'b10: Line is currently locked. Used for the one line
202 			flush command.
203 
204 			2'b11: At least one line is currently still locked. Used
205 			for the cache flush command.
206 
207 
208 
209 			<legal all>
210 
211 cache_controller_flush_count
212 
213 			The number of lines that were actually flushed out.
214 
215 			<legal all>
216 
217 reserved_2b
218 
219 			<legal 0>
220 
221 reserved_3a
222 
223 			<legal 0>
224 
225 reserved_4a
226 
227 			<legal 0>
228 
229 reserved_5a
230 
231 			<legal 0>
232 
233 reserved_6a
234 
235 			<legal 0>
236 
237 reserved_7a
238 
239 			<legal 0>
240 
241 reserved_8a
242 
243 			<legal 0>
244 
245 reserved_9a
246 
247 			<legal 0>
248 
249 reserved_10a
250 
251 			<legal 0>
252 
253 reserved_11a
254 
255 			<legal 0>
256 
257 reserved_12a
258 
259 			<legal 0>
260 
261 reserved_13a
262 
263 			<legal 0>
264 
265 reserved_14a
266 
267 			<legal 0>
268 
269 reserved_15a
270 
271 			<legal 0>
272 
273 reserved_16a
274 
275 			<legal 0>
276 
277 reserved_17a
278 
279 			<legal 0>
280 
281 reserved_18a
282 
283 			<legal 0>
284 
285 reserved_19a
286 
287 			<legal 0>
288 
289 reserved_20a
290 
291 			<legal 0>
292 
293 reserved_21a
294 
295 			<legal 0>
296 
297 reserved_22a
298 
299 			<legal 0>
300 
301 reserved_23a
302 
303 			<legal 0>
304 
305 reserved_24a
306 
307 			<legal 0>
308 
309 looping_count
310 
311 			A count value that indicates the number of times the
312 			producer of entries into this Ring has looped around the
313 			ring.
314 
315 			At initialization time, this value is set to 0. On the
316 			first loop, this value is set to 1. After the max value is
317 			reached allowed by the number of bits for this field, the
318 			count value continues with 0 again.
319 
320 
321 
322 			In case SW is the consumer of the ring entries, it can
323 			use this field to figure out up to where the producer of
324 			entries has created new entries. This eliminates the need to
325 			check where the head pointer' of the ring is located once
326 			the SW starts processing an interrupt indicating that new
327 			entries have been put into this ring...
328 
329 
330 
331 			Also note that SW if it wants only needs to look at the
332 			LSB bit of this count value.
333 
334 			<legal all>
335 */
336 
337 #define REO_FLUSH_CACHE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000000
338 #define REO_FLUSH_CACHE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28
339 #define REO_FLUSH_CACHE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff
340 #define REO_FLUSH_CACHE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000004
341 #define REO_FLUSH_CACHE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28
342 #define REO_FLUSH_CACHE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff
343 
344 /* Description		REO_FLUSH_CACHE_STATUS_2_ERROR_DETECTED
345 
346 			Status for blocking resource handling
347 
348 
349 
350 			0: No error has been detected while executing this
351 			command
352 
353 			1: an error in the blocking resource management was
354 			detected
355 
356 			See field 'Block_error_details'
357 */
358 #define REO_FLUSH_CACHE_STATUS_2_ERROR_DETECTED_OFFSET               0x00000008
359 #define REO_FLUSH_CACHE_STATUS_2_ERROR_DETECTED_LSB                  0
360 #define REO_FLUSH_CACHE_STATUS_2_ERROR_DETECTED_MASK                 0x00000001
361 
362 /* Description		REO_FLUSH_CACHE_STATUS_2_BLOCK_ERROR_DETAILS
363 
364 			Field only valid when 'Error_detected' is set.
365 
366 			0: no blocking related error found
367 
368 			1: blocking resource was already in use
369 
370 			2: resource that was asked to be unblocked, was not
371 			blocked
372 
373 			<legal 0-2>
374 */
375 #define REO_FLUSH_CACHE_STATUS_2_BLOCK_ERROR_DETAILS_OFFSET          0x00000008
376 #define REO_FLUSH_CACHE_STATUS_2_BLOCK_ERROR_DETAILS_LSB             1
377 #define REO_FLUSH_CACHE_STATUS_2_BLOCK_ERROR_DETAILS_MASK            0x00000006
378 
379 /* Description		REO_FLUSH_CACHE_STATUS_2_RESERVED_2A
380 
381 			<legal 0>
382 */
383 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2A_OFFSET                  0x00000008
384 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2A_LSB                     3
385 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2A_MASK                    0x000000f8
386 
387 /* Description		REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_HIT
388 
389 			The status that the cache controller returned for
390 			executing the flush command
391 
392 
393 
394 			descriptor hit
395 
396 			1 = hit
397 
398 			0 = miss
399 
400 			<legal all>
401 */
402 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_HIT_OFFSET 0x00000008
403 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_HIT_LSB 8
404 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_HIT_MASK 0x00000100
405 
406 /* Description		REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_DESC_TYPE
407 
408 			The status that the cache controller returned for
409 			executing the flush command
410 
411 			Descriptor type
412 
413 			FLOW_QUEUE_DESCRIPTOR                
414 			3'd0
415 
416 
417 			 <legal all>
418 */
419 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_DESC_TYPE_OFFSET 0x00000008
420 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_DESC_TYPE_LSB 9
421 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_DESC_TYPE_MASK 0x00000e00
422 
423 /* Description		REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_CLIENT_ID
424 
425 			The status that the cache controller returned for
426 			executing the flush command
427 
428 
429 
430 			client ID
431 
432 			Module who made flush the request
433 
434 
435 
436 			In REO, this is always set to 0
437 
438 			<legal 0>
439 */
440 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_CLIENT_ID_OFFSET 0x00000008
441 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_CLIENT_ID_LSB 12
442 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_CLIENT_ID_MASK 0x0000f000
443 
444 /* Description		REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_ERROR
445 
446 			The status that the cache controller returned for
447 			executing the flush command
448 
449 
450 
451 			Error condition
452 
453 			2'b00: No error found
454 
455 			2'b01: HW IF still busy
456 
457 			2'b10: Line is currently locked. Used for the one line
458 			flush command.
459 
460 			2'b11: At least one line is currently still locked. Used
461 			for the cache flush command.
462 
463 
464 
465 			<legal all>
466 */
467 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_ERROR_OFFSET 0x00000008
468 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_ERROR_LSB 16
469 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_STATUS_ERROR_MASK 0x00030000
470 
471 /* Description		REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_COUNT
472 
473 			The number of lines that were actually flushed out.
474 
475 			<legal all>
476 */
477 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_COUNT_OFFSET 0x00000008
478 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_COUNT_LSB    18
479 #define REO_FLUSH_CACHE_STATUS_2_CACHE_CONTROLLER_FLUSH_COUNT_MASK   0x03fc0000
480 
481 /* Description		REO_FLUSH_CACHE_STATUS_2_RESERVED_2B
482 
483 			<legal 0>
484 */
485 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2B_OFFSET                  0x00000008
486 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2B_LSB                     26
487 #define REO_FLUSH_CACHE_STATUS_2_RESERVED_2B_MASK                    0xfc000000
488 
489 /* Description		REO_FLUSH_CACHE_STATUS_3_RESERVED_3A
490 
491 			<legal 0>
492 */
493 #define REO_FLUSH_CACHE_STATUS_3_RESERVED_3A_OFFSET                  0x0000000c
494 #define REO_FLUSH_CACHE_STATUS_3_RESERVED_3A_LSB                     0
495 #define REO_FLUSH_CACHE_STATUS_3_RESERVED_3A_MASK                    0xffffffff
496 
497 /* Description		REO_FLUSH_CACHE_STATUS_4_RESERVED_4A
498 
499 			<legal 0>
500 */
501 #define REO_FLUSH_CACHE_STATUS_4_RESERVED_4A_OFFSET                  0x00000010
502 #define REO_FLUSH_CACHE_STATUS_4_RESERVED_4A_LSB                     0
503 #define REO_FLUSH_CACHE_STATUS_4_RESERVED_4A_MASK                    0xffffffff
504 
505 /* Description		REO_FLUSH_CACHE_STATUS_5_RESERVED_5A
506 
507 			<legal 0>
508 */
509 #define REO_FLUSH_CACHE_STATUS_5_RESERVED_5A_OFFSET                  0x00000014
510 #define REO_FLUSH_CACHE_STATUS_5_RESERVED_5A_LSB                     0
511 #define REO_FLUSH_CACHE_STATUS_5_RESERVED_5A_MASK                    0xffffffff
512 
513 /* Description		REO_FLUSH_CACHE_STATUS_6_RESERVED_6A
514 
515 			<legal 0>
516 */
517 #define REO_FLUSH_CACHE_STATUS_6_RESERVED_6A_OFFSET                  0x00000018
518 #define REO_FLUSH_CACHE_STATUS_6_RESERVED_6A_LSB                     0
519 #define REO_FLUSH_CACHE_STATUS_6_RESERVED_6A_MASK                    0xffffffff
520 
521 /* Description		REO_FLUSH_CACHE_STATUS_7_RESERVED_7A
522 
523 			<legal 0>
524 */
525 #define REO_FLUSH_CACHE_STATUS_7_RESERVED_7A_OFFSET                  0x0000001c
526 #define REO_FLUSH_CACHE_STATUS_7_RESERVED_7A_LSB                     0
527 #define REO_FLUSH_CACHE_STATUS_7_RESERVED_7A_MASK                    0xffffffff
528 
529 /* Description		REO_FLUSH_CACHE_STATUS_8_RESERVED_8A
530 
531 			<legal 0>
532 */
533 #define REO_FLUSH_CACHE_STATUS_8_RESERVED_8A_OFFSET                  0x00000020
534 #define REO_FLUSH_CACHE_STATUS_8_RESERVED_8A_LSB                     0
535 #define REO_FLUSH_CACHE_STATUS_8_RESERVED_8A_MASK                    0xffffffff
536 
537 /* Description		REO_FLUSH_CACHE_STATUS_9_RESERVED_9A
538 
539 			<legal 0>
540 */
541 #define REO_FLUSH_CACHE_STATUS_9_RESERVED_9A_OFFSET                  0x00000024
542 #define REO_FLUSH_CACHE_STATUS_9_RESERVED_9A_LSB                     0
543 #define REO_FLUSH_CACHE_STATUS_9_RESERVED_9A_MASK                    0xffffffff
544 
545 /* Description		REO_FLUSH_CACHE_STATUS_10_RESERVED_10A
546 
547 			<legal 0>
548 */
549 #define REO_FLUSH_CACHE_STATUS_10_RESERVED_10A_OFFSET                0x00000028
550 #define REO_FLUSH_CACHE_STATUS_10_RESERVED_10A_LSB                   0
551 #define REO_FLUSH_CACHE_STATUS_10_RESERVED_10A_MASK                  0xffffffff
552 
553 /* Description		REO_FLUSH_CACHE_STATUS_11_RESERVED_11A
554 
555 			<legal 0>
556 */
557 #define REO_FLUSH_CACHE_STATUS_11_RESERVED_11A_OFFSET                0x0000002c
558 #define REO_FLUSH_CACHE_STATUS_11_RESERVED_11A_LSB                   0
559 #define REO_FLUSH_CACHE_STATUS_11_RESERVED_11A_MASK                  0xffffffff
560 
561 /* Description		REO_FLUSH_CACHE_STATUS_12_RESERVED_12A
562 
563 			<legal 0>
564 */
565 #define REO_FLUSH_CACHE_STATUS_12_RESERVED_12A_OFFSET                0x00000030
566 #define REO_FLUSH_CACHE_STATUS_12_RESERVED_12A_LSB                   0
567 #define REO_FLUSH_CACHE_STATUS_12_RESERVED_12A_MASK                  0xffffffff
568 
569 /* Description		REO_FLUSH_CACHE_STATUS_13_RESERVED_13A
570 
571 			<legal 0>
572 */
573 #define REO_FLUSH_CACHE_STATUS_13_RESERVED_13A_OFFSET                0x00000034
574 #define REO_FLUSH_CACHE_STATUS_13_RESERVED_13A_LSB                   0
575 #define REO_FLUSH_CACHE_STATUS_13_RESERVED_13A_MASK                  0xffffffff
576 
577 /* Description		REO_FLUSH_CACHE_STATUS_14_RESERVED_14A
578 
579 			<legal 0>
580 */
581 #define REO_FLUSH_CACHE_STATUS_14_RESERVED_14A_OFFSET                0x00000038
582 #define REO_FLUSH_CACHE_STATUS_14_RESERVED_14A_LSB                   0
583 #define REO_FLUSH_CACHE_STATUS_14_RESERVED_14A_MASK                  0xffffffff
584 
585 /* Description		REO_FLUSH_CACHE_STATUS_15_RESERVED_15A
586 
587 			<legal 0>
588 */
589 #define REO_FLUSH_CACHE_STATUS_15_RESERVED_15A_OFFSET                0x0000003c
590 #define REO_FLUSH_CACHE_STATUS_15_RESERVED_15A_LSB                   0
591 #define REO_FLUSH_CACHE_STATUS_15_RESERVED_15A_MASK                  0xffffffff
592 
593 /* Description		REO_FLUSH_CACHE_STATUS_16_RESERVED_16A
594 
595 			<legal 0>
596 */
597 #define REO_FLUSH_CACHE_STATUS_16_RESERVED_16A_OFFSET                0x00000040
598 #define REO_FLUSH_CACHE_STATUS_16_RESERVED_16A_LSB                   0
599 #define REO_FLUSH_CACHE_STATUS_16_RESERVED_16A_MASK                  0xffffffff
600 
601 /* Description		REO_FLUSH_CACHE_STATUS_17_RESERVED_17A
602 
603 			<legal 0>
604 */
605 #define REO_FLUSH_CACHE_STATUS_17_RESERVED_17A_OFFSET                0x00000044
606 #define REO_FLUSH_CACHE_STATUS_17_RESERVED_17A_LSB                   0
607 #define REO_FLUSH_CACHE_STATUS_17_RESERVED_17A_MASK                  0xffffffff
608 
609 /* Description		REO_FLUSH_CACHE_STATUS_18_RESERVED_18A
610 
611 			<legal 0>
612 */
613 #define REO_FLUSH_CACHE_STATUS_18_RESERVED_18A_OFFSET                0x00000048
614 #define REO_FLUSH_CACHE_STATUS_18_RESERVED_18A_LSB                   0
615 #define REO_FLUSH_CACHE_STATUS_18_RESERVED_18A_MASK                  0xffffffff
616 
617 /* Description		REO_FLUSH_CACHE_STATUS_19_RESERVED_19A
618 
619 			<legal 0>
620 */
621 #define REO_FLUSH_CACHE_STATUS_19_RESERVED_19A_OFFSET                0x0000004c
622 #define REO_FLUSH_CACHE_STATUS_19_RESERVED_19A_LSB                   0
623 #define REO_FLUSH_CACHE_STATUS_19_RESERVED_19A_MASK                  0xffffffff
624 
625 /* Description		REO_FLUSH_CACHE_STATUS_20_RESERVED_20A
626 
627 			<legal 0>
628 */
629 #define REO_FLUSH_CACHE_STATUS_20_RESERVED_20A_OFFSET                0x00000050
630 #define REO_FLUSH_CACHE_STATUS_20_RESERVED_20A_LSB                   0
631 #define REO_FLUSH_CACHE_STATUS_20_RESERVED_20A_MASK                  0xffffffff
632 
633 /* Description		REO_FLUSH_CACHE_STATUS_21_RESERVED_21A
634 
635 			<legal 0>
636 */
637 #define REO_FLUSH_CACHE_STATUS_21_RESERVED_21A_OFFSET                0x00000054
638 #define REO_FLUSH_CACHE_STATUS_21_RESERVED_21A_LSB                   0
639 #define REO_FLUSH_CACHE_STATUS_21_RESERVED_21A_MASK                  0xffffffff
640 
641 /* Description		REO_FLUSH_CACHE_STATUS_22_RESERVED_22A
642 
643 			<legal 0>
644 */
645 #define REO_FLUSH_CACHE_STATUS_22_RESERVED_22A_OFFSET                0x00000058
646 #define REO_FLUSH_CACHE_STATUS_22_RESERVED_22A_LSB                   0
647 #define REO_FLUSH_CACHE_STATUS_22_RESERVED_22A_MASK                  0xffffffff
648 
649 /* Description		REO_FLUSH_CACHE_STATUS_23_RESERVED_23A
650 
651 			<legal 0>
652 */
653 #define REO_FLUSH_CACHE_STATUS_23_RESERVED_23A_OFFSET                0x0000005c
654 #define REO_FLUSH_CACHE_STATUS_23_RESERVED_23A_LSB                   0
655 #define REO_FLUSH_CACHE_STATUS_23_RESERVED_23A_MASK                  0xffffffff
656 
657 /* Description		REO_FLUSH_CACHE_STATUS_24_RESERVED_24A
658 
659 			<legal 0>
660 */
661 #define REO_FLUSH_CACHE_STATUS_24_RESERVED_24A_OFFSET                0x00000060
662 #define REO_FLUSH_CACHE_STATUS_24_RESERVED_24A_LSB                   0
663 #define REO_FLUSH_CACHE_STATUS_24_RESERVED_24A_MASK                  0x0fffffff
664 
665 /* Description		REO_FLUSH_CACHE_STATUS_24_LOOPING_COUNT
666 
667 			A count value that indicates the number of times the
668 			producer of entries into this Ring has looped around the
669 			ring.
670 
671 			At initialization time, this value is set to 0. On the
672 			first loop, this value is set to 1. After the max value is
673 			reached allowed by the number of bits for this field, the
674 			count value continues with 0 again.
675 
676 
677 
678 			In case SW is the consumer of the ring entries, it can
679 			use this field to figure out up to where the producer of
680 			entries has created new entries. This eliminates the need to
681 			check where the head pointer' of the ring is located once
682 			the SW starts processing an interrupt indicating that new
683 			entries have been put into this ring...
684 
685 
686 
687 			Also note that SW if it wants only needs to look at the
688 			LSB bit of this count value.
689 
690 			<legal all>
691 */
692 #define REO_FLUSH_CACHE_STATUS_24_LOOPING_COUNT_OFFSET               0x00000060
693 #define REO_FLUSH_CACHE_STATUS_24_LOOPING_COUNT_LSB                  28
694 #define REO_FLUSH_CACHE_STATUS_24_LOOPING_COUNT_MASK                 0xf0000000
695 
696 
697 #endif // _REO_FLUSH_CACHE_STATUS_H_
698