xref: /wlan-driver/fw-api/hw/qca8074/v1/reo_flush_queue_status.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 // DO NOT EDIT!  This file is automatically generated
20 //               These definitions are tied to a particular hardware layout
21 
22 
23 #ifndef _REO_FLUSH_QUEUE_STATUS_H_
24 #define _REO_FLUSH_QUEUE_STATUS_H_
25 #if !defined(__ASSEMBLER__)
26 #endif
27 
28 #include "uniform_reo_status_header.h"
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0-1	struct uniform_reo_status_header status_header;
34 //	2	error_detected[0], reserved_2a[31:1]
35 //	3	reserved_3a[31:0]
36 //	4	reserved_4a[31:0]
37 //	5	reserved_5a[31:0]
38 //	6	reserved_6a[31:0]
39 //	7	reserved_7a[31:0]
40 //	8	reserved_8a[31:0]
41 //	9	reserved_9a[31:0]
42 //	10	reserved_10a[31:0]
43 //	11	reserved_11a[31:0]
44 //	12	reserved_12a[31:0]
45 //	13	reserved_13a[31:0]
46 //	14	reserved_14a[31:0]
47 //	15	reserved_15a[31:0]
48 //	16	reserved_16a[31:0]
49 //	17	reserved_17a[31:0]
50 //	18	reserved_18a[31:0]
51 //	19	reserved_19a[31:0]
52 //	20	reserved_20a[31:0]
53 //	21	reserved_21a[31:0]
54 //	22	reserved_22a[31:0]
55 //	23	reserved_23a[31:0]
56 //	24	reserved_24a[27:0], looping_count[31:28]
57 //
58 // ################ END SUMMARY #################
59 
60 #define NUM_OF_DWORDS_REO_FLUSH_QUEUE_STATUS 25
61 
62 struct reo_flush_queue_status {
63     struct            uniform_reo_status_header                       status_header;
64              uint32_t error_detected                  :  1, //[0]
65                       reserved_2a                     : 31; //[31:1]
66              uint32_t reserved_3a                     : 32; //[31:0]
67              uint32_t reserved_4a                     : 32; //[31:0]
68              uint32_t reserved_5a                     : 32; //[31:0]
69              uint32_t reserved_6a                     : 32; //[31:0]
70              uint32_t reserved_7a                     : 32; //[31:0]
71              uint32_t reserved_8a                     : 32; //[31:0]
72              uint32_t reserved_9a                     : 32; //[31:0]
73              uint32_t reserved_10a                    : 32; //[31:0]
74              uint32_t reserved_11a                    : 32; //[31:0]
75              uint32_t reserved_12a                    : 32; //[31:0]
76              uint32_t reserved_13a                    : 32; //[31:0]
77              uint32_t reserved_14a                    : 32; //[31:0]
78              uint32_t reserved_15a                    : 32; //[31:0]
79              uint32_t reserved_16a                    : 32; //[31:0]
80              uint32_t reserved_17a                    : 32; //[31:0]
81              uint32_t reserved_18a                    : 32; //[31:0]
82              uint32_t reserved_19a                    : 32; //[31:0]
83              uint32_t reserved_20a                    : 32; //[31:0]
84              uint32_t reserved_21a                    : 32; //[31:0]
85              uint32_t reserved_22a                    : 32; //[31:0]
86              uint32_t reserved_23a                    : 32; //[31:0]
87              uint32_t reserved_24a                    : 28, //[27:0]
88                       looping_count                   :  4; //[31:28]
89 };
90 
91 /*
92 
93 struct uniform_reo_status_header status_header
94 
95 			Consumer: SW
96 
97 			Producer: REO
98 
99 
100 
101 			Details that can link this status with the original
102 			command. It also contains info on how long REO took to
103 			execute this command.
104 
105 error_detected
106 
107 			Status of the blocking resource
108 
109 			0: No error has been detected while executing this
110 			command
111 
112 			1: Error detected: The resource to be used for blocking
113 			was already in use.
114 
115 reserved_2a
116 
117 			<legal 0>
118 
119 reserved_3a
120 
121 			<legal 0>
122 
123 reserved_4a
124 
125 			<legal 0>
126 
127 reserved_5a
128 
129 			<legal 0>
130 
131 reserved_6a
132 
133 			<legal 0>
134 
135 reserved_7a
136 
137 			<legal 0>
138 
139 reserved_8a
140 
141 			<legal 0>
142 
143 reserved_9a
144 
145 			<legal 0>
146 
147 reserved_10a
148 
149 			<legal 0>
150 
151 reserved_11a
152 
153 			<legal 0>
154 
155 reserved_12a
156 
157 			<legal 0>
158 
159 reserved_13a
160 
161 			<legal 0>
162 
163 reserved_14a
164 
165 			<legal 0>
166 
167 reserved_15a
168 
169 			<legal 0>
170 
171 reserved_16a
172 
173 			<legal 0>
174 
175 reserved_17a
176 
177 			<legal 0>
178 
179 reserved_18a
180 
181 			<legal 0>
182 
183 reserved_19a
184 
185 			<legal 0>
186 
187 reserved_20a
188 
189 			<legal 0>
190 
191 reserved_21a
192 
193 			<legal 0>
194 
195 reserved_22a
196 
197 			<legal 0>
198 
199 reserved_23a
200 
201 			<legal 0>
202 
203 reserved_24a
204 
205 			<legal 0>
206 
207 looping_count
208 
209 			A count value that indicates the number of times the
210 			producer of entries into this Ring has looped around the
211 			ring.
212 
213 			At initialization time, this value is set to 0. On the
214 			first loop, this value is set to 1. After the max value is
215 			reached allowed by the number of bits for this field, the
216 			count value continues with 0 again.
217 
218 
219 
220 			In case SW is the consumer of the ring entries, it can
221 			use this field to figure out up to where the producer of
222 			entries has created new entries. This eliminates the need to
223 			check where the head pointer' of the ring is located once
224 			the SW starts processing an interrupt indicating that new
225 			entries have been put into this ring...
226 
227 
228 
229 			Also note that SW if it wants only needs to look at the
230 			LSB bit of this count value.
231 
232 			<legal all>
233 */
234 
235 #define REO_FLUSH_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000000
236 #define REO_FLUSH_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28
237 #define REO_FLUSH_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff
238 #define REO_FLUSH_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000004
239 #define REO_FLUSH_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28
240 #define REO_FLUSH_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff
241 
242 /* Description		REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED
243 
244 			Status of the blocking resource
245 
246 			0: No error has been detected while executing this
247 			command
248 
249 			1: Error detected: The resource to be used for blocking
250 			was already in use.
251 */
252 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_OFFSET               0x00000008
253 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_LSB                  0
254 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_MASK                 0x00000001
255 
256 /* Description		REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A
257 
258 			<legal 0>
259 */
260 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_OFFSET                  0x00000008
261 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_LSB                     1
262 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_MASK                    0xfffffffe
263 
264 /* Description		REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A
265 
266 			<legal 0>
267 */
268 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_OFFSET                  0x0000000c
269 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_LSB                     0
270 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_MASK                    0xffffffff
271 
272 /* Description		REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A
273 
274 			<legal 0>
275 */
276 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_OFFSET                  0x00000010
277 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_LSB                     0
278 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_MASK                    0xffffffff
279 
280 /* Description		REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A
281 
282 			<legal 0>
283 */
284 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_OFFSET                  0x00000014
285 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_LSB                     0
286 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_MASK                    0xffffffff
287 
288 /* Description		REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A
289 
290 			<legal 0>
291 */
292 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_OFFSET                  0x00000018
293 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_LSB                     0
294 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_MASK                    0xffffffff
295 
296 /* Description		REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A
297 
298 			<legal 0>
299 */
300 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_OFFSET                  0x0000001c
301 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_LSB                     0
302 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_MASK                    0xffffffff
303 
304 /* Description		REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A
305 
306 			<legal 0>
307 */
308 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_OFFSET                  0x00000020
309 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_LSB                     0
310 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_MASK                    0xffffffff
311 
312 /* Description		REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A
313 
314 			<legal 0>
315 */
316 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_OFFSET                  0x00000024
317 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_LSB                     0
318 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_MASK                    0xffffffff
319 
320 /* Description		REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A
321 
322 			<legal 0>
323 */
324 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_OFFSET                0x00000028
325 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_LSB                   0
326 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_MASK                  0xffffffff
327 
328 /* Description		REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A
329 
330 			<legal 0>
331 */
332 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_OFFSET                0x0000002c
333 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_LSB                   0
334 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_MASK                  0xffffffff
335 
336 /* Description		REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A
337 
338 			<legal 0>
339 */
340 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_OFFSET                0x00000030
341 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_LSB                   0
342 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_MASK                  0xffffffff
343 
344 /* Description		REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A
345 
346 			<legal 0>
347 */
348 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_OFFSET                0x00000034
349 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_LSB                   0
350 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_MASK                  0xffffffff
351 
352 /* Description		REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A
353 
354 			<legal 0>
355 */
356 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_OFFSET                0x00000038
357 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_LSB                   0
358 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_MASK                  0xffffffff
359 
360 /* Description		REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A
361 
362 			<legal 0>
363 */
364 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_OFFSET                0x0000003c
365 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_LSB                   0
366 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_MASK                  0xffffffff
367 
368 /* Description		REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A
369 
370 			<legal 0>
371 */
372 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_OFFSET                0x00000040
373 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_LSB                   0
374 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_MASK                  0xffffffff
375 
376 /* Description		REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A
377 
378 			<legal 0>
379 */
380 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_OFFSET                0x00000044
381 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_LSB                   0
382 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_MASK                  0xffffffff
383 
384 /* Description		REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A
385 
386 			<legal 0>
387 */
388 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_OFFSET                0x00000048
389 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_LSB                   0
390 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_MASK                  0xffffffff
391 
392 /* Description		REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A
393 
394 			<legal 0>
395 */
396 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_OFFSET                0x0000004c
397 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_LSB                   0
398 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_MASK                  0xffffffff
399 
400 /* Description		REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A
401 
402 			<legal 0>
403 */
404 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_OFFSET                0x00000050
405 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_LSB                   0
406 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_MASK                  0xffffffff
407 
408 /* Description		REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A
409 
410 			<legal 0>
411 */
412 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_OFFSET                0x00000054
413 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_LSB                   0
414 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_MASK                  0xffffffff
415 
416 /* Description		REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A
417 
418 			<legal 0>
419 */
420 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_OFFSET                0x00000058
421 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_LSB                   0
422 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_MASK                  0xffffffff
423 
424 /* Description		REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A
425 
426 			<legal 0>
427 */
428 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_OFFSET                0x0000005c
429 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_LSB                   0
430 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_MASK                  0xffffffff
431 
432 /* Description		REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A
433 
434 			<legal 0>
435 */
436 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_OFFSET                0x00000060
437 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_LSB                   0
438 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_MASK                  0x0fffffff
439 
440 /* Description		REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT
441 
442 			A count value that indicates the number of times the
443 			producer of entries into this Ring has looped around the
444 			ring.
445 
446 			At initialization time, this value is set to 0. On the
447 			first loop, this value is set to 1. After the max value is
448 			reached allowed by the number of bits for this field, the
449 			count value continues with 0 again.
450 
451 
452 
453 			In case SW is the consumer of the ring entries, it can
454 			use this field to figure out up to where the producer of
455 			entries has created new entries. This eliminates the need to
456 			check where the head pointer' of the ring is located once
457 			the SW starts processing an interrupt indicating that new
458 			entries have been put into this ring...
459 
460 
461 
462 			Also note that SW if it wants only needs to look at the
463 			LSB bit of this count value.
464 
465 			<legal all>
466 */
467 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_OFFSET               0x00000060
468 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_LSB                  28
469 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_MASK                 0xf0000000
470 
471 
472 #endif // _REO_FLUSH_QUEUE_STATUS_H_
473