xref: /wlan-driver/fw-api/hw/qca8074/v1/reo_flush_timeout_list_status.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 // DO NOT EDIT!  This file is automatically generated
20 //               These definitions are tied to a particular hardware layout
21 
22 
23 #ifndef _REO_FLUSH_TIMEOUT_LIST_STATUS_H_
24 #define _REO_FLUSH_TIMEOUT_LIST_STATUS_H_
25 #if !defined(__ASSEMBLER__)
26 #endif
27 
28 #include "uniform_reo_status_header.h"
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0-1	struct uniform_reo_status_header status_header;
34 //	2	error_detected[0], timout_list_empty[1], reserved_2a[31:2]
35 //	3	release_desc_count[15:0], forward_buf_count[31:16]
36 //	4	reserved_4a[31:0]
37 //	5	reserved_5a[31:0]
38 //	6	reserved_6a[31:0]
39 //	7	reserved_7a[31:0]
40 //	8	reserved_8a[31:0]
41 //	9	reserved_9a[31:0]
42 //	10	reserved_10a[31:0]
43 //	11	reserved_11a[31:0]
44 //	12	reserved_12a[31:0]
45 //	13	reserved_13a[31:0]
46 //	14	reserved_14a[31:0]
47 //	15	reserved_15a[31:0]
48 //	16	reserved_16a[31:0]
49 //	17	reserved_17a[31:0]
50 //	18	reserved_18a[31:0]
51 //	19	reserved_19a[31:0]
52 //	20	reserved_20a[31:0]
53 //	21	reserved_21a[31:0]
54 //	22	reserved_22a[31:0]
55 //	23	reserved_23a[31:0]
56 //	24	reserved_24a[27:0], looping_count[31:28]
57 //
58 // ################ END SUMMARY #################
59 
60 #define NUM_OF_DWORDS_REO_FLUSH_TIMEOUT_LIST_STATUS 25
61 
62 struct reo_flush_timeout_list_status {
63     struct            uniform_reo_status_header                       status_header;
64              uint32_t error_detected                  :  1, //[0]
65                       timout_list_empty               :  1, //[1]
66                       reserved_2a                     : 30; //[31:2]
67              uint32_t release_desc_count              : 16, //[15:0]
68                       forward_buf_count               : 16; //[31:16]
69              uint32_t reserved_4a                     : 32; //[31:0]
70              uint32_t reserved_5a                     : 32; //[31:0]
71              uint32_t reserved_6a                     : 32; //[31:0]
72              uint32_t reserved_7a                     : 32; //[31:0]
73              uint32_t reserved_8a                     : 32; //[31:0]
74              uint32_t reserved_9a                     : 32; //[31:0]
75              uint32_t reserved_10a                    : 32; //[31:0]
76              uint32_t reserved_11a                    : 32; //[31:0]
77              uint32_t reserved_12a                    : 32; //[31:0]
78              uint32_t reserved_13a                    : 32; //[31:0]
79              uint32_t reserved_14a                    : 32; //[31:0]
80              uint32_t reserved_15a                    : 32; //[31:0]
81              uint32_t reserved_16a                    : 32; //[31:0]
82              uint32_t reserved_17a                    : 32; //[31:0]
83              uint32_t reserved_18a                    : 32; //[31:0]
84              uint32_t reserved_19a                    : 32; //[31:0]
85              uint32_t reserved_20a                    : 32; //[31:0]
86              uint32_t reserved_21a                    : 32; //[31:0]
87              uint32_t reserved_22a                    : 32; //[31:0]
88              uint32_t reserved_23a                    : 32; //[31:0]
89              uint32_t reserved_24a                    : 28, //[27:0]
90                       looping_count                   :  4; //[31:28]
91 };
92 
93 /*
94 
95 struct uniform_reo_status_header status_header
96 
97 			Consumer: SW
98 
99 			Producer: REO
100 
101 
102 
103 			Details that can link this status with the original
104 			command. It also contains info on how long REO took to
105 			execute this command.
106 
107 error_detected
108 
109 			0: No error has been detected while executing this
110 			command
111 
112 			1: command not properly executed and returned with an
113 			error
114 
115 
116 
117 			NOTE: Current no error is defined, but field is put in
118 			place to avoid data structure changes in future...
119 
120 timout_list_empty
121 
122 			When set, REO has depleted the timeout list and all
123 			entries are gone.
124 
125 			<legal all>
126 
127 reserved_2a
128 
129 			<legal 0>
130 
131 release_desc_count
132 
133 			Consumer: REO
134 
135 			Producer: SW
136 
137 
138 
139 			The number of link descriptors released
140 
141 			<legal all>
142 
143 forward_buf_count
144 
145 			Consumer: REO
146 
147 			Producer: SW
148 
149 
150 
151 			The number of buffers forwarded to the REO destination
152 			rings
153 
154 			<legal all>
155 
156 reserved_4a
157 
158 			<legal 0>
159 
160 reserved_5a
161 
162 			<legal 0>
163 
164 reserved_6a
165 
166 			<legal 0>
167 
168 reserved_7a
169 
170 			<legal 0>
171 
172 reserved_8a
173 
174 			<legal 0>
175 
176 reserved_9a
177 
178 			<legal 0>
179 
180 reserved_10a
181 
182 			<legal 0>
183 
184 reserved_11a
185 
186 			<legal 0>
187 
188 reserved_12a
189 
190 			<legal 0>
191 
192 reserved_13a
193 
194 			<legal 0>
195 
196 reserved_14a
197 
198 			<legal 0>
199 
200 reserved_15a
201 
202 			<legal 0>
203 
204 reserved_16a
205 
206 			<legal 0>
207 
208 reserved_17a
209 
210 			<legal 0>
211 
212 reserved_18a
213 
214 			<legal 0>
215 
216 reserved_19a
217 
218 			<legal 0>
219 
220 reserved_20a
221 
222 			<legal 0>
223 
224 reserved_21a
225 
226 			<legal 0>
227 
228 reserved_22a
229 
230 			<legal 0>
231 
232 reserved_23a
233 
234 			<legal 0>
235 
236 reserved_24a
237 
238 			<legal 0>
239 
240 looping_count
241 
242 			A count value that indicates the number of times the
243 			producer of entries into this Ring has looped around the
244 			ring.
245 
246 			At initialization time, this value is set to 0. On the
247 			first loop, this value is set to 1. After the max value is
248 			reached allowed by the number of bits for this field, the
249 			count value continues with 0 again.
250 
251 
252 
253 			In case SW is the consumer of the ring entries, it can
254 			use this field to figure out up to where the producer of
255 			entries has created new entries. This eliminates the need to
256 			check where the head pointer' of the ring is located once
257 			the SW starts processing an interrupt indicating that new
258 			entries have been put into this ring...
259 
260 
261 
262 			Also note that SW if it wants only needs to look at the
263 			LSB bit of this count value.
264 
265 			<legal all>
266 */
267 
268 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000000
269 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28
270 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff
271 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000004
272 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28
273 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff
274 
275 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED
276 
277 			0: No error has been detected while executing this
278 			command
279 
280 			1: command not properly executed and returned with an
281 			error
282 
283 
284 
285 			NOTE: Current no error is defined, but field is put in
286 			place to avoid data structure changes in future...
287 */
288 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_OFFSET        0x00000008
289 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_LSB           0
290 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_MASK          0x00000001
291 
292 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY
293 
294 			When set, REO has depleted the timeout list and all
295 			entries are gone.
296 
297 			<legal all>
298 */
299 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_OFFSET     0x00000008
300 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_LSB        1
301 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_MASK       0x00000002
302 
303 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A
304 
305 			<legal 0>
306 */
307 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_OFFSET           0x00000008
308 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_LSB              2
309 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_MASK             0xfffffffc
310 
311 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT
312 
313 			Consumer: REO
314 
315 			Producer: SW
316 
317 
318 
319 			The number of link descriptors released
320 
321 			<legal all>
322 */
323 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_OFFSET    0x0000000c
324 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_LSB       0
325 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_MASK      0x0000ffff
326 
327 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT
328 
329 			Consumer: REO
330 
331 			Producer: SW
332 
333 
334 
335 			The number of buffers forwarded to the REO destination
336 			rings
337 
338 			<legal all>
339 */
340 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_OFFSET     0x0000000c
341 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_LSB        16
342 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_MASK       0xffff0000
343 
344 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A
345 
346 			<legal 0>
347 */
348 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_OFFSET           0x00000010
349 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_LSB              0
350 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_MASK             0xffffffff
351 
352 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A
353 
354 			<legal 0>
355 */
356 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_OFFSET           0x00000014
357 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_LSB              0
358 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_MASK             0xffffffff
359 
360 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A
361 
362 			<legal 0>
363 */
364 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_OFFSET           0x00000018
365 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_LSB              0
366 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_MASK             0xffffffff
367 
368 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A
369 
370 			<legal 0>
371 */
372 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_OFFSET           0x0000001c
373 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_LSB              0
374 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_MASK             0xffffffff
375 
376 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A
377 
378 			<legal 0>
379 */
380 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_OFFSET           0x00000020
381 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_LSB              0
382 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_MASK             0xffffffff
383 
384 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A
385 
386 			<legal 0>
387 */
388 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_OFFSET           0x00000024
389 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_LSB              0
390 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_MASK             0xffffffff
391 
392 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A
393 
394 			<legal 0>
395 */
396 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_OFFSET         0x00000028
397 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_LSB            0
398 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_MASK           0xffffffff
399 
400 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A
401 
402 			<legal 0>
403 */
404 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_OFFSET         0x0000002c
405 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_LSB            0
406 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_MASK           0xffffffff
407 
408 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A
409 
410 			<legal 0>
411 */
412 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_OFFSET         0x00000030
413 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_LSB            0
414 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_MASK           0xffffffff
415 
416 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A
417 
418 			<legal 0>
419 */
420 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_OFFSET         0x00000034
421 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_LSB            0
422 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_MASK           0xffffffff
423 
424 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A
425 
426 			<legal 0>
427 */
428 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_OFFSET         0x00000038
429 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_LSB            0
430 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_MASK           0xffffffff
431 
432 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A
433 
434 			<legal 0>
435 */
436 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_OFFSET         0x0000003c
437 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_LSB            0
438 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_MASK           0xffffffff
439 
440 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A
441 
442 			<legal 0>
443 */
444 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_OFFSET         0x00000040
445 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_LSB            0
446 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_MASK           0xffffffff
447 
448 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A
449 
450 			<legal 0>
451 */
452 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_OFFSET         0x00000044
453 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_LSB            0
454 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_MASK           0xffffffff
455 
456 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A
457 
458 			<legal 0>
459 */
460 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_OFFSET         0x00000048
461 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_LSB            0
462 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_MASK           0xffffffff
463 
464 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A
465 
466 			<legal 0>
467 */
468 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_OFFSET         0x0000004c
469 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_LSB            0
470 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_MASK           0xffffffff
471 
472 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A
473 
474 			<legal 0>
475 */
476 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_OFFSET         0x00000050
477 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_LSB            0
478 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_MASK           0xffffffff
479 
480 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A
481 
482 			<legal 0>
483 */
484 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_OFFSET         0x00000054
485 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_LSB            0
486 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_MASK           0xffffffff
487 
488 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A
489 
490 			<legal 0>
491 */
492 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_OFFSET         0x00000058
493 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_LSB            0
494 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_MASK           0xffffffff
495 
496 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A
497 
498 			<legal 0>
499 */
500 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_OFFSET         0x0000005c
501 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_LSB            0
502 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_MASK           0xffffffff
503 
504 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A
505 
506 			<legal 0>
507 */
508 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_OFFSET         0x00000060
509 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_LSB            0
510 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_MASK           0x0fffffff
511 
512 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT
513 
514 			A count value that indicates the number of times the
515 			producer of entries into this Ring has looped around the
516 			ring.
517 
518 			At initialization time, this value is set to 0. On the
519 			first loop, this value is set to 1. After the max value is
520 			reached allowed by the number of bits for this field, the
521 			count value continues with 0 again.
522 
523 
524 
525 			In case SW is the consumer of the ring entries, it can
526 			use this field to figure out up to where the producer of
527 			entries has created new entries. This eliminates the need to
528 			check where the head pointer' of the ring is located once
529 			the SW starts processing an interrupt indicating that new
530 			entries have been put into this ring...
531 
532 
533 
534 			Also note that SW if it wants only needs to look at the
535 			LSB bit of this count value.
536 
537 			<legal all>
538 */
539 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_OFFSET        0x00000060
540 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_LSB           28
541 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_MASK          0xf0000000
542 
543 
544 #endif // _REO_FLUSH_TIMEOUT_LIST_STATUS_H_
545