1 /* 2 * Copyright (c) 2016 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // $ATH_LICENSE_HW_HDR_C$ 20 // 21 // DO NOT EDIT! This file is automatically generated 22 // These definitions are tied to a particular hardware layout 23 24 25 #ifndef _REO_GET_QUEUE_STATS_H_ 26 #define _REO_GET_QUEUE_STATS_H_ 27 #if !defined(__ASSEMBLER__) 28 #endif 29 30 #include "uniform_reo_cmd_header.h" 31 32 // ################ START SUMMARY ################# 33 // 34 // Dword Fields 35 // 0 struct uniform_reo_cmd_header cmd_header; 36 // 1 rx_reo_queue_desc_addr_31_0[31:0] 37 // 2 rx_reo_queue_desc_addr_39_32[7:0], clear_stats[8], reserved_2a[31:9] 38 // 3 reserved_3a[31:0] 39 // 4 reserved_4a[31:0] 40 // 5 reserved_5a[31:0] 41 // 6 reserved_6a[31:0] 42 // 7 reserved_7a[31:0] 43 // 8 reserved_8a[31:0] 44 // 45 // ################ END SUMMARY ################# 46 47 #define NUM_OF_DWORDS_REO_GET_QUEUE_STATS 9 48 49 struct reo_get_queue_stats { 50 struct uniform_reo_cmd_header cmd_header; 51 uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0] 52 uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0] 53 clear_stats : 1, //[8] 54 reserved_2a : 23; //[31:9] 55 uint32_t reserved_3a : 32; //[31:0] 56 uint32_t reserved_4a : 32; //[31:0] 57 uint32_t reserved_5a : 32; //[31:0] 58 uint32_t reserved_6a : 32; //[31:0] 59 uint32_t reserved_7a : 32; //[31:0] 60 uint32_t reserved_8a : 32; //[31:0] 61 }; 62 63 /* 64 65 struct uniform_reo_cmd_header cmd_header 66 67 Consumer: REO 68 69 Producer: SW 70 71 72 73 Details for command execution tracking purposes. 74 75 rx_reo_queue_desc_addr_31_0 76 77 Consumer: REO 78 79 Producer: SW 80 81 82 83 Address (lower 32 bits) of the REO queue descriptor 84 85 <legal all> 86 87 rx_reo_queue_desc_addr_39_32 88 89 Consumer: REO 90 91 Producer: SW 92 93 94 95 Address (upper 8 bits) of the REO queue descriptor 96 97 <legal all> 98 99 clear_stats 100 101 Clear stat settings.... 102 103 104 105 <enum 0 no_clear> Do NOT clear the stats after 106 generating the status 107 108 <enum 1 clear_the_stats> Clear the stats after 109 generating the status. 110 111 112 113 The stats actually cleared are: 114 115 Timeout_count 116 117 Forward_due_to_bar_count 118 119 Duplicate_count 120 121 Frames_in_order_count 122 123 BAR_received_count 124 125 MPDU_Frames_processed_count 126 127 MSDU_Frames_processed_count 128 129 Total_processed_byte_count 130 131 Late_receive_MPDU_count 132 133 window_jump_2k 134 135 Hole_count 136 137 <legal 0-1> 138 139 reserved_2a 140 141 <legal 0> 142 143 reserved_3a 144 145 <legal 0> 146 147 reserved_4a 148 149 <legal 0> 150 151 reserved_5a 152 153 <legal 0> 154 155 reserved_6a 156 157 <legal 0> 158 159 reserved_7a 160 161 <legal 0> 162 163 reserved_8a 164 165 <legal 0> 166 */ 167 168 #define REO_GET_QUEUE_STATS_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_OFFSET 0x00000000 169 #define REO_GET_QUEUE_STATS_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_LSB 0 170 #define REO_GET_QUEUE_STATS_0_UNIFORM_REO_CMD_HEADER_CMD_HEADER_MASK 0xffffffff 171 172 /* Description REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0 173 174 Consumer: REO 175 176 Producer: SW 177 178 179 180 Address (lower 32 bits) of the REO queue descriptor 181 182 <legal all> 183 */ 184 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000004 185 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0 186 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff 187 188 /* Description REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32 189 190 Consumer: REO 191 192 Producer: SW 193 194 195 196 Address (upper 8 bits) of the REO queue descriptor 197 198 <legal all> 199 */ 200 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000008 201 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 202 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff 203 204 /* Description REO_GET_QUEUE_STATS_2_CLEAR_STATS 205 206 Clear stat settings.... 207 208 209 210 <enum 0 no_clear> Do NOT clear the stats after 211 generating the status 212 213 <enum 1 clear_the_stats> Clear the stats after 214 generating the status. 215 216 217 218 The stats actually cleared are: 219 220 Timeout_count 221 222 Forward_due_to_bar_count 223 224 Duplicate_count 225 226 Frames_in_order_count 227 228 BAR_received_count 229 230 MPDU_Frames_processed_count 231 232 MSDU_Frames_processed_count 233 234 Total_processed_byte_count 235 236 Late_receive_MPDU_count 237 238 window_jump_2k 239 240 Hole_count 241 242 <legal 0-1> 243 */ 244 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_OFFSET 0x00000008 245 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_LSB 8 246 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_MASK 0x00000100 247 248 /* Description REO_GET_QUEUE_STATS_2_RESERVED_2A 249 250 <legal 0> 251 */ 252 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_OFFSET 0x00000008 253 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_LSB 9 254 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_MASK 0xfffffe00 255 256 /* Description REO_GET_QUEUE_STATS_3_RESERVED_3A 257 258 <legal 0> 259 */ 260 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_OFFSET 0x0000000c 261 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_LSB 0 262 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_MASK 0xffffffff 263 264 /* Description REO_GET_QUEUE_STATS_4_RESERVED_4A 265 266 <legal 0> 267 */ 268 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_OFFSET 0x00000010 269 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_LSB 0 270 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_MASK 0xffffffff 271 272 /* Description REO_GET_QUEUE_STATS_5_RESERVED_5A 273 274 <legal 0> 275 */ 276 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_OFFSET 0x00000014 277 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_LSB 0 278 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_MASK 0xffffffff 279 280 /* Description REO_GET_QUEUE_STATS_6_RESERVED_6A 281 282 <legal 0> 283 */ 284 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_OFFSET 0x00000018 285 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_LSB 0 286 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_MASK 0xffffffff 287 288 /* Description REO_GET_QUEUE_STATS_7_RESERVED_7A 289 290 <legal 0> 291 */ 292 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_OFFSET 0x0000001c 293 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_LSB 0 294 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_MASK 0xffffffff 295 296 /* Description REO_GET_QUEUE_STATS_8_RESERVED_8A 297 298 <legal 0> 299 */ 300 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_OFFSET 0x00000020 301 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_LSB 0 302 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_MASK 0xffffffff 303 304 305 #endif // _REO_GET_QUEUE_STATS_H_ 306