1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // DO NOT EDIT! This file is automatically generated 20 // These definitions are tied to a particular hardware layout 21 22 23 #ifndef _REO_UPDATE_RX_REO_QUEUE_STATUS_H_ 24 #define _REO_UPDATE_RX_REO_QUEUE_STATUS_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 #include "uniform_reo_status_header.h" 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0-1 struct uniform_reo_status_header status_header; 34 // 2 reserved_2a[31:0] 35 // 3 reserved_3a[31:0] 36 // 4 reserved_4a[31:0] 37 // 5 reserved_5a[31:0] 38 // 6 reserved_6a[31:0] 39 // 7 reserved_7a[31:0] 40 // 8 reserved_8a[31:0] 41 // 9 reserved_9a[31:0] 42 // 10 reserved_10a[31:0] 43 // 11 reserved_11a[31:0] 44 // 12 reserved_12a[31:0] 45 // 13 reserved_13a[31:0] 46 // 14 reserved_14a[31:0] 47 // 15 reserved_15a[31:0] 48 // 16 reserved_16a[31:0] 49 // 17 reserved_17a[31:0] 50 // 18 reserved_18a[31:0] 51 // 19 reserved_19a[31:0] 52 // 20 reserved_20a[31:0] 53 // 21 reserved_21a[31:0] 54 // 22 reserved_22a[31:0] 55 // 23 reserved_23a[31:0] 56 // 24 reserved_24a[27:0], looping_count[31:28] 57 // 58 // ################ END SUMMARY ################# 59 60 #define NUM_OF_DWORDS_REO_UPDATE_RX_REO_QUEUE_STATUS 25 61 62 struct reo_update_rx_reo_queue_status { 63 struct uniform_reo_status_header status_header; 64 uint32_t reserved_2a : 32; //[31:0] 65 uint32_t reserved_3a : 32; //[31:0] 66 uint32_t reserved_4a : 32; //[31:0] 67 uint32_t reserved_5a : 32; //[31:0] 68 uint32_t reserved_6a : 32; //[31:0] 69 uint32_t reserved_7a : 32; //[31:0] 70 uint32_t reserved_8a : 32; //[31:0] 71 uint32_t reserved_9a : 32; //[31:0] 72 uint32_t reserved_10a : 32; //[31:0] 73 uint32_t reserved_11a : 32; //[31:0] 74 uint32_t reserved_12a : 32; //[31:0] 75 uint32_t reserved_13a : 32; //[31:0] 76 uint32_t reserved_14a : 32; //[31:0] 77 uint32_t reserved_15a : 32; //[31:0] 78 uint32_t reserved_16a : 32; //[31:0] 79 uint32_t reserved_17a : 32; //[31:0] 80 uint32_t reserved_18a : 32; //[31:0] 81 uint32_t reserved_19a : 32; //[31:0] 82 uint32_t reserved_20a : 32; //[31:0] 83 uint32_t reserved_21a : 32; //[31:0] 84 uint32_t reserved_22a : 32; //[31:0] 85 uint32_t reserved_23a : 32; //[31:0] 86 uint32_t reserved_24a : 28, //[27:0] 87 looping_count : 4; //[31:28] 88 }; 89 90 /* 91 92 struct uniform_reo_status_header status_header 93 94 Consumer: SW 95 96 Producer: REO 97 98 99 100 Details that can link this status with the original 101 command. It also contains info on how long REO took to 102 execute this command. 103 104 reserved_2a 105 106 <legal 0> 107 108 reserved_3a 109 110 <legal 0> 111 112 reserved_4a 113 114 <legal 0> 115 116 reserved_5a 117 118 <legal 0> 119 120 reserved_6a 121 122 <legal 0> 123 124 reserved_7a 125 126 <legal 0> 127 128 reserved_8a 129 130 <legal 0> 131 132 reserved_9a 133 134 <legal 0> 135 136 reserved_10a 137 138 <legal 0> 139 140 reserved_11a 141 142 <legal 0> 143 144 reserved_12a 145 146 <legal 0> 147 148 reserved_13a 149 150 <legal 0> 151 152 reserved_14a 153 154 <legal 0> 155 156 reserved_15a 157 158 <legal 0> 159 160 reserved_16a 161 162 <legal 0> 163 164 reserved_17a 165 166 <legal 0> 167 168 reserved_18a 169 170 <legal 0> 171 172 reserved_19a 173 174 <legal 0> 175 176 reserved_20a 177 178 <legal 0> 179 180 reserved_21a 181 182 <legal 0> 183 184 reserved_22a 185 186 <legal 0> 187 188 reserved_23a 189 190 <legal 0> 191 192 reserved_24a 193 194 <legal 0> 195 196 looping_count 197 198 A count value that indicates the number of times the 199 producer of entries into this Ring has looped around the 200 ring. 201 202 At initialization time, this value is set to 0. On the 203 first loop, this value is set to 1. After the max value is 204 reached allowed by the number of bits for this field, the 205 count value continues with 0 again. 206 207 208 209 In case SW is the consumer of the ring entries, it can 210 use this field to figure out up to where the producer of 211 entries has created new entries. This eliminates the need to 212 check where the head pointer' of the ring is located once 213 the SW starts processing an interrupt indicating that new 214 entries have been put into this ring... 215 216 217 218 Also note that SW if it wants only needs to look at the 219 LSB bit of this count value. 220 221 <legal all> 222 */ 223 224 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000000 225 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28 226 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff 227 #define REO_UPDATE_RX_REO_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_OFFSET 0x00000004 228 #define REO_UPDATE_RX_REO_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_LSB 28 229 #define REO_UPDATE_RX_REO_QUEUE_STATUS_1_UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_MASK 0xffffffff 230 231 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_2_RESERVED_2A 232 233 <legal 0> 234 */ 235 #define REO_UPDATE_RX_REO_QUEUE_STATUS_2_RESERVED_2A_OFFSET 0x00000008 236 #define REO_UPDATE_RX_REO_QUEUE_STATUS_2_RESERVED_2A_LSB 0 237 #define REO_UPDATE_RX_REO_QUEUE_STATUS_2_RESERVED_2A_MASK 0xffffffff 238 239 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_3_RESERVED_3A 240 241 <legal 0> 242 */ 243 #define REO_UPDATE_RX_REO_QUEUE_STATUS_3_RESERVED_3A_OFFSET 0x0000000c 244 #define REO_UPDATE_RX_REO_QUEUE_STATUS_3_RESERVED_3A_LSB 0 245 #define REO_UPDATE_RX_REO_QUEUE_STATUS_3_RESERVED_3A_MASK 0xffffffff 246 247 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_4_RESERVED_4A 248 249 <legal 0> 250 */ 251 #define REO_UPDATE_RX_REO_QUEUE_STATUS_4_RESERVED_4A_OFFSET 0x00000010 252 #define REO_UPDATE_RX_REO_QUEUE_STATUS_4_RESERVED_4A_LSB 0 253 #define REO_UPDATE_RX_REO_QUEUE_STATUS_4_RESERVED_4A_MASK 0xffffffff 254 255 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_5_RESERVED_5A 256 257 <legal 0> 258 */ 259 #define REO_UPDATE_RX_REO_QUEUE_STATUS_5_RESERVED_5A_OFFSET 0x00000014 260 #define REO_UPDATE_RX_REO_QUEUE_STATUS_5_RESERVED_5A_LSB 0 261 #define REO_UPDATE_RX_REO_QUEUE_STATUS_5_RESERVED_5A_MASK 0xffffffff 262 263 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_6_RESERVED_6A 264 265 <legal 0> 266 */ 267 #define REO_UPDATE_RX_REO_QUEUE_STATUS_6_RESERVED_6A_OFFSET 0x00000018 268 #define REO_UPDATE_RX_REO_QUEUE_STATUS_6_RESERVED_6A_LSB 0 269 #define REO_UPDATE_RX_REO_QUEUE_STATUS_6_RESERVED_6A_MASK 0xffffffff 270 271 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_7_RESERVED_7A 272 273 <legal 0> 274 */ 275 #define REO_UPDATE_RX_REO_QUEUE_STATUS_7_RESERVED_7A_OFFSET 0x0000001c 276 #define REO_UPDATE_RX_REO_QUEUE_STATUS_7_RESERVED_7A_LSB 0 277 #define REO_UPDATE_RX_REO_QUEUE_STATUS_7_RESERVED_7A_MASK 0xffffffff 278 279 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_8_RESERVED_8A 280 281 <legal 0> 282 */ 283 #define REO_UPDATE_RX_REO_QUEUE_STATUS_8_RESERVED_8A_OFFSET 0x00000020 284 #define REO_UPDATE_RX_REO_QUEUE_STATUS_8_RESERVED_8A_LSB 0 285 #define REO_UPDATE_RX_REO_QUEUE_STATUS_8_RESERVED_8A_MASK 0xffffffff 286 287 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_9_RESERVED_9A 288 289 <legal 0> 290 */ 291 #define REO_UPDATE_RX_REO_QUEUE_STATUS_9_RESERVED_9A_OFFSET 0x00000024 292 #define REO_UPDATE_RX_REO_QUEUE_STATUS_9_RESERVED_9A_LSB 0 293 #define REO_UPDATE_RX_REO_QUEUE_STATUS_9_RESERVED_9A_MASK 0xffffffff 294 295 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_10_RESERVED_10A 296 297 <legal 0> 298 */ 299 #define REO_UPDATE_RX_REO_QUEUE_STATUS_10_RESERVED_10A_OFFSET 0x00000028 300 #define REO_UPDATE_RX_REO_QUEUE_STATUS_10_RESERVED_10A_LSB 0 301 #define REO_UPDATE_RX_REO_QUEUE_STATUS_10_RESERVED_10A_MASK 0xffffffff 302 303 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_11_RESERVED_11A 304 305 <legal 0> 306 */ 307 #define REO_UPDATE_RX_REO_QUEUE_STATUS_11_RESERVED_11A_OFFSET 0x0000002c 308 #define REO_UPDATE_RX_REO_QUEUE_STATUS_11_RESERVED_11A_LSB 0 309 #define REO_UPDATE_RX_REO_QUEUE_STATUS_11_RESERVED_11A_MASK 0xffffffff 310 311 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_12_RESERVED_12A 312 313 <legal 0> 314 */ 315 #define REO_UPDATE_RX_REO_QUEUE_STATUS_12_RESERVED_12A_OFFSET 0x00000030 316 #define REO_UPDATE_RX_REO_QUEUE_STATUS_12_RESERVED_12A_LSB 0 317 #define REO_UPDATE_RX_REO_QUEUE_STATUS_12_RESERVED_12A_MASK 0xffffffff 318 319 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_13_RESERVED_13A 320 321 <legal 0> 322 */ 323 #define REO_UPDATE_RX_REO_QUEUE_STATUS_13_RESERVED_13A_OFFSET 0x00000034 324 #define REO_UPDATE_RX_REO_QUEUE_STATUS_13_RESERVED_13A_LSB 0 325 #define REO_UPDATE_RX_REO_QUEUE_STATUS_13_RESERVED_13A_MASK 0xffffffff 326 327 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_14_RESERVED_14A 328 329 <legal 0> 330 */ 331 #define REO_UPDATE_RX_REO_QUEUE_STATUS_14_RESERVED_14A_OFFSET 0x00000038 332 #define REO_UPDATE_RX_REO_QUEUE_STATUS_14_RESERVED_14A_LSB 0 333 #define REO_UPDATE_RX_REO_QUEUE_STATUS_14_RESERVED_14A_MASK 0xffffffff 334 335 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_15_RESERVED_15A 336 337 <legal 0> 338 */ 339 #define REO_UPDATE_RX_REO_QUEUE_STATUS_15_RESERVED_15A_OFFSET 0x0000003c 340 #define REO_UPDATE_RX_REO_QUEUE_STATUS_15_RESERVED_15A_LSB 0 341 #define REO_UPDATE_RX_REO_QUEUE_STATUS_15_RESERVED_15A_MASK 0xffffffff 342 343 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_16_RESERVED_16A 344 345 <legal 0> 346 */ 347 #define REO_UPDATE_RX_REO_QUEUE_STATUS_16_RESERVED_16A_OFFSET 0x00000040 348 #define REO_UPDATE_RX_REO_QUEUE_STATUS_16_RESERVED_16A_LSB 0 349 #define REO_UPDATE_RX_REO_QUEUE_STATUS_16_RESERVED_16A_MASK 0xffffffff 350 351 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_17_RESERVED_17A 352 353 <legal 0> 354 */ 355 #define REO_UPDATE_RX_REO_QUEUE_STATUS_17_RESERVED_17A_OFFSET 0x00000044 356 #define REO_UPDATE_RX_REO_QUEUE_STATUS_17_RESERVED_17A_LSB 0 357 #define REO_UPDATE_RX_REO_QUEUE_STATUS_17_RESERVED_17A_MASK 0xffffffff 358 359 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_18_RESERVED_18A 360 361 <legal 0> 362 */ 363 #define REO_UPDATE_RX_REO_QUEUE_STATUS_18_RESERVED_18A_OFFSET 0x00000048 364 #define REO_UPDATE_RX_REO_QUEUE_STATUS_18_RESERVED_18A_LSB 0 365 #define REO_UPDATE_RX_REO_QUEUE_STATUS_18_RESERVED_18A_MASK 0xffffffff 366 367 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_19_RESERVED_19A 368 369 <legal 0> 370 */ 371 #define REO_UPDATE_RX_REO_QUEUE_STATUS_19_RESERVED_19A_OFFSET 0x0000004c 372 #define REO_UPDATE_RX_REO_QUEUE_STATUS_19_RESERVED_19A_LSB 0 373 #define REO_UPDATE_RX_REO_QUEUE_STATUS_19_RESERVED_19A_MASK 0xffffffff 374 375 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_20_RESERVED_20A 376 377 <legal 0> 378 */ 379 #define REO_UPDATE_RX_REO_QUEUE_STATUS_20_RESERVED_20A_OFFSET 0x00000050 380 #define REO_UPDATE_RX_REO_QUEUE_STATUS_20_RESERVED_20A_LSB 0 381 #define REO_UPDATE_RX_REO_QUEUE_STATUS_20_RESERVED_20A_MASK 0xffffffff 382 383 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_21_RESERVED_21A 384 385 <legal 0> 386 */ 387 #define REO_UPDATE_RX_REO_QUEUE_STATUS_21_RESERVED_21A_OFFSET 0x00000054 388 #define REO_UPDATE_RX_REO_QUEUE_STATUS_21_RESERVED_21A_LSB 0 389 #define REO_UPDATE_RX_REO_QUEUE_STATUS_21_RESERVED_21A_MASK 0xffffffff 390 391 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_22_RESERVED_22A 392 393 <legal 0> 394 */ 395 #define REO_UPDATE_RX_REO_QUEUE_STATUS_22_RESERVED_22A_OFFSET 0x00000058 396 #define REO_UPDATE_RX_REO_QUEUE_STATUS_22_RESERVED_22A_LSB 0 397 #define REO_UPDATE_RX_REO_QUEUE_STATUS_22_RESERVED_22A_MASK 0xffffffff 398 399 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_23_RESERVED_23A 400 401 <legal 0> 402 */ 403 #define REO_UPDATE_RX_REO_QUEUE_STATUS_23_RESERVED_23A_OFFSET 0x0000005c 404 #define REO_UPDATE_RX_REO_QUEUE_STATUS_23_RESERVED_23A_LSB 0 405 #define REO_UPDATE_RX_REO_QUEUE_STATUS_23_RESERVED_23A_MASK 0xffffffff 406 407 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_24_RESERVED_24A 408 409 <legal 0> 410 */ 411 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_RESERVED_24A_OFFSET 0x00000060 412 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_RESERVED_24A_LSB 0 413 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_RESERVED_24A_MASK 0x0fffffff 414 415 /* Description REO_UPDATE_RX_REO_QUEUE_STATUS_24_LOOPING_COUNT 416 417 A count value that indicates the number of times the 418 producer of entries into this Ring has looped around the 419 ring. 420 421 At initialization time, this value is set to 0. On the 422 first loop, this value is set to 1. After the max value is 423 reached allowed by the number of bits for this field, the 424 count value continues with 0 again. 425 426 427 428 In case SW is the consumer of the ring entries, it can 429 use this field to figure out up to where the producer of 430 entries has created new entries. This eliminates the need to 431 check where the head pointer' of the ring is located once 432 the SW starts processing an interrupt indicating that new 433 entries have been put into this ring... 434 435 436 437 Also note that SW if it wants only needs to look at the 438 LSB bit of this count value. 439 440 <legal all> 441 */ 442 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_LOOPING_COUNT_OFFSET 0x00000060 443 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_LOOPING_COUNT_LSB 28 444 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_LOOPING_COUNT_MASK 0xf0000000 445 446 447 #endif // _REO_UPDATE_RX_REO_QUEUE_STATUS_H_ 448