1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // DO NOT EDIT! This file is automatically generated 20 // These definitions are tied to a particular hardware layout 21 22 23 #ifndef _RX_PPDU_END_USER_STATS_H_ 24 #define _RX_PPDU_END_USER_STATS_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 #include "rx_rxpcu_classification_overview.h" 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0 struct rx_rxpcu_classification_overview rxpcu_classification_details; 34 // 1 sta_full_aid[12:0], mcs[16:13], nss[19:17], odma_info_valid[20], ofdma_low_ru_index[27:21], reserved_1a[31:28] 35 // 2 ofdma_high_ru_index[6:0], reserved_2a[7], user_receive_quality[15:8], mpdu_cnt_fcs_err[25:16], wbm2rxdma_buf_source_used[26], fw2rxdma_buf_source_used[27], sw2rxdma_buf_source_used[28], reserved_2b[31:29] 36 // 3 mpdu_cnt_fcs_ok[8:0], frame_control_info_valid[9], qos_control_info_valid[10], ht_control_info_valid[11], data_sequence_control_info_valid[12], reserved_3a[15:13], rxdma2reo_ring_used[16], rxdma2fw_ring_used[17], rxdma2sw_ring_used[18], rxdma_release_ring_used[19], ht_control_field_pkt_type[23:20], reserved_3b[31:24] 37 // 4 ast_index[15:0], frame_control_field[31:16] 38 // 5 first_data_seq_ctrl[15:0], qos_control_field[31:16] 39 // 6 ht_control_field[31:0] 40 // 7 fcs_ok_bitmap_31_0[31:0] 41 // 8 fcs_ok_bitmap_63_32[31:0] 42 // 9 udp_msdu_count[15:0], tcp_msdu_count[31:16] 43 // 10 other_msdu_count[15:0], tcp_ack_msdu_count[31:16] 44 // 11 sw_response_reference_ptr[31:0] 45 // 12 received_qos_data_tid_bitmap[15:0], received_qos_data_tid_eosp_bitmap[31:16] 46 // 13 qosctrl_15_8_tid0[7:0], qosctrl_15_8_tid1[15:8], qosctrl_15_8_tid2[23:16], qosctrl_15_8_tid3[31:24] 47 // 14 qosctrl_15_8_tid4[7:0], qosctrl_15_8_tid5[15:8], qosctrl_15_8_tid6[23:16], qosctrl_15_8_tid7[31:24] 48 // 15 qosctrl_15_8_tid8[7:0], qosctrl_15_8_tid9[15:8], qosctrl_15_8_tid10[23:16], qosctrl_15_8_tid11[31:24] 49 // 16 qosctrl_15_8_tid12[7:0], qosctrl_15_8_tid13[15:8], qosctrl_15_8_tid14[23:16], qosctrl_15_8_tid15[31:24] 50 // 51 // ################ END SUMMARY ################# 52 53 #define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS 17 54 55 struct rx_ppdu_end_user_stats { 56 struct rx_rxpcu_classification_overview rxpcu_classification_details; 57 uint32_t sta_full_aid : 13, //[12:0] 58 mcs : 4, //[16:13] 59 nss : 3, //[19:17] 60 odma_info_valid : 1, //[20] 61 ofdma_low_ru_index : 7, //[27:21] 62 reserved_1a : 4; //[31:28] 63 uint32_t ofdma_high_ru_index : 7, //[6:0] 64 reserved_2a : 1, //[7] 65 user_receive_quality : 8, //[15:8] 66 mpdu_cnt_fcs_err : 10, //[25:16] 67 wbm2rxdma_buf_source_used : 1, //[26] 68 fw2rxdma_buf_source_used : 1, //[27] 69 sw2rxdma_buf_source_used : 1, //[28] 70 reserved_2b : 3; //[31:29] 71 uint32_t mpdu_cnt_fcs_ok : 9, //[8:0] 72 frame_control_info_valid : 1, //[9] 73 qos_control_info_valid : 1, //[10] 74 ht_control_info_valid : 1, //[11] 75 data_sequence_control_info_valid: 1, //[12] 76 reserved_3a : 3, //[15:13] 77 rxdma2reo_ring_used : 1, //[16] 78 rxdma2fw_ring_used : 1, //[17] 79 rxdma2sw_ring_used : 1, //[18] 80 rxdma_release_ring_used : 1, //[19] 81 ht_control_field_pkt_type : 4, //[23:20] 82 reserved_3b : 8; //[31:24] 83 uint32_t ast_index : 16, //[15:0] 84 frame_control_field : 16; //[31:16] 85 uint32_t first_data_seq_ctrl : 16, //[15:0] 86 qos_control_field : 16; //[31:16] 87 uint32_t ht_control_field : 32; //[31:0] 88 uint32_t fcs_ok_bitmap_31_0 : 32; //[31:0] 89 uint32_t fcs_ok_bitmap_63_32 : 32; //[31:0] 90 uint32_t udp_msdu_count : 16, //[15:0] 91 tcp_msdu_count : 16; //[31:16] 92 uint32_t other_msdu_count : 16, //[15:0] 93 tcp_ack_msdu_count : 16; //[31:16] 94 uint32_t sw_response_reference_ptr : 32; //[31:0] 95 uint32_t received_qos_data_tid_bitmap : 16, //[15:0] 96 received_qos_data_tid_eosp_bitmap: 16; //[31:16] 97 uint32_t qosctrl_15_8_tid0 : 8, //[7:0] 98 qosctrl_15_8_tid1 : 8, //[15:8] 99 qosctrl_15_8_tid2 : 8, //[23:16] 100 qosctrl_15_8_tid3 : 8; //[31:24] 101 uint32_t qosctrl_15_8_tid4 : 8, //[7:0] 102 qosctrl_15_8_tid5 : 8, //[15:8] 103 qosctrl_15_8_tid6 : 8, //[23:16] 104 qosctrl_15_8_tid7 : 8; //[31:24] 105 uint32_t qosctrl_15_8_tid8 : 8, //[7:0] 106 qosctrl_15_8_tid9 : 8, //[15:8] 107 qosctrl_15_8_tid10 : 8, //[23:16] 108 qosctrl_15_8_tid11 : 8; //[31:24] 109 uint32_t qosctrl_15_8_tid12 : 8, //[7:0] 110 qosctrl_15_8_tid13 : 8, //[15:8] 111 qosctrl_15_8_tid14 : 8, //[23:16] 112 qosctrl_15_8_tid15 : 8; //[31:24] 113 }; 114 115 /* 116 117 struct rx_rxpcu_classification_overview rxpcu_classification_details 118 119 Details related to what RXPCU classification types of 120 MPDUs have been received 121 122 sta_full_aid 123 124 Consumer: FW 125 126 Producer: RXPCU 127 128 129 130 The full AID of this station. 131 132 133 134 <legal all> 135 136 mcs 137 138 MCS of the received frame 139 140 141 142 For details, refer to MCS_TYPE description 143 144 <legal all> 145 146 nss 147 148 Number of spatial streams. 149 150 151 152 <enum 0 1_spatial_stream>Single spatial stream 153 154 <enum 1 2_spatial_streams>2 spatial streams 155 156 <enum 2 3_spatial_streams>3 spatial streams 157 158 <enum 3 4_spatial_streams>4 spatial streams 159 160 <enum 4 5_spatial_streams>5 spatial streams 161 162 <enum 5 6_spatial_streams>6 spatial streams 163 164 <enum 6 7_spatial_streams>7 spatial streams 165 166 <enum 7 8_spatial_streams>8 spatial streams 167 168 odma_info_valid 169 170 When set, ofdma RU related info in the following fields 171 is valid 172 173 <legal all> 174 175 ofdma_low_ru_index 176 177 The index of the lowerest RU used by this STA. 178 179 <legal all> 180 181 reserved_1a 182 183 <legal 0> 184 185 ofdma_high_ru_index 186 187 The index of the highest RU used by this STA. 188 189 <legal all> 190 191 reserved_2a 192 193 <legal 0> 194 195 user_receive_quality 196 197 RSSI / EVM for this user ??? 198 199 200 201 Details TBD 202 203 <legal all> 204 205 mpdu_cnt_fcs_err 206 207 The number of MPDUs received from this STA in this PPDU 208 with FCS errors 209 210 <legal all> 211 212 wbm2rxdma_buf_source_used 213 214 Field filled in by RXDMA 215 216 217 218 When set, RXDMA has used the wbm2rxdma_buf ring as 219 source for at least one of the frames in this PPDU. 220 221 fw2rxdma_buf_source_used 222 223 Field filled in by RXDMA 224 225 226 227 When set, RXDMA has used the fw2rxdma_buf ring as source 228 for at least one of the frames in this PPDU. 229 230 sw2rxdma_buf_source_used 231 232 Field filled in by RXDMA 233 234 235 236 When set, RXDMA has used the sw2rxdma_buf ring as source 237 for at least one of the frames in this PPDU. 238 239 reserved_2b 240 241 <legal 0> 242 243 mpdu_cnt_fcs_ok 244 245 The number of MPDUs received from this STA in this PPDU 246 with correct FCS 247 248 <legal all> 249 250 frame_control_info_valid 251 252 When set, the frame_control_info field contains valid 253 information 254 255 <legal all> 256 257 qos_control_info_valid 258 259 When set, the QoS_control_info field contains valid 260 information 261 262 <legal all> 263 264 ht_control_info_valid 265 266 When set, the HT_control_info field contains valid 267 information 268 269 <legal all> 270 271 data_sequence_control_info_valid 272 273 When set, the First_data_seq_ctrl field contains valid 274 information 275 276 <legal all> 277 278 reserved_3a 279 280 <legal 0> 281 282 rxdma2reo_ring_used 283 284 Field filled in by RXDMA 285 286 287 288 Set when at least one frame during this PPDU got pushed 289 to this ring by RXDMA 290 291 rxdma2fw_ring_used 292 293 Field filled in by RXDMA 294 295 296 297 Set when at least one frame during this PPDU got pushed 298 to this ring by RXDMA 299 300 rxdma2sw_ring_used 301 302 Field filled in by RXDMA 303 304 305 306 Set when at least one frame during this PPDU got pushed 307 to this ring by RXDMA 308 309 rxdma_release_ring_used 310 311 Field filled in by RXDMA 312 313 314 315 Set when at least one frame during this PPDU got pushed 316 to this ring by RXDMA 317 318 ht_control_field_pkt_type 319 320 Field only valid when HT_control_info_valid is set. 321 322 323 324 Indicates what the PHY receive type was for receiving 325 this frame. Can help determine if the HT_CONTROL field shall 326 be interpreted as HT/VHT or HE. 327 328 329 330 <enum 0 dot11a>802.11a PPDU type 331 332 <enum 1 dot11b>802.11b PPDU type 333 334 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 335 336 <enum 3 dot11ac>802.11ac PPDU type 337 338 <enum 4 dot11ax>802.11ax PPDU type 339 340 reserved_3b 341 342 <legal 0> 343 344 ast_index 345 346 This field indicates the index of the AST entry 347 corresponding to this MPDU. It is provided by the GSE module 348 instantiated in RXPCU. 349 350 A value of 0xFFFF indicates an invalid AST index, 351 meaning that No AST entry was found or NO AST search was 352 performed 353 354 <legal all> 355 356 frame_control_field 357 358 Field only valid when Frame_control_info_valid is set. 359 360 361 362 Last successfully received Frame_control field of data 363 frame (excluding Data NULL/ QoS Null) for this user 364 365 Mainly used to track the PM state of the transmitted 366 device 367 368 369 370 NOTE: only data frame info is needed, as control and 371 management frames are already routed to the FW. 372 373 <legal all> 374 375 first_data_seq_ctrl 376 377 Field only valid when Data_sequence_control_info_valid 378 is set. 379 380 381 382 Sequence control field of the first data frame 383 (excluding Data NULL or QoS Data null) received for this 384 user with correct FCS 385 386 387 388 NOTE: only data frame info is needed, as control and 389 management frames are already routed to the FW. 390 391 <legal all> 392 393 qos_control_field 394 395 Field only valid when QoS_control_info_valid is set. 396 397 398 399 Last successfully received QoS_control field of data 400 frame (excluding Data NULL/ QoS Null) for this user 401 402 403 404 Note that in case of multi TID, this field can only 405 reflect the last properly received MPDU, and thus can not 406 indicate all potentially different TIDs that had been 407 received earlier. 408 409 410 411 There are however per TID fields, that will contain 412 among other things all buffer status info: See 413 414 QoSCtrl_15_8_tid??? 415 416 <legal all> 417 418 ht_control_field 419 420 Field only valid when HT_control_info_valid is set. 421 422 423 424 Last successfully received 425 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 426 excluding Data NULL/ QoS Null, for this user. Data NULL/ QoS 427 Null are excluded here because these frames are always 428 already routed to the FW by RXDMA. 429 430 431 432 See field HT_control_field_pkt_type in case pkt_type 433 influences if this fields interpretation as HT/VHT/HE 434 CONTROL 435 436 <legal all> 437 438 fcs_ok_bitmap_31_0 439 440 Bitmap indicates in order of received MPDUs, which MPDUs 441 had an passing FCS or had an error. 442 443 1: FCS OK 444 445 0: FCS error 446 447 <legal all> 448 449 fcs_ok_bitmap_63_32 450 451 Bitmap indicates in order of received MPDUs, which MPDUs 452 had an passing FCS or had an error. 453 454 1: FCS OK 455 456 0: FCS error 457 458 459 460 NOTE: for users 0, 1, 2 and 3, additional bitmap info 461 (up to 256 bitmap window) is provided in 462 RX_PPDU_END_USER_STATS_EXT TLV 463 464 <legal all> 465 466 udp_msdu_count 467 468 Field filled in by RX OLE 469 470 Set to 0 by RXPCU 471 472 473 474 The number of MSDUs that are part of MPDUs without FCS 475 error, that contain UDP frames. 476 477 <legal all> 478 479 tcp_msdu_count 480 481 Field filled in by RX OLE 482 483 Set to 0 by RXPCU 484 485 486 487 The number of MSDUs that are part of MPDUs without FCS 488 error, that contain TCP frames. 489 490 491 492 (Note: This does NOT include TCP-ACK) 493 494 <legal all> 495 496 other_msdu_count 497 498 Field filled in by RX OLE 499 500 Set to 0 by RXPCU 501 502 503 504 The number of MSDUs that are part of MPDUs without FCS 505 error, that contain neither UDP or TCP frames. 506 507 508 509 Includes Management and control frames. 510 511 512 513 <legal all> 514 515 tcp_ack_msdu_count 516 517 Field filled in by RX OLE 518 519 Set to 0 by RXPCU 520 521 522 523 The number of MSDUs that are part of MPDUs without FCS 524 error, that contain TCP ack frames. 525 526 <legal all> 527 528 sw_response_reference_ptr 529 530 Pointer that SW uses to refer back to an expected 531 response reception. Used for Rate adaptation purposes. 532 533 When a reception occurrs that is not tied to an expected 534 response, this field is set to 0x0 535 536 <legal all> 537 538 received_qos_data_tid_bitmap 539 540 Whenever a QoS Data frame is received, the bit in this 541 field that corresponds to the received TID shall be set. 542 543 ...Bitmap[0] = TID0 544 545 ...Bitmap[1] = TID1 546 547 Etc. 548 549 <legal all> 550 551 received_qos_data_tid_eosp_bitmap 552 553 Field initialized to 0 554 555 For every QoS Data frame that is correctly received, the 556 EOSP bit of that frame is copied over into the corresponding 557 TID related field. 558 559 Note that this implies that the bits here represent the 560 EOSP bit status for each TID of the last MPDU received for 561 that TID. 562 563 564 565 received TID shall be set. 566 567 ...eosp_bitmap[0] = eosp of TID0 568 569 ...eosp_bitmap[1] = eosp of TID1 570 571 Etc. 572 573 <legal all> 574 575 qosctrl_15_8_tid0 576 577 Field only valid when Received_qos_data_tid_bitmap[0] is 578 set 579 580 581 582 QoS control field bits 15-8 of the last properly 583 received MPDU with TID0 584 585 qosctrl_15_8_tid1 586 587 Field only valid when Received_qos_data_tid_bitmap[1] is 588 set 589 590 591 592 QoS control field bits 15-8 of the last properly 593 received MPDU with TID1 594 595 qosctrl_15_8_tid2 596 597 Field only valid when Received_qos_data_tid_bitmap[2] is 598 set 599 600 601 602 QoS control field bits 15-8 of the last properly 603 received MPDU with TID2 604 605 qosctrl_15_8_tid3 606 607 Field only valid when Received_qos_data_tid_bitmap[3] is 608 set 609 610 611 612 QoS control field bits 15-8 of the last properly 613 received MPDU with TID3 614 615 qosctrl_15_8_tid4 616 617 Field only valid when Received_qos_data_tid_bitmap[4] is 618 set 619 620 621 622 QoS control field bits 15-8 of the last properly 623 received MPDU with TID4 624 625 qosctrl_15_8_tid5 626 627 Field only valid when Received_qos_data_tid_bitmap[5] is 628 set 629 630 631 632 QoS control field bits 15-8 of the last properly 633 received MPDU with TID5 634 635 qosctrl_15_8_tid6 636 637 Field only valid when Received_qos_data_tid_bitmap[6] is 638 set 639 640 641 642 QoS control field bits 15-8 of the last properly 643 received MPDU with TID6 644 645 qosctrl_15_8_tid7 646 647 Field only valid when Received_qos_data_tid_bitmap[7] is 648 set 649 650 651 652 QoS control field bits 15-8 of the last properly 653 received MPDU with TID7 654 655 qosctrl_15_8_tid8 656 657 Field only valid when Received_qos_data_tid_bitmap[8] is 658 set 659 660 661 662 QoS control field bits 15-8 of the last properly 663 received MPDU with TID8 664 665 qosctrl_15_8_tid9 666 667 Field only valid when Received_qos_data_tid_bitmap[9] is 668 set 669 670 671 672 QoS control field bits 15-8 of the last properly 673 received MPDU with TID9 674 675 qosctrl_15_8_tid10 676 677 Field only valid when Received_qos_data_tid_bitmap[10] 678 is set 679 680 681 682 QoS control field bits 15-8 of the last properly 683 received MPDU with TID10 684 685 qosctrl_15_8_tid11 686 687 Field only valid when Received_qos_data_tid_bitmap[11] 688 is set 689 690 691 692 QoS control field bits 15-8 of the last properly 693 received MPDU with TID11 694 695 qosctrl_15_8_tid12 696 697 Field only valid when Received_qos_data_tid_bitmap[12] 698 is set 699 700 701 702 QoS control field bits 15-8 of the last properly 703 received MPDU with TID12 704 705 qosctrl_15_8_tid13 706 707 Field only valid when Received_qos_data_tid_bitmap[13] 708 is set 709 710 711 712 QoS control field bits 15-8 of the last properly 713 received MPDU with TID13 714 715 qosctrl_15_8_tid14 716 717 Field only valid when Received_qos_data_tid_bitmap[14] 718 is set 719 720 721 722 QoS control field bits 15-8 of the last properly 723 received MPDU with TID14 724 725 qosctrl_15_8_tid15 726 727 Field only valid when Received_qos_data_tid_bitmap[15] 728 is set 729 730 731 732 QoS control field bits 15-8 of the last properly 733 received MPDU with TID15 734 */ 735 736 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_OFFSET 0x00000000 737 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_LSB 24 738 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_MASK 0xffffffff 739 740 /* Description RX_PPDU_END_USER_STATS_1_STA_FULL_AID 741 742 Consumer: FW 743 744 Producer: RXPCU 745 746 747 748 The full AID of this station. 749 750 751 752 <legal all> 753 */ 754 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_OFFSET 0x00000004 755 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_LSB 0 756 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_MASK 0x00001fff 757 758 /* Description RX_PPDU_END_USER_STATS_1_MCS 759 760 MCS of the received frame 761 762 763 764 For details, refer to MCS_TYPE description 765 766 <legal all> 767 */ 768 #define RX_PPDU_END_USER_STATS_1_MCS_OFFSET 0x00000004 769 #define RX_PPDU_END_USER_STATS_1_MCS_LSB 13 770 #define RX_PPDU_END_USER_STATS_1_MCS_MASK 0x0001e000 771 772 /* Description RX_PPDU_END_USER_STATS_1_NSS 773 774 Number of spatial streams. 775 776 777 778 <enum 0 1_spatial_stream>Single spatial stream 779 780 <enum 1 2_spatial_streams>2 spatial streams 781 782 <enum 2 3_spatial_streams>3 spatial streams 783 784 <enum 3 4_spatial_streams>4 spatial streams 785 786 <enum 4 5_spatial_streams>5 spatial streams 787 788 <enum 5 6_spatial_streams>6 spatial streams 789 790 <enum 6 7_spatial_streams>7 spatial streams 791 792 <enum 7 8_spatial_streams>8 spatial streams 793 */ 794 #define RX_PPDU_END_USER_STATS_1_NSS_OFFSET 0x00000004 795 #define RX_PPDU_END_USER_STATS_1_NSS_LSB 17 796 #define RX_PPDU_END_USER_STATS_1_NSS_MASK 0x000e0000 797 798 /* Description RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID 799 800 When set, ofdma RU related info in the following fields 801 is valid 802 803 <legal all> 804 */ 805 #define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_OFFSET 0x00000004 806 #define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_LSB 20 807 #define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_MASK 0x00100000 808 809 /* Description RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX 810 811 The index of the lowerest RU used by this STA. 812 813 <legal all> 814 */ 815 #define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_OFFSET 0x00000004 816 #define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_LSB 21 817 #define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_MASK 0x0fe00000 818 819 /* Description RX_PPDU_END_USER_STATS_1_RESERVED_1A 820 821 <legal 0> 822 */ 823 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_OFFSET 0x00000004 824 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_LSB 28 825 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_MASK 0xf0000000 826 827 /* Description RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX 828 829 The index of the highest RU used by this STA. 830 831 <legal all> 832 */ 833 #define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_OFFSET 0x00000008 834 #define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_LSB 0 835 #define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_MASK 0x0000007f 836 837 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2A 838 839 <legal 0> 840 */ 841 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_OFFSET 0x00000008 842 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_LSB 7 843 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_MASK 0x00000080 844 845 /* Description RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY 846 847 RSSI / EVM for this user ??? 848 849 850 851 Details TBD 852 853 <legal all> 854 */ 855 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_OFFSET 0x00000008 856 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_LSB 8 857 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_MASK 0x0000ff00 858 859 /* Description RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR 860 861 The number of MPDUs received from this STA in this PPDU 862 with FCS errors 863 864 <legal all> 865 */ 866 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_OFFSET 0x00000008 867 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_LSB 16 868 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_MASK 0x03ff0000 869 870 /* Description RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED 871 872 Field filled in by RXDMA 873 874 875 876 When set, RXDMA has used the wbm2rxdma_buf ring as 877 source for at least one of the frames in this PPDU. 878 */ 879 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 880 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_LSB 26 881 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_MASK 0x04000000 882 883 /* Description RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED 884 885 Field filled in by RXDMA 886 887 888 889 When set, RXDMA has used the fw2rxdma_buf ring as source 890 for at least one of the frames in this PPDU. 891 */ 892 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 893 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_LSB 27 894 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_MASK 0x08000000 895 896 /* Description RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED 897 898 Field filled in by RXDMA 899 900 901 902 When set, RXDMA has used the sw2rxdma_buf ring as source 903 for at least one of the frames in this PPDU. 904 */ 905 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 906 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_LSB 28 907 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_MASK 0x10000000 908 909 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2B 910 911 <legal 0> 912 */ 913 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_OFFSET 0x00000008 914 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_LSB 29 915 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_MASK 0xe0000000 916 917 /* Description RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK 918 919 The number of MPDUs received from this STA in this PPDU 920 with correct FCS 921 922 <legal all> 923 */ 924 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_OFFSET 0x0000000c 925 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_LSB 0 926 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_MASK 0x000001ff 927 928 /* Description RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID 929 930 When set, the frame_control_info field contains valid 931 information 932 933 <legal all> 934 */ 935 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_OFFSET 0x0000000c 936 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_LSB 9 937 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_MASK 0x00000200 938 939 /* Description RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID 940 941 When set, the QoS_control_info field contains valid 942 information 943 944 <legal all> 945 */ 946 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_OFFSET 0x0000000c 947 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_LSB 10 948 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_MASK 0x00000400 949 950 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID 951 952 When set, the HT_control_info field contains valid 953 information 954 955 <legal all> 956 */ 957 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_OFFSET 0x0000000c 958 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_LSB 11 959 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_MASK 0x00000800 960 961 /* Description RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID 962 963 When set, the First_data_seq_ctrl field contains valid 964 information 965 966 <legal all> 967 */ 968 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_OFFSET 0x0000000c 969 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_LSB 12 970 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_MASK 0x00001000 971 972 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3A 973 974 <legal 0> 975 */ 976 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_OFFSET 0x0000000c 977 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_LSB 13 978 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_MASK 0x0000e000 979 980 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED 981 982 Field filled in by RXDMA 983 984 985 986 Set when at least one frame during this PPDU got pushed 987 to this ring by RXDMA 988 */ 989 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_OFFSET 0x0000000c 990 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_LSB 16 991 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_MASK 0x00010000 992 993 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED 994 995 Field filled in by RXDMA 996 997 998 999 Set when at least one frame during this PPDU got pushed 1000 to this ring by RXDMA 1001 */ 1002 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_OFFSET 0x0000000c 1003 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_LSB 17 1004 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_MASK 0x00020000 1005 1006 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED 1007 1008 Field filled in by RXDMA 1009 1010 1011 1012 Set when at least one frame during this PPDU got pushed 1013 to this ring by RXDMA 1014 */ 1015 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_OFFSET 0x0000000c 1016 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_LSB 18 1017 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_MASK 0x00040000 1018 1019 /* Description RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED 1020 1021 Field filled in by RXDMA 1022 1023 1024 1025 Set when at least one frame during this PPDU got pushed 1026 to this ring by RXDMA 1027 */ 1028 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_OFFSET 0x0000000c 1029 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_LSB 19 1030 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_MASK 0x00080000 1031 1032 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE 1033 1034 Field only valid when HT_control_info_valid is set. 1035 1036 1037 1038 Indicates what the PHY receive type was for receiving 1039 this frame. Can help determine if the HT_CONTROL field shall 1040 be interpreted as HT/VHT or HE. 1041 1042 1043 1044 <enum 0 dot11a>802.11a PPDU type 1045 1046 <enum 1 dot11b>802.11b PPDU type 1047 1048 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 1049 1050 <enum 3 dot11ac>802.11ac PPDU type 1051 1052 <enum 4 dot11ax>802.11ax PPDU type 1053 */ 1054 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_OFFSET 0x0000000c 1055 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_LSB 20 1056 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_MASK 0x00f00000 1057 1058 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3B 1059 1060 <legal 0> 1061 */ 1062 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_OFFSET 0x0000000c 1063 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_LSB 24 1064 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_MASK 0xff000000 1065 1066 /* Description RX_PPDU_END_USER_STATS_4_AST_INDEX 1067 1068 This field indicates the index of the AST entry 1069 corresponding to this MPDU. It is provided by the GSE module 1070 instantiated in RXPCU. 1071 1072 A value of 0xFFFF indicates an invalid AST index, 1073 meaning that No AST entry was found or NO AST search was 1074 performed 1075 1076 <legal all> 1077 */ 1078 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_OFFSET 0x00000010 1079 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_LSB 0 1080 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_MASK 0x0000ffff 1081 1082 /* Description RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD 1083 1084 Field only valid when Frame_control_info_valid is set. 1085 1086 1087 1088 Last successfully received Frame_control field of data 1089 frame (excluding Data NULL/ QoS Null) for this user 1090 1091 Mainly used to track the PM state of the transmitted 1092 device 1093 1094 1095 1096 NOTE: only data frame info is needed, as control and 1097 management frames are already routed to the FW. 1098 1099 <legal all> 1100 */ 1101 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_OFFSET 0x00000010 1102 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_LSB 16 1103 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_MASK 0xffff0000 1104 1105 /* Description RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL 1106 1107 Field only valid when Data_sequence_control_info_valid 1108 is set. 1109 1110 1111 1112 Sequence control field of the first data frame 1113 (excluding Data NULL or QoS Data null) received for this 1114 user with correct FCS 1115 1116 1117 1118 NOTE: only data frame info is needed, as control and 1119 management frames are already routed to the FW. 1120 1121 <legal all> 1122 */ 1123 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_OFFSET 0x00000014 1124 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_LSB 0 1125 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_MASK 0x0000ffff 1126 1127 /* Description RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD 1128 1129 Field only valid when QoS_control_info_valid is set. 1130 1131 1132 1133 Last successfully received QoS_control field of data 1134 frame (excluding Data NULL/ QoS Null) for this user 1135 1136 1137 1138 Note that in case of multi TID, this field can only 1139 reflect the last properly received MPDU, and thus can not 1140 indicate all potentially different TIDs that had been 1141 received earlier. 1142 1143 1144 1145 There are however per TID fields, that will contain 1146 among other things all buffer status info: See 1147 1148 QoSCtrl_15_8_tid??? 1149 1150 <legal all> 1151 */ 1152 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_OFFSET 0x00000014 1153 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_LSB 16 1154 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_MASK 0xffff0000 1155 1156 /* Description RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD 1157 1158 Field only valid when HT_control_info_valid is set. 1159 1160 1161 1162 Last successfully received 1163 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 1164 excluding Data NULL/ QoS Null, for this user. Data NULL/ QoS 1165 Null are excluded here because these frames are always 1166 already routed to the FW by RXDMA. 1167 1168 1169 1170 See field HT_control_field_pkt_type in case pkt_type 1171 influences if this fields interpretation as HT/VHT/HE 1172 CONTROL 1173 1174 <legal all> 1175 */ 1176 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_OFFSET 0x00000018 1177 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_LSB 0 1178 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_MASK 0xffffffff 1179 1180 /* Description RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0 1181 1182 Bitmap indicates in order of received MPDUs, which MPDUs 1183 had an passing FCS or had an error. 1184 1185 1: FCS OK 1186 1187 0: FCS error 1188 1189 <legal all> 1190 */ 1191 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_OFFSET 0x0000001c 1192 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_LSB 0 1193 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_MASK 0xffffffff 1194 1195 /* Description RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32 1196 1197 Bitmap indicates in order of received MPDUs, which MPDUs 1198 had an passing FCS or had an error. 1199 1200 1: FCS OK 1201 1202 0: FCS error 1203 1204 1205 1206 NOTE: for users 0, 1, 2 and 3, additional bitmap info 1207 (up to 256 bitmap window) is provided in 1208 RX_PPDU_END_USER_STATS_EXT TLV 1209 1210 <legal all> 1211 */ 1212 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_OFFSET 0x00000020 1213 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_LSB 0 1214 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_MASK 0xffffffff 1215 1216 /* Description RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT 1217 1218 Field filled in by RX OLE 1219 1220 Set to 0 by RXPCU 1221 1222 1223 1224 The number of MSDUs that are part of MPDUs without FCS 1225 error, that contain UDP frames. 1226 1227 <legal all> 1228 */ 1229 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_OFFSET 0x00000024 1230 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_LSB 0 1231 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_MASK 0x0000ffff 1232 1233 /* Description RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT 1234 1235 Field filled in by RX OLE 1236 1237 Set to 0 by RXPCU 1238 1239 1240 1241 The number of MSDUs that are part of MPDUs without FCS 1242 error, that contain TCP frames. 1243 1244 1245 1246 (Note: This does NOT include TCP-ACK) 1247 1248 <legal all> 1249 */ 1250 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_OFFSET 0x00000024 1251 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_LSB 16 1252 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_MASK 0xffff0000 1253 1254 /* Description RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT 1255 1256 Field filled in by RX OLE 1257 1258 Set to 0 by RXPCU 1259 1260 1261 1262 The number of MSDUs that are part of MPDUs without FCS 1263 error, that contain neither UDP or TCP frames. 1264 1265 1266 1267 Includes Management and control frames. 1268 1269 1270 1271 <legal all> 1272 */ 1273 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_OFFSET 0x00000028 1274 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_LSB 0 1275 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_MASK 0x0000ffff 1276 1277 /* Description RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT 1278 1279 Field filled in by RX OLE 1280 1281 Set to 0 by RXPCU 1282 1283 1284 1285 The number of MSDUs that are part of MPDUs without FCS 1286 error, that contain TCP ack frames. 1287 1288 <legal all> 1289 */ 1290 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_OFFSET 0x00000028 1291 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_LSB 16 1292 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_MASK 0xffff0000 1293 1294 /* Description RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR 1295 1296 Pointer that SW uses to refer back to an expected 1297 response reception. Used for Rate adaptation purposes. 1298 1299 When a reception occurrs that is not tied to an expected 1300 response, this field is set to 0x0 1301 1302 <legal all> 1303 */ 1304 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_OFFSET 0x0000002c 1305 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_LSB 0 1306 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_MASK 0xffffffff 1307 1308 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP 1309 1310 Whenever a QoS Data frame is received, the bit in this 1311 field that corresponds to the received TID shall be set. 1312 1313 ...Bitmap[0] = TID0 1314 1315 ...Bitmap[1] = TID1 1316 1317 Etc. 1318 1319 <legal all> 1320 */ 1321 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_OFFSET 0x00000030 1322 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_LSB 0 1323 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_MASK 0x0000ffff 1324 1325 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP 1326 1327 Field initialized to 0 1328 1329 For every QoS Data frame that is correctly received, the 1330 EOSP bit of that frame is copied over into the corresponding 1331 TID related field. 1332 1333 Note that this implies that the bits here represent the 1334 EOSP bit status for each TID of the last MPDU received for 1335 that TID. 1336 1337 1338 1339 received TID shall be set. 1340 1341 ...eosp_bitmap[0] = eosp of TID0 1342 1343 ...eosp_bitmap[1] = eosp of TID1 1344 1345 Etc. 1346 1347 <legal all> 1348 */ 1349 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_OFFSET 0x00000030 1350 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_LSB 16 1351 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_MASK 0xffff0000 1352 1353 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0 1354 1355 Field only valid when Received_qos_data_tid_bitmap[0] is 1356 set 1357 1358 1359 1360 QoS control field bits 15-8 of the last properly 1361 received MPDU with TID0 1362 */ 1363 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_OFFSET 0x00000034 1364 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_LSB 0 1365 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_MASK 0x000000ff 1366 1367 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1 1368 1369 Field only valid when Received_qos_data_tid_bitmap[1] is 1370 set 1371 1372 1373 1374 QoS control field bits 15-8 of the last properly 1375 received MPDU with TID1 1376 */ 1377 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_OFFSET 0x00000034 1378 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_LSB 8 1379 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_MASK 0x0000ff00 1380 1381 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2 1382 1383 Field only valid when Received_qos_data_tid_bitmap[2] is 1384 set 1385 1386 1387 1388 QoS control field bits 15-8 of the last properly 1389 received MPDU with TID2 1390 */ 1391 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_OFFSET 0x00000034 1392 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_LSB 16 1393 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_MASK 0x00ff0000 1394 1395 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3 1396 1397 Field only valid when Received_qos_data_tid_bitmap[3] is 1398 set 1399 1400 1401 1402 QoS control field bits 15-8 of the last properly 1403 received MPDU with TID3 1404 */ 1405 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_OFFSET 0x00000034 1406 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_LSB 24 1407 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_MASK 0xff000000 1408 1409 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4 1410 1411 Field only valid when Received_qos_data_tid_bitmap[4] is 1412 set 1413 1414 1415 1416 QoS control field bits 15-8 of the last properly 1417 received MPDU with TID4 1418 */ 1419 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_OFFSET 0x00000038 1420 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_LSB 0 1421 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_MASK 0x000000ff 1422 1423 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5 1424 1425 Field only valid when Received_qos_data_tid_bitmap[5] is 1426 set 1427 1428 1429 1430 QoS control field bits 15-8 of the last properly 1431 received MPDU with TID5 1432 */ 1433 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_OFFSET 0x00000038 1434 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_LSB 8 1435 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_MASK 0x0000ff00 1436 1437 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6 1438 1439 Field only valid when Received_qos_data_tid_bitmap[6] is 1440 set 1441 1442 1443 1444 QoS control field bits 15-8 of the last properly 1445 received MPDU with TID6 1446 */ 1447 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_OFFSET 0x00000038 1448 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_LSB 16 1449 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_MASK 0x00ff0000 1450 1451 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7 1452 1453 Field only valid when Received_qos_data_tid_bitmap[7] is 1454 set 1455 1456 1457 1458 QoS control field bits 15-8 of the last properly 1459 received MPDU with TID7 1460 */ 1461 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_OFFSET 0x00000038 1462 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_LSB 24 1463 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_MASK 0xff000000 1464 1465 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8 1466 1467 Field only valid when Received_qos_data_tid_bitmap[8] is 1468 set 1469 1470 1471 1472 QoS control field bits 15-8 of the last properly 1473 received MPDU with TID8 1474 */ 1475 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_OFFSET 0x0000003c 1476 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_LSB 0 1477 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_MASK 0x000000ff 1478 1479 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9 1480 1481 Field only valid when Received_qos_data_tid_bitmap[9] is 1482 set 1483 1484 1485 1486 QoS control field bits 15-8 of the last properly 1487 received MPDU with TID9 1488 */ 1489 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_OFFSET 0x0000003c 1490 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_LSB 8 1491 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_MASK 0x0000ff00 1492 1493 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10 1494 1495 Field only valid when Received_qos_data_tid_bitmap[10] 1496 is set 1497 1498 1499 1500 QoS control field bits 15-8 of the last properly 1501 received MPDU with TID10 1502 */ 1503 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_OFFSET 0x0000003c 1504 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_LSB 16 1505 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_MASK 0x00ff0000 1506 1507 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11 1508 1509 Field only valid when Received_qos_data_tid_bitmap[11] 1510 is set 1511 1512 1513 1514 QoS control field bits 15-8 of the last properly 1515 received MPDU with TID11 1516 */ 1517 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_OFFSET 0x0000003c 1518 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_LSB 24 1519 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_MASK 0xff000000 1520 1521 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12 1522 1523 Field only valid when Received_qos_data_tid_bitmap[12] 1524 is set 1525 1526 1527 1528 QoS control field bits 15-8 of the last properly 1529 received MPDU with TID12 1530 */ 1531 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_OFFSET 0x00000040 1532 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_LSB 0 1533 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_MASK 0x000000ff 1534 1535 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13 1536 1537 Field only valid when Received_qos_data_tid_bitmap[13] 1538 is set 1539 1540 1541 1542 QoS control field bits 15-8 of the last properly 1543 received MPDU with TID13 1544 */ 1545 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_OFFSET 0x00000040 1546 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_LSB 8 1547 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_MASK 0x0000ff00 1548 1549 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14 1550 1551 Field only valid when Received_qos_data_tid_bitmap[14] 1552 is set 1553 1554 1555 1556 QoS control field bits 15-8 of the last properly 1557 received MPDU with TID14 1558 */ 1559 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_OFFSET 0x00000040 1560 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_LSB 16 1561 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_MASK 0x00ff0000 1562 1563 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15 1564 1565 Field only valid when Received_qos_data_tid_bitmap[15] 1566 is set 1567 1568 1569 1570 QoS control field bits 15-8 of the last properly 1571 received MPDU with TID15 1572 */ 1573 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_OFFSET 0x00000040 1574 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_LSB 24 1575 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_MASK 0xff000000 1576 1577 1578 #endif // _RX_PPDU_END_USER_STATS_H_ 1579