1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // DO NOT EDIT! This file is automatically generated 20 // These definitions are tied to a particular hardware layout 21 22 23 #ifndef _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 24 #define _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 29 // ################ START SUMMARY ################# 30 // 31 // Dword Fields 32 // 0 filter_pass_mpdus[0], filter_pass_mpdus_fcs_ok[1], monitor_direct_mpdus[2], monitor_direct_mpdus_fcs_ok[3], monitor_other_mpdus[4], monitor_other_mpdus_fcs_ok[5], reserved_0[15:6], phy_ppdu_id[31:16] 33 // 34 // ################ END SUMMARY ################# 35 36 #define NUM_OF_DWORDS_RX_RXPCU_CLASSIFICATION_OVERVIEW 1 37 38 struct rx_rxpcu_classification_overview { 39 uint32_t filter_pass_mpdus : 1, //[0] 40 filter_pass_mpdus_fcs_ok : 1, //[1] 41 monitor_direct_mpdus : 1, //[2] 42 monitor_direct_mpdus_fcs_ok : 1, //[3] 43 monitor_other_mpdus : 1, //[4] 44 monitor_other_mpdus_fcs_ok : 1, //[5] 45 reserved_0 : 10, //[15:6] 46 phy_ppdu_id : 16; //[31:16] 47 }; 48 49 /* 50 51 filter_pass_mpdus 52 53 When set, at least one Filter Pass MPDU has been 54 received. FCS might or might not have been passing 55 56 <legal all> 57 58 filter_pass_mpdus_fcs_ok 59 60 When set, at least one Filter Pass MPDU has been 61 received that has a correct FCS. 62 63 <legal all> 64 65 monitor_direct_mpdus 66 67 When set, at least one Monitor Direct MPDU has been 68 received. FCS might or might not have been passing 69 70 <legal all> 71 72 monitor_direct_mpdus_fcs_ok 73 74 When set, at least one Monitor Direct MPDU has been 75 received that has a correct FCS. 76 77 <legal all> 78 79 monitor_other_mpdus 80 81 When set, at least one Monitor Direct MPDU has been 82 received. FCS might or might not have been passing 83 84 <legal all> 85 86 monitor_other_mpdus_fcs_ok 87 88 When set, at least one Monitor Direct MPDU has been 89 received that has a correct FCS. 90 91 <legal all> 92 93 reserved_0 94 95 <legal 0> 96 97 phy_ppdu_id 98 99 A ppdu counter value that PHY increments for every PPDU 100 received. The counter value wraps around 101 102 <legal all> 103 */ 104 105 106 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS 107 108 When set, at least one Filter Pass MPDU has been 109 received. FCS might or might not have been passing 110 111 <legal all> 112 */ 113 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_OFFSET 0x00000000 114 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_LSB 0 115 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_MASK 0x00000001 116 117 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK 118 119 When set, at least one Filter Pass MPDU has been 120 received that has a correct FCS. 121 122 <legal all> 123 */ 124 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000 125 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_LSB 1 126 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002 127 128 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS 129 130 When set, at least one Monitor Direct MPDU has been 131 received. FCS might or might not have been passing 132 133 <legal all> 134 */ 135 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000 136 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_LSB 2 137 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_MASK 0x00000004 138 139 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK 140 141 When set, at least one Monitor Direct MPDU has been 142 received that has a correct FCS. 143 144 <legal all> 145 */ 146 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000 147 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3 148 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008 149 150 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS 151 152 When set, at least one Monitor Direct MPDU has been 153 received. FCS might or might not have been passing 154 155 <legal all> 156 */ 157 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_OFFSET 0x00000000 158 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_LSB 4 159 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_MASK 0x00000010 160 161 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK 162 163 When set, at least one Monitor Direct MPDU has been 164 received that has a correct FCS. 165 166 <legal all> 167 */ 168 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000 169 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5 170 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020 171 172 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0 173 174 <legal 0> 175 */ 176 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_OFFSET 0x00000000 177 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_LSB 6 178 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_MASK 0x0000ffc0 179 180 /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID 181 182 A ppdu counter value that PHY increments for every PPDU 183 received. The counter value wraps around 184 185 <legal all> 186 */ 187 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_OFFSET 0x00000000 188 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_LSB 16 189 #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_MASK 0xffff0000 190 191 192 #endif // _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 193