1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 6*5113495bSYour Name * above copyright notice and this permission notice appear in all 7*5113495bSYour Name * copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 17*5113495bSYour Name */ 18*5113495bSYour Name 19*5113495bSYour Name // DO NOT EDIT! This file is automatically generated 20*5113495bSYour Name // These definitions are tied to a particular hardware layout 21*5113495bSYour Name 22*5113495bSYour Name 23*5113495bSYour Name #ifndef _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 24*5113495bSYour Name #define _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 25*5113495bSYour Name #if !defined(__ASSEMBLER__) 26*5113495bSYour Name #endif 27*5113495bSYour Name 28*5113495bSYour Name 29*5113495bSYour Name // ################ START SUMMARY ################# 30*5113495bSYour Name // 31*5113495bSYour Name // Dword Fields 32*5113495bSYour Name // 0 filter_pass_mpdus[0], filter_pass_mpdus_fcs_ok[1], monitor_direct_mpdus[2], monitor_direct_mpdus_fcs_ok[3], monitor_other_mpdus[4], monitor_other_mpdus_fcs_ok[5], reserved_0[15:6], phy_ppdu_id[31:16] 33*5113495bSYour Name // 34*5113495bSYour Name // ################ END SUMMARY ################# 35*5113495bSYour Name 36*5113495bSYour Name #define NUM_OF_DWORDS_RX_RXPCU_CLASSIFICATION_OVERVIEW 1 37*5113495bSYour Name 38*5113495bSYour Name struct rx_rxpcu_classification_overview { 39*5113495bSYour Name uint32_t filter_pass_mpdus : 1, //[0] 40*5113495bSYour Name filter_pass_mpdus_fcs_ok : 1, //[1] 41*5113495bSYour Name monitor_direct_mpdus : 1, //[2] 42*5113495bSYour Name monitor_direct_mpdus_fcs_ok : 1, //[3] 43*5113495bSYour Name monitor_other_mpdus : 1, //[4] 44*5113495bSYour Name monitor_other_mpdus_fcs_ok : 1, //[5] 45*5113495bSYour Name reserved_0 : 10, //[15:6] 46*5113495bSYour Name phy_ppdu_id : 16; //[31:16] 47*5113495bSYour Name }; 48*5113495bSYour Name 49*5113495bSYour Name /* 50*5113495bSYour Name 51*5113495bSYour Name filter_pass_mpdus 52*5113495bSYour Name 53*5113495bSYour Name When set, at least one Filter Pass MPDU has been 54*5113495bSYour Name received. FCS might or might not have been passing 55*5113495bSYour Name 56*5113495bSYour Name <legal all> 57*5113495bSYour Name 58*5113495bSYour Name filter_pass_mpdus_fcs_ok 59*5113495bSYour Name 60*5113495bSYour Name When set, at least one Filter Pass MPDU has been 61*5113495bSYour Name received that has a correct FCS. 62*5113495bSYour Name 63*5113495bSYour Name <legal all> 64*5113495bSYour Name 65*5113495bSYour Name monitor_direct_mpdus 66*5113495bSYour Name 67*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 68*5113495bSYour Name received. FCS might or might not have been passing 69*5113495bSYour Name 70*5113495bSYour Name <legal all> 71*5113495bSYour Name 72*5113495bSYour Name monitor_direct_mpdus_fcs_ok 73*5113495bSYour Name 74*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 75*5113495bSYour Name received that has a correct FCS. 76*5113495bSYour Name 77*5113495bSYour Name <legal all> 78*5113495bSYour Name 79*5113495bSYour Name monitor_other_mpdus 80*5113495bSYour Name 81*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 82*5113495bSYour Name received. FCS might or might not have been passing 83*5113495bSYour Name 84*5113495bSYour Name <legal all> 85*5113495bSYour Name 86*5113495bSYour Name monitor_other_mpdus_fcs_ok 87*5113495bSYour Name 88*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 89*5113495bSYour Name received that has a correct FCS. 90*5113495bSYour Name 91*5113495bSYour Name <legal all> 92*5113495bSYour Name 93*5113495bSYour Name reserved_0 94*5113495bSYour Name 95*5113495bSYour Name <legal 0> 96*5113495bSYour Name 97*5113495bSYour Name phy_ppdu_id 98*5113495bSYour Name 99*5113495bSYour Name A ppdu counter value that PHY increments for every PPDU 100*5113495bSYour Name received. The counter value wraps around 101*5113495bSYour Name 102*5113495bSYour Name <legal all> 103*5113495bSYour Name */ 104*5113495bSYour Name 105*5113495bSYour Name 106*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS 107*5113495bSYour Name 108*5113495bSYour Name When set, at least one Filter Pass MPDU has been 109*5113495bSYour Name received. FCS might or might not have been passing 110*5113495bSYour Name 111*5113495bSYour Name <legal all> 112*5113495bSYour Name */ 113*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_OFFSET 0x00000000 114*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_LSB 0 115*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_MASK 0x00000001 116*5113495bSYour Name 117*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK 118*5113495bSYour Name 119*5113495bSYour Name When set, at least one Filter Pass MPDU has been 120*5113495bSYour Name received that has a correct FCS. 121*5113495bSYour Name 122*5113495bSYour Name <legal all> 123*5113495bSYour Name */ 124*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000 125*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_LSB 1 126*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002 127*5113495bSYour Name 128*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS 129*5113495bSYour Name 130*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 131*5113495bSYour Name received. FCS might or might not have been passing 132*5113495bSYour Name 133*5113495bSYour Name <legal all> 134*5113495bSYour Name */ 135*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000 136*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_LSB 2 137*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_MASK 0x00000004 138*5113495bSYour Name 139*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK 140*5113495bSYour Name 141*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 142*5113495bSYour Name received that has a correct FCS. 143*5113495bSYour Name 144*5113495bSYour Name <legal all> 145*5113495bSYour Name */ 146*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000 147*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3 148*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008 149*5113495bSYour Name 150*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS 151*5113495bSYour Name 152*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 153*5113495bSYour Name received. FCS might or might not have been passing 154*5113495bSYour Name 155*5113495bSYour Name <legal all> 156*5113495bSYour Name */ 157*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_OFFSET 0x00000000 158*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_LSB 4 159*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_MASK 0x00000010 160*5113495bSYour Name 161*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK 162*5113495bSYour Name 163*5113495bSYour Name When set, at least one Monitor Direct MPDU has been 164*5113495bSYour Name received that has a correct FCS. 165*5113495bSYour Name 166*5113495bSYour Name <legal all> 167*5113495bSYour Name */ 168*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000 169*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5 170*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020 171*5113495bSYour Name 172*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0 173*5113495bSYour Name 174*5113495bSYour Name <legal 0> 175*5113495bSYour Name */ 176*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_OFFSET 0x00000000 177*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_LSB 6 178*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_MASK 0x0000ffc0 179*5113495bSYour Name 180*5113495bSYour Name /* Description RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID 181*5113495bSYour Name 182*5113495bSYour Name A ppdu counter value that PHY increments for every PPDU 183*5113495bSYour Name received. The counter value wraps around 184*5113495bSYour Name 185*5113495bSYour Name <legal all> 186*5113495bSYour Name */ 187*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_OFFSET 0x00000000 188*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_LSB 16 189*5113495bSYour Name #define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_MASK 0xffff0000 190*5113495bSYour Name 191*5113495bSYour Name 192*5113495bSYour Name #endif // _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_ 193