xref: /wlan-driver/fw-api/hw/qca8074/v1/rx_timing_offset_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2018 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 // $ATH_LICENSE_HW_HDR_C$
20 //
21 // DO NOT EDIT!  This file is automatically generated
22 //               These definitions are tied to a particular hardware layout
23 
24 
25 #ifndef _RX_TIMING_OFFSET_INFO_H_
26 #define _RX_TIMING_OFFSET_INFO_H_
27 #if !defined(__ASSEMBLER__)
28 #endif
29 
30 
31 // ################ START SUMMARY #################
32 //
33 //	Dword	Fields
34 //	0	residual_phase_offset[11:0], reserved[31:12]
35 //
36 // ################ END SUMMARY #################
37 
38 #define NUM_OF_DWORDS_RX_TIMING_OFFSET_INFO 1
39 
40 struct rx_timing_offset_info {
41              uint32_t residual_phase_offset           : 12, //[11:0]
42                       reserved                        : 20; //[31:12]
43 };
44 
45 /*
46 
47 residual_phase_offset
48 
49 			Cumulative reference frequency error at end of RX
50 
51 			<legal all>
52 
53 reserved
54 
55 			<legal 0>
56 */
57 
58 
59 /* Description		RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET
60 
61 			Cumulative reference frequency error at end of RX
62 
63 			<legal all>
64 */
65 #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_OFFSET         0x00000000
66 #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_LSB            0
67 #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_MASK           0x00000fff
68 
69 /* Description		RX_TIMING_OFFSET_INFO_0_RESERVED
70 
71 			<legal 0>
72 */
73 #define RX_TIMING_OFFSET_INFO_0_RESERVED_OFFSET                      0x00000000
74 #define RX_TIMING_OFFSET_INFO_0_RESERVED_LSB                         12
75 #define RX_TIMING_OFFSET_INFO_0_RESERVED_MASK                        0xfffff000
76 
77 
78 #endif // _RX_TIMING_OFFSET_INFO_H_
79