1 /* 2 * Copyright (c) 2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // $ATH_LICENSE_HW_HDR_C$ 20 // 21 // DO NOT EDIT! This file is automatically generated 22 // These definitions are tied to a particular hardware layout 23 24 25 #ifndef _RXPCU_PPDU_END_INFO_H_ 26 #define _RXPCU_PPDU_END_INFO_H_ 27 #if !defined(__ASSEMBLER__) 28 #endif 29 30 #include "phyrx_abort_request_info.h" 31 #include "macrx_abort_request_info.h" 32 33 // ################ START SUMMARY ################# 34 // 35 // Dword Fields 36 // 0 wb_timestamp_lower_32[31:0] 37 // 1 wb_timestamp_upper_32[31:0] 38 // 2 rx_antenna[23:0], tx_ht_vht_ack[24], unsupported_mu_nc[25], otp_txbf_disable[26], previous_tlv_corrupted[27], phyrx_abort_request_info_valid[28], macrx_abort_request_info_valid[29], reserved[31:30] 39 // 3 coex_bt_tx_from_start_of_rx[0], coex_bt_tx_after_start_of_rx[1], coex_wan_tx_from_start_of_rx[2], coex_wan_tx_after_start_of_rx[3], coex_wlan_tx_from_start_of_rx[4], coex_wlan_tx_after_start_of_rx[5], mpdu_delimiter_errors_seen[6], ftm_tm[8:7], dialog_token[16:9], follow_up_dialog_token[24:17], bb_captured_channel[25], reserved_3[31:26] 40 // 4 before_mpdu_count_passing_fcs[7:0], before_mpdu_count_failing_fcs[15:8], after_mpdu_count_passing_fcs[23:16], after_mpdu_count_failing_fcs[31:24] 41 // 5 phy_timestamp_tx_lower_32[31:0] 42 // 6 phy_timestamp_tx_upper_32[31:0] 43 // 7 bb_length[15:0], bb_data[16], reserved_7[31:17] 44 // 8 rx_ppdu_duration[23:0], reserved_8[31:24] 45 // 9 ast_index[15:0], ast_index_valid[16], reserved_9[31:17] 46 // 10 struct phyrx_abort_request_info phyrx_abort_request_info_details; 47 // 11 struct macrx_abort_request_info macrx_abort_request_info_details; 48 // 12 rx_ppdu_end_marker[31:0] 49 // 50 // ################ END SUMMARY ################# 51 52 #define NUM_OF_DWORDS_RXPCU_PPDU_END_INFO 13 53 54 struct rxpcu_ppdu_end_info { 55 uint32_t wb_timestamp_lower_32 : 32; //[31:0] 56 uint32_t wb_timestamp_upper_32 : 32; //[31:0] 57 uint32_t rx_antenna : 24, //[23:0] 58 tx_ht_vht_ack : 1, //[24] 59 unsupported_mu_nc : 1, //[25] 60 otp_txbf_disable : 1, //[26] 61 previous_tlv_corrupted : 1, //[27] 62 phyrx_abort_request_info_valid : 1, //[28] 63 macrx_abort_request_info_valid : 1, //[29] 64 reserved : 2; //[31:30] 65 uint32_t coex_bt_tx_from_start_of_rx : 1, //[0] 66 coex_bt_tx_after_start_of_rx : 1, //[1] 67 coex_wan_tx_from_start_of_rx : 1, //[2] 68 coex_wan_tx_after_start_of_rx : 1, //[3] 69 coex_wlan_tx_from_start_of_rx : 1, //[4] 70 coex_wlan_tx_after_start_of_rx : 1, //[5] 71 mpdu_delimiter_errors_seen : 1, //[6] 72 ftm_tm : 2, //[8:7] 73 dialog_token : 8, //[16:9] 74 follow_up_dialog_token : 8, //[24:17] 75 bb_captured_channel : 1, //[25] 76 reserved_3 : 6; //[31:26] 77 uint32_t before_mpdu_count_passing_fcs : 8, //[7:0] 78 before_mpdu_count_failing_fcs : 8, //[15:8] 79 after_mpdu_count_passing_fcs : 8, //[23:16] 80 after_mpdu_count_failing_fcs : 8; //[31:24] 81 uint32_t phy_timestamp_tx_lower_32 : 32; //[31:0] 82 uint32_t phy_timestamp_tx_upper_32 : 32; //[31:0] 83 uint32_t bb_length : 16, //[15:0] 84 bb_data : 1, //[16] 85 reserved_7 : 15; //[31:17] 86 uint32_t rx_ppdu_duration : 24, //[23:0] 87 reserved_8 : 8; //[31:24] 88 uint32_t ast_index : 16, //[15:0] 89 ast_index_valid : 1, //[16] 90 reserved_9 : 15; //[31:17] 91 struct phyrx_abort_request_info phyrx_abort_request_info_details; 92 struct macrx_abort_request_info macrx_abort_request_info_details; 93 uint16_t reserved_after_struct16 : 16; //[31:16] 94 uint32_t rx_ppdu_end_marker : 32; //[31:0] 95 }; 96 97 /* 98 99 wb_timestamp_lower_32 100 101 WLAN/BT timestamp is a 1 usec resolution timestamp which 102 does not get updated based on receive beacon like TSF. The 103 same rules for capturing tsf_timestamp are used to capture 104 the wb_timestamp. This field represents the lower 32 bits of 105 the 64-bit timestamp 106 107 wb_timestamp_upper_32 108 109 WLAN/BT timestamp is a 1 usec resolution timestamp which 110 does not get updated based on receive beacon like TSF. The 111 same rules for capturing tsf_timestamp are used to capture 112 the wb_timestamp. This field represents the upper 32 bits of 113 the 64-bit timestamp 114 115 rx_antenna 116 117 Receive antenna value ??? 118 119 tx_ht_vht_ack 120 121 Indicates that a HT or VHT Ack/BA frame was transmitted 122 in response to this receive packet. 123 124 unsupported_mu_nc 125 126 Set if MU Nc > 2 in received NDPA. 127 128 If this bit is set, even though AID and BSSID are 129 matched, MAC doesn't send tx_expect_ndp to PHY, because MU 130 Nc > 2 is not supported in Helium. 131 132 otp_txbf_disable 133 134 Set if either OTP_SUBFEE_DISABLE or OTP_TXBF_DISABLE is 135 set and if RXPU receives directed NDPA frame. Then, RXPCU 136 should not send TX_EXPECT_NDP TLV to SW but set this bit to 137 inform SW. 138 139 previous_tlv_corrupted 140 141 When set, the TLV preceding this RXPCU_END_INFO TLV 142 within the RX_PPDU_END TLV, is corrupted. Not the entire TLV 143 was received.... Likely due to an abort scenario... If abort 144 is to blame, see the abort data datastructure for details. 145 146 <legal all> 147 148 phyrx_abort_request_info_valid 149 150 When set, the PHY sent an PHYRX_ABORT_REQUEST TLV to 151 RXPCU. The abort fields embedded in this TLV contain valid 152 info. 153 154 <legal all> 155 156 macrx_abort_request_info_valid 157 158 When set, the PHY sent an PHYRX_ABORT_REQUEST TLV to 159 RXPCU. The abort fields embedded in this TLV contain valid 160 info. 161 162 <legal all> 163 164 reserved 165 166 <legal 0> 167 168 coex_bt_tx_from_start_of_rx 169 170 Set when BT TX was ongoing when WLAN RX started 171 172 coex_bt_tx_after_start_of_rx 173 174 175 coex_wan_tx_from_start_of_rx 176 177 Set when WAN TX was ongoing when WLAN RX started 178 179 coex_wan_tx_after_start_of_rx 180 181 Set when WAN TX started while WLAN RX was already 182 ongoing 183 184 coex_wlan_tx_from_start_of_rx 185 186 Set when other WLAN TX was ongoing when WLAN RX started 187 188 coex_wlan_tx_after_start_of_rx 189 190 Set when other WLAN TX started while WLAN RX was already 191 ongoing 192 193 mpdu_delimiter_errors_seen 194 195 When set, MPDU delimiter errors have been detected 196 during this PPDU reception 197 198 ftm_tm 199 200 Indicate the timestamp is for the FTM or TM frame 201 202 203 204 0: non TM or FTM frame 205 206 1: FTM frame 207 208 2: TM frame 209 210 3: reserved 211 212 <legal all> 213 214 dialog_token 215 216 The dialog token in the FTM or TM frame. Only valid when 217 the FTM is set. Clear to 254 for a non-FTM frame 218 219 <legal all> 220 221 follow_up_dialog_token 222 223 The follow up dialog token in the FTM or TM frame. Only 224 valid when the FTM is set. Clear to 0 for a non-FTM frame, 225 The follow up dialog token in the FTM frame. Only valid when 226 the FTM is set. Clear to 255 for a non-FTM frame<legal all> 227 228 bb_captured_channel 229 230 Set by RXPCU when the following conditions are met: 231 232 233 234 Directed (=> unicast) TM or FTM frame has been received 235 with passing FCS 236 237 PHYRX_PKT_END. Location_info_valid is set 238 239 240 241 <legal all> 242 243 reserved_3 244 245 <legal 0> 246 247 before_mpdu_count_passing_fcs 248 249 Number of MPDUs received in this PPDU that passed the 250 FCS check before the Coex TX started 251 252 before_mpdu_count_failing_fcs 253 254 Number of MPDUs received in this PPDU that failed the 255 FCS check before the Coex TX started 256 257 after_mpdu_count_passing_fcs 258 259 Number of MPDUs received in this PPDU that passed the 260 FCS check after the moment the Coex TX started 261 262 263 264 (Note: The partially received MPDU when the COEX tx 265 start event came in falls in the after category) 266 267 after_mpdu_count_failing_fcs 268 269 Number of MPDUs received in this PPDU that failed the 270 FCS check after the moment the Coex TX started 271 272 273 274 (Note: The partially received MPDU when the COEX tx 275 start event came in falls in the after category) 276 277 phy_timestamp_tx_lower_32 278 279 The PHY timestamp in the AMPI of the most recent rising 280 edge (TODO: of what ???) after the TX_PHY_DESC. This field 281 indicates the lower 32 bits of the timestamp 282 283 phy_timestamp_tx_upper_32 284 285 The PHY timestamp in the AMPI of the most recent rising 286 edge (TODO: of what ???) after the TX_PHY_DESC. This field 287 indicates the upper 32 bits of the timestamp 288 289 bb_length 290 291 Indicates the number of bytes of baseband information 292 for PPDUs where the BB descriptor preamble type is 0x80 to 293 0xFF which indicates that this is not a normal PPDU but 294 rather contains baseband debug information. 295 296 TODO: Is this still needed ??? 297 298 bb_data 299 300 Indicates that BB data associated with this PPDU will 301 exist in the receive buffer. The exact contents of this BB 302 data can be found by decoding the BB TLV in the buffer 303 associated with the BB data. See vector_fragment in the 304 Helium_mac_phy_interface.docx 305 306 reserved_7 307 308 Reserved: HW should fill with 0, FW should ignore. 309 310 rx_ppdu_duration 311 312 The length of this PPDU reception in us 313 314 reserved_8 315 316 <legal 0> 317 318 ast_index 319 320 The AST index of the receive Ack/BA. This information 321 is provided from the TXPCU to the RXPCU for receive Ack/BA 322 for implicit beamforming. 323 324 <legal all> 325 326 ast_index_valid 327 328 Indicates that ast_index is valid. Should only be set 329 for receive Ack/BA where single stream implicit sounding is 330 captured. 331 332 reserved_9 333 334 <legal 0> 335 336 struct phyrx_abort_request_info phyrx_abort_request_info_details 337 338 Field only valid when Phyrx_abort_request_info_valid is 339 set 340 341 The reason why PHY generated an abort request 342 343 struct macrx_abort_request_info macrx_abort_request_info_details 344 345 Field only valid when macrx_abort_request_info_valid is 346 set 347 348 The reason why MACRX generated an abort request 349 350 rx_ppdu_end_marker 351 352 Field used by SW to double check that their structure 353 alignment is in sync with what HW has done. 354 355 <legal 0xAABBCCDD> 356 */ 357 358 359 /* Description RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32 360 361 WLAN/BT timestamp is a 1 usec resolution timestamp which 362 does not get updated based on receive beacon like TSF. The 363 same rules for capturing tsf_timestamp are used to capture 364 the wb_timestamp. This field represents the lower 32 bits of 365 the 64-bit timestamp 366 */ 367 #define RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32_OFFSET 0x00000000 368 #define RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32_LSB 0 369 #define RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32_MASK 0xffffffff 370 371 /* Description RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32 372 373 WLAN/BT timestamp is a 1 usec resolution timestamp which 374 does not get updated based on receive beacon like TSF. The 375 same rules for capturing tsf_timestamp are used to capture 376 the wb_timestamp. This field represents the upper 32 bits of 377 the 64-bit timestamp 378 */ 379 #define RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32_OFFSET 0x00000004 380 #define RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32_LSB 0 381 #define RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32_MASK 0xffffffff 382 383 /* Description RXPCU_PPDU_END_INFO_2_RX_ANTENNA 384 385 Receive antenna value ??? 386 */ 387 #define RXPCU_PPDU_END_INFO_2_RX_ANTENNA_OFFSET 0x00000008 388 #define RXPCU_PPDU_END_INFO_2_RX_ANTENNA_LSB 0 389 #define RXPCU_PPDU_END_INFO_2_RX_ANTENNA_MASK 0x00ffffff 390 391 /* Description RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK 392 393 Indicates that a HT or VHT Ack/BA frame was transmitted 394 in response to this receive packet. 395 */ 396 #define RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK_OFFSET 0x00000008 397 #define RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK_LSB 24 398 #define RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK_MASK 0x01000000 399 400 /* Description RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC 401 402 Set if MU Nc > 2 in received NDPA. 403 404 If this bit is set, even though AID and BSSID are 405 matched, MAC doesn't send tx_expect_ndp to PHY, because MU 406 Nc > 2 is not supported in Helium. 407 */ 408 #define RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC_OFFSET 0x00000008 409 #define RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC_LSB 25 410 #define RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC_MASK 0x02000000 411 412 /* Description RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE 413 414 Set if either OTP_SUBFEE_DISABLE or OTP_TXBF_DISABLE is 415 set and if RXPU receives directed NDPA frame. Then, RXPCU 416 should not send TX_EXPECT_NDP TLV to SW but set this bit to 417 inform SW. 418 */ 419 #define RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE_OFFSET 0x00000008 420 #define RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE_LSB 26 421 #define RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE_MASK 0x04000000 422 423 /* Description RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED 424 425 When set, the TLV preceding this RXPCU_END_INFO TLV 426 within the RX_PPDU_END TLV, is corrupted. Not the entire TLV 427 was received.... Likely due to an abort scenario... If abort 428 is to blame, see the abort data datastructure for details. 429 430 <legal all> 431 */ 432 #define RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED_OFFSET 0x00000008 433 #define RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED_LSB 27 434 #define RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED_MASK 0x08000000 435 436 /* Description RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID 437 438 When set, the PHY sent an PHYRX_ABORT_REQUEST TLV to 439 RXPCU. The abort fields embedded in this TLV contain valid 440 info. 441 442 <legal all> 443 */ 444 #define RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID_OFFSET 0x00000008 445 #define RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID_LSB 28 446 #define RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID_MASK 0x10000000 447 448 /* Description RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID 449 450 When set, the PHY sent an PHYRX_ABORT_REQUEST TLV to 451 RXPCU. The abort fields embedded in this TLV contain valid 452 info. 453 454 <legal all> 455 */ 456 #define RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID_OFFSET 0x00000008 457 #define RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID_LSB 29 458 #define RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID_MASK 0x20000000 459 460 /* Description RXPCU_PPDU_END_INFO_2_RESERVED 461 462 <legal 0> 463 */ 464 #define RXPCU_PPDU_END_INFO_2_RESERVED_OFFSET 0x00000008 465 #define RXPCU_PPDU_END_INFO_2_RESERVED_LSB 30 466 #define RXPCU_PPDU_END_INFO_2_RESERVED_MASK 0xc0000000 467 468 /* Description RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX 469 470 Set when BT TX was ongoing when WLAN RX started 471 */ 472 #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX_OFFSET 0x0000000c 473 #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX_LSB 0 474 #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX_MASK 0x00000001 475 476 /* Description RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX 477 478 */ 479 #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX_OFFSET 0x0000000c 480 #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX_LSB 1 481 #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX_MASK 0x00000002 482 483 /* Description RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX 484 485 Set when WAN TX was ongoing when WLAN RX started 486 */ 487 #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX_OFFSET 0x0000000c 488 #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX_LSB 2 489 #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX_MASK 0x00000004 490 491 /* Description RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX 492 493 Set when WAN TX started while WLAN RX was already 494 ongoing 495 */ 496 #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX_OFFSET 0x0000000c 497 #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX_LSB 3 498 #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX_MASK 0x00000008 499 500 /* Description RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX 501 502 Set when other WLAN TX was ongoing when WLAN RX started 503 */ 504 #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX_OFFSET 0x0000000c 505 #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX_LSB 4 506 #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX_MASK 0x00000010 507 508 /* Description RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX 509 510 Set when other WLAN TX started while WLAN RX was already 511 ongoing 512 */ 513 #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX_OFFSET 0x0000000c 514 #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX_LSB 5 515 #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX_MASK 0x00000020 516 517 /* Description RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN 518 519 When set, MPDU delimiter errors have been detected 520 during this PPDU reception 521 */ 522 #define RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN_OFFSET 0x0000000c 523 #define RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN_LSB 6 524 #define RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN_MASK 0x00000040 525 526 /* Description RXPCU_PPDU_END_INFO_3_FTM_TM 527 528 Indicate the timestamp is for the FTM or TM frame 529 530 531 532 0: non TM or FTM frame 533 534 1: FTM frame 535 536 2: TM frame 537 538 3: reserved 539 540 <legal all> 541 */ 542 #define RXPCU_PPDU_END_INFO_3_FTM_TM_OFFSET 0x0000000c 543 #define RXPCU_PPDU_END_INFO_3_FTM_TM_LSB 7 544 #define RXPCU_PPDU_END_INFO_3_FTM_TM_MASK 0x00000180 545 546 /* Description RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN 547 548 The dialog token in the FTM or TM frame. Only valid when 549 the FTM is set. Clear to 254 for a non-FTM frame 550 551 <legal all> 552 */ 553 #define RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN_OFFSET 0x0000000c 554 #define RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN_LSB 9 555 #define RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN_MASK 0x0001fe00 556 557 /* Description RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN 558 559 The follow up dialog token in the FTM or TM frame. Only 560 valid when the FTM is set. Clear to 0 for a non-FTM frame, 561 The follow up dialog token in the FTM frame. Only valid when 562 the FTM is set. Clear to 255 for a non-FTM frame<legal all> 563 */ 564 #define RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN_OFFSET 0x0000000c 565 #define RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN_LSB 17 566 #define RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN_MASK 0x01fe0000 567 568 /* Description RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL 569 570 Set by RXPCU when the following conditions are met: 571 572 573 574 Directed (=> unicast) TM or FTM frame has been received 575 with passing FCS 576 577 PHYRX_PKT_END. Location_info_valid is set 578 579 580 581 <legal all> 582 */ 583 #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL_OFFSET 0x0000000c 584 #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL_LSB 25 585 #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL_MASK 0x02000000 586 587 /* Description RXPCU_PPDU_END_INFO_3_RESERVED_3 588 589 <legal 0> 590 */ 591 #define RXPCU_PPDU_END_INFO_3_RESERVED_3_OFFSET 0x0000000c 592 #define RXPCU_PPDU_END_INFO_3_RESERVED_3_LSB 26 593 #define RXPCU_PPDU_END_INFO_3_RESERVED_3_MASK 0xfc000000 594 595 /* Description RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS 596 597 Number of MPDUs received in this PPDU that passed the 598 FCS check before the Coex TX started 599 */ 600 #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS_OFFSET 0x00000010 601 #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS_LSB 0 602 #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS_MASK 0x000000ff 603 604 /* Description RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS 605 606 Number of MPDUs received in this PPDU that failed the 607 FCS check before the Coex TX started 608 */ 609 #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS_OFFSET 0x00000010 610 #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS_LSB 8 611 #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS_MASK 0x0000ff00 612 613 /* Description RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS 614 615 Number of MPDUs received in this PPDU that passed the 616 FCS check after the moment the Coex TX started 617 618 619 620 (Note: The partially received MPDU when the COEX tx 621 start event came in falls in the after category) 622 */ 623 #define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS_OFFSET 0x00000010 624 #define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS_LSB 16 625 #define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS_MASK 0x00ff0000 626 627 /* Description RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_FAILING_FCS 628 629 Number of MPDUs received in this PPDU that failed the 630 FCS check after the moment the Coex TX started 631 632 633 634 (Note: The partially received MPDU when the COEX tx 635 start event came in falls in the after category) 636 */ 637 #define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_FAILING_FCS_OFFSET 0x00000010 638 #define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_FAILING_FCS_LSB 24 639 #define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_FAILING_FCS_MASK 0xff000000 640 641 /* Description RXPCU_PPDU_END_INFO_5_PHY_TIMESTAMP_TX_LOWER_32 642 643 The PHY timestamp in the AMPI of the most recent rising 644 edge (TODO: of what ???) after the TX_PHY_DESC. This field 645 indicates the lower 32 bits of the timestamp 646 */ 647 #define RXPCU_PPDU_END_INFO_5_PHY_TIMESTAMP_TX_LOWER_32_OFFSET 0x00000014 648 #define RXPCU_PPDU_END_INFO_5_PHY_TIMESTAMP_TX_LOWER_32_LSB 0 649 #define RXPCU_PPDU_END_INFO_5_PHY_TIMESTAMP_TX_LOWER_32_MASK 0xffffffff 650 651 /* Description RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_UPPER_32 652 653 The PHY timestamp in the AMPI of the most recent rising 654 edge (TODO: of what ???) after the TX_PHY_DESC. This field 655 indicates the upper 32 bits of the timestamp 656 */ 657 #define RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_UPPER_32_OFFSET 0x00000018 658 #define RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_UPPER_32_LSB 0 659 #define RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_UPPER_32_MASK 0xffffffff 660 661 /* Description RXPCU_PPDU_END_INFO_7_BB_LENGTH 662 663 Indicates the number of bytes of baseband information 664 for PPDUs where the BB descriptor preamble type is 0x80 to 665 0xFF which indicates that this is not a normal PPDU but 666 rather contains baseband debug information. 667 668 TODO: Is this still needed ??? 669 */ 670 #define RXPCU_PPDU_END_INFO_7_BB_LENGTH_OFFSET 0x0000001c 671 #define RXPCU_PPDU_END_INFO_7_BB_LENGTH_LSB 0 672 #define RXPCU_PPDU_END_INFO_7_BB_LENGTH_MASK 0x0000ffff 673 674 /* Description RXPCU_PPDU_END_INFO_7_BB_DATA 675 676 Indicates that BB data associated with this PPDU will 677 exist in the receive buffer. The exact contents of this BB 678 data can be found by decoding the BB TLV in the buffer 679 associated with the BB data. See vector_fragment in the 680 Helium_mac_phy_interface.docx 681 */ 682 #define RXPCU_PPDU_END_INFO_7_BB_DATA_OFFSET 0x0000001c 683 #define RXPCU_PPDU_END_INFO_7_BB_DATA_LSB 16 684 #define RXPCU_PPDU_END_INFO_7_BB_DATA_MASK 0x00010000 685 686 /* Description RXPCU_PPDU_END_INFO_7_RESERVED_7 687 688 Reserved: HW should fill with 0, FW should ignore. 689 */ 690 #define RXPCU_PPDU_END_INFO_7_RESERVED_7_OFFSET 0x0000001c 691 #define RXPCU_PPDU_END_INFO_7_RESERVED_7_LSB 17 692 #define RXPCU_PPDU_END_INFO_7_RESERVED_7_MASK 0xfffe0000 693 694 /* Description RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION 695 696 The length of this PPDU reception in us 697 */ 698 #define RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_OFFSET 0x00000020 699 #define RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_LSB 0 700 #define RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_MASK 0x00ffffff 701 702 /* Description RXPCU_PPDU_END_INFO_8_RESERVED_8 703 704 <legal 0> 705 */ 706 #define RXPCU_PPDU_END_INFO_8_RESERVED_8_OFFSET 0x00000020 707 #define RXPCU_PPDU_END_INFO_8_RESERVED_8_LSB 24 708 #define RXPCU_PPDU_END_INFO_8_RESERVED_8_MASK 0xff000000 709 710 /* Description RXPCU_PPDU_END_INFO_9_AST_INDEX 711 712 The AST index of the receive Ack/BA. This information 713 is provided from the TXPCU to the RXPCU for receive Ack/BA 714 for implicit beamforming. 715 716 <legal all> 717 */ 718 #define RXPCU_PPDU_END_INFO_9_AST_INDEX_OFFSET 0x00000024 719 #define RXPCU_PPDU_END_INFO_9_AST_INDEX_LSB 0 720 #define RXPCU_PPDU_END_INFO_9_AST_INDEX_MASK 0x0000ffff 721 722 /* Description RXPCU_PPDU_END_INFO_9_AST_INDEX_VALID 723 724 Indicates that ast_index is valid. Should only be set 725 for receive Ack/BA where single stream implicit sounding is 726 captured. 727 */ 728 #define RXPCU_PPDU_END_INFO_9_AST_INDEX_VALID_OFFSET 0x00000024 729 #define RXPCU_PPDU_END_INFO_9_AST_INDEX_VALID_LSB 16 730 #define RXPCU_PPDU_END_INFO_9_AST_INDEX_VALID_MASK 0x00010000 731 732 /* Description RXPCU_PPDU_END_INFO_9_RESERVED_9 733 734 <legal 0> 735 */ 736 #define RXPCU_PPDU_END_INFO_9_RESERVED_9_OFFSET 0x00000024 737 #define RXPCU_PPDU_END_INFO_9_RESERVED_9_LSB 17 738 #define RXPCU_PPDU_END_INFO_9_RESERVED_9_MASK 0xfffe0000 739 #define RXPCU_PPDU_END_INFO_10_PHYRX_ABORT_REQUEST_INFO_PHYRX_ABORT_REQUEST_INFO_DETAILS_OFFSET 0x00000028 740 #define RXPCU_PPDU_END_INFO_10_PHYRX_ABORT_REQUEST_INFO_PHYRX_ABORT_REQUEST_INFO_DETAILS_LSB 17 741 #define RXPCU_PPDU_END_INFO_10_PHYRX_ABORT_REQUEST_INFO_PHYRX_ABORT_REQUEST_INFO_DETAILS_MASK 0xffffffff 742 #define RXPCU_PPDU_END_INFO_11_MACRX_ABORT_REQUEST_INFO_MACRX_ABORT_REQUEST_INFO_DETAILS_OFFSET 0x0000002c 743 #define RXPCU_PPDU_END_INFO_11_MACRX_ABORT_REQUEST_INFO_MACRX_ABORT_REQUEST_INFO_DETAILS_LSB 17 744 #define RXPCU_PPDU_END_INFO_11_MACRX_ABORT_REQUEST_INFO_MACRX_ABORT_REQUEST_INFO_DETAILS_MASK 0xffffffff 745 746 /* Description RXPCU_PPDU_END_INFO_12_RX_PPDU_END_MARKER 747 748 Field used by SW to double check that their structure 749 alignment is in sync with what HW has done. 750 751 <legal 0xAABBCCDD> 752 */ 753 #define RXPCU_PPDU_END_INFO_12_RX_PPDU_END_MARKER_OFFSET 0x00000030 754 #define RXPCU_PPDU_END_INFO_12_RX_PPDU_END_MARKER_LSB 0 755 #define RXPCU_PPDU_END_INFO_12_RX_PPDU_END_MARKER_MASK 0xffffffff 756 757 758 #endif // _RXPCU_PPDU_END_INFO_H_ 759