xref: /wlan-driver/fw-api/hw/qca8074/v1/tcl_status_ring.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2016 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 // $ATH_LICENSE_HW_HDR_C$
20 //
21 // DO NOT EDIT!  This file is automatically generated
22 //               These definitions are tied to a particular hardware layout
23 
24 
25 #ifndef _TCL_STATUS_RING_H_
26 #define _TCL_STATUS_RING_H_
27 #if !defined(__ASSEMBLER__)
28 #endif
29 
30 
31 // ################ START SUMMARY #################
32 //
33 //	Dword	Fields
34 //	0	gse_ctrl[3:0], ase_fse_sel[4], cache_op_res[6:5], reserved_0a[7], msdu_cnt_n[31:8]
35 //	1	msdu_byte_cnt_n[31:0]
36 //	2	msdu_timestmp_n[31:0]
37 //	3	cmd_meta_data_31_0[31:0]
38 //	4	cmd_meta_data_63_32[31:0]
39 //	5	hash_indx_val[19:0], reserved_5a[31:20]
40 //	6	reserved_6a[31:0]
41 //	7	reserved_7a[19:0], ring_id[27:20], looping_count[31:28]
42 //
43 // ################ END SUMMARY #################
44 
45 #define NUM_OF_DWORDS_TCL_STATUS_RING 8
46 
47 struct tcl_status_ring {
48              uint32_t gse_ctrl                        :  4, //[3:0]
49                       ase_fse_sel                     :  1, //[4]
50                       cache_op_res                    :  2, //[6:5]
51                       reserved_0a                     :  1, //[7]
52                       msdu_cnt_n                      : 24; //[31:8]
53              uint32_t msdu_byte_cnt_n                 : 32; //[31:0]
54              uint32_t msdu_timestmp_n                 : 32; //[31:0]
55              uint32_t cmd_meta_data_31_0              : 32; //[31:0]
56              uint32_t cmd_meta_data_63_32             : 32; //[31:0]
57              uint32_t hash_indx_val                   : 20, //[19:0]
58                       reserved_5a                     : 12; //[31:20]
59              uint32_t reserved_6a                     : 32; //[31:0]
60              uint32_t reserved_7a                     : 20, //[19:0]
61                       ring_id                         :  8, //[27:20]
62                       looping_count                   :  4; //[31:28]
63 };
64 
65 /*
66 
67 gse_ctrl
68 
69 			GSE control operations. This includes cache operations
70 			and table entry statistics read/clear operation.
71 
72 			<enum 0 rd_stat> Report or Read statistics
73 
74 			<enum 1 srch_dis> Search disable. Report only Hash
75 
76 			<enum 2 Wr_bk_single> Write Back single entry
77 
78 			<enum 3 wr_bk_all> Write Back entire cache entry
79 
80 			<enum 4 inval_single> Invalidate single cache entry
81 
82 			<enum 5 inval_all> Invalidate entire cache
83 
84 			<enum 6 wr_bk_inval_single> Write back and Invalidate
85 			single entry in cache
86 
87 			<enum 7 wr_bk_inval_all> write back and invalidate
88 			entire cache
89 
90 			<enum 8 clr_stat_single> Clear statistics for single
91 			entry
92 
93 			<legal 0-8>
94 
95 			Rest of the values reserved.
96 
97 			For all single entry control operations (write back,
98 			Invalidate or both)Statistics will be reported
99 
100 ase_fse_sel
101 
102 			Search Engine for which operation is done.
103 
104 			1'b0: Address Search Engine Result
105 
106 			1'b1: Flow Search Engine result
107 
108 cache_op_res
109 
110 			Cache operation result. Following are results of cache
111 			operation.
112 
113 			<enum 0 op_done>  Operation successful
114 
115 			<enum 1 not_fnd> Entry not found in Table
116 
117 			<enum 2 timeout_er>  Timeout Error
118 
119 			<legal 0-2>
120 
121 reserved_0a
122 
123 			<legal 0>
124 
125 msdu_cnt_n
126 
127 			MSDU count of Entry. Valid when GSE_CTRL is 4'b0111 and
128 			4'b1000
129 
130 msdu_byte_cnt_n
131 
132 			MSDU byte count for entry 1. Valid when GSE_CTRL is
133 			4'b0111 and 4'b1000
134 
135 msdu_timestmp_n
136 
137 			MSDU timestamp for entry 1. Valid when GSE_CTRL is
138 			4'b0111 and 4'b1000
139 
140 cmd_meta_data_31_0
141 
142 			Meta data from input ring
143 
144 			<legal all>
145 
146 cmd_meta_data_63_32
147 
148 			Meta data from input ring
149 
150 			<legal all>
151 
152 hash_indx_val
153 
154 
155 			Hash value of the entry in table in case of search
156 			failed or search disable.
157 
158 			<legal all>
159 
160 reserved_5a
161 
162 			<legal 0>
163 
164 reserved_6a
165 
166 			<legal 0>
167 
168 reserved_7a
169 
170 			<legal 0>
171 
172 ring_id
173 
174 			The buffer pointer ring ID.
175 
176 
177 
178 			Helps with debugging when dumping ring contents.
179 
180 			<legal all>
181 
182 looping_count
183 
184 			A count value that indicates the number of times the
185 			producer of entries into the Ring has looped around the
186 			ring.
187 
188 			At initialization time, this value is set to 0. On the
189 			first loop, this value is set to 1. After the max value is
190 			reached allowed by the number of bits for this field, the
191 			count value continues with 0 again.
192 
193 
194 
195 			In case SW is the consumer of the ring entries, it can
196 			use this field to figure out up to where the producer of
197 			entries has created new entries. This eliminates the need to
198 			check where the head pointer' of the ring is located once
199 			the SW starts processing an interrupt indicating that new
200 			entries have been put into this ring...
201 
202 
203 
204 			Also note that SW if it wants only needs to look at the
205 			LSB bit of this count value.
206 
207 			<legal all>
208 */
209 
210 
211 /* Description		TCL_STATUS_RING_0_GSE_CTRL
212 
213 			GSE control operations. This includes cache operations
214 			and table entry statistics read/clear operation.
215 
216 			<enum 0 rd_stat> Report or Read statistics
217 
218 			<enum 1 srch_dis> Search disable. Report only Hash
219 
220 			<enum 2 Wr_bk_single> Write Back single entry
221 
222 			<enum 3 wr_bk_all> Write Back entire cache entry
223 
224 			<enum 4 inval_single> Invalidate single cache entry
225 
226 			<enum 5 inval_all> Invalidate entire cache
227 
228 			<enum 6 wr_bk_inval_single> Write back and Invalidate
229 			single entry in cache
230 
231 			<enum 7 wr_bk_inval_all> write back and invalidate
232 			entire cache
233 
234 			<enum 8 clr_stat_single> Clear statistics for single
235 			entry
236 
237 			<legal 0-8>
238 
239 			Rest of the values reserved.
240 
241 			For all single entry control operations (write back,
242 			Invalidate or both)Statistics will be reported
243 */
244 #define TCL_STATUS_RING_0_GSE_CTRL_OFFSET                            0x00000000
245 #define TCL_STATUS_RING_0_GSE_CTRL_LSB                               0
246 #define TCL_STATUS_RING_0_GSE_CTRL_MASK                              0x0000000f
247 
248 /* Description		TCL_STATUS_RING_0_ASE_FSE_SEL
249 
250 			Search Engine for which operation is done.
251 
252 			1'b0: Address Search Engine Result
253 
254 			1'b1: Flow Search Engine result
255 */
256 #define TCL_STATUS_RING_0_ASE_FSE_SEL_OFFSET                         0x00000000
257 #define TCL_STATUS_RING_0_ASE_FSE_SEL_LSB                            4
258 #define TCL_STATUS_RING_0_ASE_FSE_SEL_MASK                           0x00000010
259 
260 /* Description		TCL_STATUS_RING_0_CACHE_OP_RES
261 
262 			Cache operation result. Following are results of cache
263 			operation.
264 
265 			<enum 0 op_done>  Operation successful
266 
267 			<enum 1 not_fnd> Entry not found in Table
268 
269 			<enum 2 timeout_er>  Timeout Error
270 
271 			<legal 0-2>
272 */
273 #define TCL_STATUS_RING_0_CACHE_OP_RES_OFFSET                        0x00000000
274 #define TCL_STATUS_RING_0_CACHE_OP_RES_LSB                           5
275 #define TCL_STATUS_RING_0_CACHE_OP_RES_MASK                          0x00000060
276 
277 /* Description		TCL_STATUS_RING_0_RESERVED_0A
278 
279 			<legal 0>
280 */
281 #define TCL_STATUS_RING_0_RESERVED_0A_OFFSET                         0x00000000
282 #define TCL_STATUS_RING_0_RESERVED_0A_LSB                            7
283 #define TCL_STATUS_RING_0_RESERVED_0A_MASK                           0x00000080
284 
285 /* Description		TCL_STATUS_RING_0_MSDU_CNT_N
286 
287 			MSDU count of Entry. Valid when GSE_CTRL is 4'b0111 and
288 			4'b1000
289 */
290 #define TCL_STATUS_RING_0_MSDU_CNT_N_OFFSET                          0x00000000
291 #define TCL_STATUS_RING_0_MSDU_CNT_N_LSB                             8
292 #define TCL_STATUS_RING_0_MSDU_CNT_N_MASK                            0xffffff00
293 
294 /* Description		TCL_STATUS_RING_1_MSDU_BYTE_CNT_N
295 
296 			MSDU byte count for entry 1. Valid when GSE_CTRL is
297 			4'b0111 and 4'b1000
298 */
299 #define TCL_STATUS_RING_1_MSDU_BYTE_CNT_N_OFFSET                     0x00000004
300 #define TCL_STATUS_RING_1_MSDU_BYTE_CNT_N_LSB                        0
301 #define TCL_STATUS_RING_1_MSDU_BYTE_CNT_N_MASK                       0xffffffff
302 
303 /* Description		TCL_STATUS_RING_2_MSDU_TIMESTMP_N
304 
305 			MSDU timestamp for entry 1. Valid when GSE_CTRL is
306 			4'b0111 and 4'b1000
307 */
308 #define TCL_STATUS_RING_2_MSDU_TIMESTMP_N_OFFSET                     0x00000008
309 #define TCL_STATUS_RING_2_MSDU_TIMESTMP_N_LSB                        0
310 #define TCL_STATUS_RING_2_MSDU_TIMESTMP_N_MASK                       0xffffffff
311 
312 /* Description		TCL_STATUS_RING_3_CMD_META_DATA_31_0
313 
314 			Meta data from input ring
315 
316 			<legal all>
317 */
318 #define TCL_STATUS_RING_3_CMD_META_DATA_31_0_OFFSET                  0x0000000c
319 #define TCL_STATUS_RING_3_CMD_META_DATA_31_0_LSB                     0
320 #define TCL_STATUS_RING_3_CMD_META_DATA_31_0_MASK                    0xffffffff
321 
322 /* Description		TCL_STATUS_RING_4_CMD_META_DATA_63_32
323 
324 			Meta data from input ring
325 
326 			<legal all>
327 */
328 #define TCL_STATUS_RING_4_CMD_META_DATA_63_32_OFFSET                 0x00000010
329 #define TCL_STATUS_RING_4_CMD_META_DATA_63_32_LSB                    0
330 #define TCL_STATUS_RING_4_CMD_META_DATA_63_32_MASK                   0xffffffff
331 
332 /* Description		TCL_STATUS_RING_5_HASH_INDX_VAL
333 
334 
335 			Hash value of the entry in table in case of search
336 			failed or search disable.
337 
338 			<legal all>
339 */
340 #define TCL_STATUS_RING_5_HASH_INDX_VAL_OFFSET                       0x00000014
341 #define TCL_STATUS_RING_5_HASH_INDX_VAL_LSB                          0
342 #define TCL_STATUS_RING_5_HASH_INDX_VAL_MASK                         0x000fffff
343 
344 /* Description		TCL_STATUS_RING_5_RESERVED_5A
345 
346 			<legal 0>
347 */
348 #define TCL_STATUS_RING_5_RESERVED_5A_OFFSET                         0x00000014
349 #define TCL_STATUS_RING_5_RESERVED_5A_LSB                            20
350 #define TCL_STATUS_RING_5_RESERVED_5A_MASK                           0xfff00000
351 
352 /* Description		TCL_STATUS_RING_6_RESERVED_6A
353 
354 			<legal 0>
355 */
356 #define TCL_STATUS_RING_6_RESERVED_6A_OFFSET                         0x00000018
357 #define TCL_STATUS_RING_6_RESERVED_6A_LSB                            0
358 #define TCL_STATUS_RING_6_RESERVED_6A_MASK                           0xffffffff
359 
360 /* Description		TCL_STATUS_RING_7_RESERVED_7A
361 
362 			<legal 0>
363 */
364 #define TCL_STATUS_RING_7_RESERVED_7A_OFFSET                         0x0000001c
365 #define TCL_STATUS_RING_7_RESERVED_7A_LSB                            0
366 #define TCL_STATUS_RING_7_RESERVED_7A_MASK                           0x000fffff
367 
368 /* Description		TCL_STATUS_RING_7_RING_ID
369 
370 			The buffer pointer ring ID.
371 
372 
373 
374 			Helps with debugging when dumping ring contents.
375 
376 			<legal all>
377 */
378 #define TCL_STATUS_RING_7_RING_ID_OFFSET                             0x0000001c
379 #define TCL_STATUS_RING_7_RING_ID_LSB                                20
380 #define TCL_STATUS_RING_7_RING_ID_MASK                               0x0ff00000
381 
382 /* Description		TCL_STATUS_RING_7_LOOPING_COUNT
383 
384 			A count value that indicates the number of times the
385 			producer of entries into the Ring has looped around the
386 			ring.
387 
388 			At initialization time, this value is set to 0. On the
389 			first loop, this value is set to 1. After the max value is
390 			reached allowed by the number of bits for this field, the
391 			count value continues with 0 again.
392 
393 
394 
395 			In case SW is the consumer of the ring entries, it can
396 			use this field to figure out up to where the producer of
397 			entries has created new entries. This eliminates the need to
398 			check where the head pointer' of the ring is located once
399 			the SW starts processing an interrupt indicating that new
400 			entries have been put into this ring...
401 
402 
403 
404 			Also note that SW if it wants only needs to look at the
405 			LSB bit of this count value.
406 
407 			<legal all>
408 */
409 #define TCL_STATUS_RING_7_LOOPING_COUNT_OFFSET                       0x0000001c
410 #define TCL_STATUS_RING_7_LOOPING_COUNT_LSB                          28
411 #define TCL_STATUS_RING_7_LOOPING_COUNT_MASK                         0xf0000000
412 
413 
414 #endif // _TCL_STATUS_RING_H_
415