xref: /wlan-driver/fw-api/hw/qca8074/v2/he_sig_a_mu_ul_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 // $ATH_LICENSE_HW_HDR_C$
18 //
19 // DO NOT EDIT!  This file is automatically generated
20 //               These definitions are tied to a particular hardware layout
21 
22 
23 #ifndef _HE_SIG_A_MU_UL_INFO_H_
24 #define _HE_SIG_A_MU_UL_INFO_H_
25 #if !defined(__ASSEMBLER__)
26 #endif
27 
28 
29 // ################ START SUMMARY #################
30 //
31 //	Dword	Fields
32 //	0	format_indication[0], bss_color_id[6:1], spatial_reuse[22:7], reserved_0a[23], transmit_bw[25:24], reserved_0b[31:26]
33 //	1	txop_duration[6:0], reserved_1a[15:7], crc[19:16], tail[25:20], reserved_1b[31:26]
34 //
35 // ################ END SUMMARY #################
36 
37 #define NUM_OF_DWORDS_HE_SIG_A_MU_UL_INFO 2
38 
39 struct he_sig_a_mu_ul_info {
40              uint32_t format_indication               :  1, //[0]
41                       bss_color_id                    :  6, //[6:1]
42                       spatial_reuse                   : 16, //[22:7]
43                       reserved_0a                     :  1, //[23]
44                       transmit_bw                     :  2, //[25:24]
45                       reserved_0b                     :  6; //[31:26]
46              uint32_t txop_duration                   :  7, //[6:0]
47                       reserved_1a                     :  9, //[15:7]
48                       crc                             :  4, //[19:16]
49                       tail                            :  6, //[25:20]
50                       reserved_1b                     :  6; //[31:26]
51 };
52 
53 /*
54 
55 format_indication
56 
57 			Indicates whether the transmission is SU PPDU or a
58 			trigger based UL MU PDDU
59 
60 			<enum 0 HE_SIGA_FORMAT_HE_TRIG>
61 
62 			<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
63 
64 			<legal all>
65 
66 bss_color_id
67 
68 			BSS color ID
69 
70 			<legal all>
71 
72 spatial_reuse
73 
74 			Spatial reuse
75 
76 
77 
78 			<legal all>
79 
80 reserved_0a
81 
82 			Note: spec indicates this shall be set to 1
83 
84 			<legal 1>
85 
86 transmit_bw
87 
88 			Bandwidth of the PPDU.
89 
90 
91 
92 			<enum 0 HE_SIG_A_MU_UL_BW20> 20 Mhz
93 
94 			<enum 1 HE_SIG_A_MU_UL_BW40> 40 Mhz
95 
96 			<enum 2 HE_SIG_A_MU_UL_BW80> 80 Mhz
97 
98 			<enum 3 HE_SIG_A_MU_UL_BW160> 160 MHz or 80+80 MHz
99 
100 
101 
102 			On RX side, Field Used by MAC HW
103 
104 			<legal 0-3>
105 
106 reserved_0b
107 
108 			<legal 0>
109 
110 txop_duration
111 
112 			Indicates the remaining time in the current TXOP <legal
113 			all>
114 
115 reserved_1a
116 
117 			Set to value indicated in the trigger frame
118 
119 			<legal 255>
120 
121 crc
122 
123 			CRC for HE-SIG-A contents.
124 
125 			This CRC may also cover some fields of L-SIG (TBD)
126 
127 			<legal all>
128 
129 tail
130 
131 			BCC encoding (similar to VHT-SIG-A) with 6 tail bits is
132 			used
133 
134 			<legal 0>
135 
136 reserved_1b
137 
138 			<legal 0>
139 */
140 
141 
142 /* Description		HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION
143 
144 			Indicates whether the transmission is SU PPDU or a
145 			trigger based UL MU PDDU
146 
147 			<enum 0 HE_SIGA_FORMAT_HE_TRIG>
148 
149 			<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
150 
151 			<legal all>
152 */
153 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_OFFSET               0x00000000
154 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_LSB                  0
155 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_MASK                 0x00000001
156 
157 /* Description		HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID
158 
159 			BSS color ID
160 
161 			<legal all>
162 */
163 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_OFFSET                    0x00000000
164 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_LSB                       1
165 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_MASK                      0x0000007e
166 
167 /* Description		HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE
168 
169 			Spatial reuse
170 
171 
172 
173 			<legal all>
174 */
175 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_OFFSET                   0x00000000
176 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_LSB                      7
177 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_MASK                     0x007fff80
178 
179 /* Description		HE_SIG_A_MU_UL_INFO_0_RESERVED_0A
180 
181 			Note: spec indicates this shall be set to 1
182 
183 			<legal 1>
184 */
185 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_OFFSET                     0x00000000
186 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_LSB                        23
187 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_MASK                       0x00800000
188 
189 /* Description		HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW
190 
191 			Bandwidth of the PPDU.
192 
193 
194 
195 			<enum 0 HE_SIG_A_MU_UL_BW20> 20 Mhz
196 
197 			<enum 1 HE_SIG_A_MU_UL_BW40> 40 Mhz
198 
199 			<enum 2 HE_SIG_A_MU_UL_BW80> 80 Mhz
200 
201 			<enum 3 HE_SIG_A_MU_UL_BW160> 160 MHz or 80+80 MHz
202 
203 
204 
205 			On RX side, Field Used by MAC HW
206 
207 			<legal 0-3>
208 */
209 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_OFFSET                     0x00000000
210 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_LSB                        24
211 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_MASK                       0x03000000
212 
213 /* Description		HE_SIG_A_MU_UL_INFO_0_RESERVED_0B
214 
215 			<legal 0>
216 */
217 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_OFFSET                     0x00000000
218 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_LSB                        26
219 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_MASK                       0xfc000000
220 
221 /* Description		HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION
222 
223 			Indicates the remaining time in the current TXOP <legal
224 			all>
225 */
226 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_OFFSET                   0x00000004
227 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_LSB                      0
228 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_MASK                     0x0000007f
229 
230 /* Description		HE_SIG_A_MU_UL_INFO_1_RESERVED_1A
231 
232 			Set to value indicated in the trigger frame
233 
234 			<legal 255>
235 */
236 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_OFFSET                     0x00000004
237 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_LSB                        7
238 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_MASK                       0x0000ff80
239 
240 /* Description		HE_SIG_A_MU_UL_INFO_1_CRC
241 
242 			CRC for HE-SIG-A contents.
243 
244 			This CRC may also cover some fields of L-SIG (TBD)
245 
246 			<legal all>
247 */
248 #define HE_SIG_A_MU_UL_INFO_1_CRC_OFFSET                             0x00000004
249 #define HE_SIG_A_MU_UL_INFO_1_CRC_LSB                                16
250 #define HE_SIG_A_MU_UL_INFO_1_CRC_MASK                               0x000f0000
251 
252 /* Description		HE_SIG_A_MU_UL_INFO_1_TAIL
253 
254 			BCC encoding (similar to VHT-SIG-A) with 6 tail bits is
255 			used
256 
257 			<legal 0>
258 */
259 #define HE_SIG_A_MU_UL_INFO_1_TAIL_OFFSET                            0x00000004
260 #define HE_SIG_A_MU_UL_INFO_1_TAIL_LSB                               20
261 #define HE_SIG_A_MU_UL_INFO_1_TAIL_MASK                              0x03f00000
262 
263 /* Description		HE_SIG_A_MU_UL_INFO_1_RESERVED_1B
264 
265 			<legal 0>
266 */
267 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_OFFSET                     0x00000004
268 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_LSB                        26
269 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_MASK                       0xfc000000
270 
271 
272 #endif // _HE_SIG_A_MU_UL_INFO_H_
273