xref: /wlan-driver/fw-api/hw/qca8074/v2/phyrx_abort_request_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3*5113495bSYour Name  *
4*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for any
5*5113495bSYour Name  * purpose with or without fee is hereby granted, provided that the above
6*5113495bSYour Name  * copyright notice and this permission notice appear in all copies.
7*5113495bSYour Name  *
8*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*5113495bSYour Name  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*5113495bSYour Name  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*5113495bSYour Name  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*5113495bSYour Name  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*5113495bSYour Name  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*5113495bSYour Name  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*5113495bSYour Name  */
16*5113495bSYour Name 
17*5113495bSYour Name // $ATH_LICENSE_HW_HDR_C$
18*5113495bSYour Name //
19*5113495bSYour Name // DO NOT EDIT!  This file is automatically generated
20*5113495bSYour Name //               These definitions are tied to a particular hardware layout
21*5113495bSYour Name 
22*5113495bSYour Name 
23*5113495bSYour Name #ifndef _PHYRX_ABORT_REQUEST_INFO_H_
24*5113495bSYour Name #define _PHYRX_ABORT_REQUEST_INFO_H_
25*5113495bSYour Name #if !defined(__ASSEMBLER__)
26*5113495bSYour Name #endif
27*5113495bSYour Name 
28*5113495bSYour Name 
29*5113495bSYour Name // ################ START SUMMARY #################
30*5113495bSYour Name //
31*5113495bSYour Name //	Dword	Fields
32*5113495bSYour Name //	0	phyrx_abort_reason[7:0], phy_enters_nap_state[8], phy_enters_defer_state[9], reserved_0[15:10], receive_duration[31:16]
33*5113495bSYour Name //
34*5113495bSYour Name // ################ END SUMMARY #################
35*5113495bSYour Name 
36*5113495bSYour Name #define NUM_OF_DWORDS_PHYRX_ABORT_REQUEST_INFO 1
37*5113495bSYour Name 
38*5113495bSYour Name struct phyrx_abort_request_info {
39*5113495bSYour Name              uint32_t phyrx_abort_reason              :  8, //[7:0]
40*5113495bSYour Name                       phy_enters_nap_state            :  1, //[8]
41*5113495bSYour Name                       phy_enters_defer_state          :  1, //[9]
42*5113495bSYour Name                       reserved_0                      :  6, //[15:10]
43*5113495bSYour Name                       receive_duration                : 16; //[31:16]
44*5113495bSYour Name };
45*5113495bSYour Name 
46*5113495bSYour Name /*
47*5113495bSYour Name 
48*5113495bSYour Name phyrx_abort_reason
49*5113495bSYour Name 
50*5113495bSYour Name 			<enum 0 phyrx_err_phy_off> Reception aborted due to
51*5113495bSYour Name 			receiving a PHY_OFF TLV
52*5113495bSYour Name 
53*5113495bSYour Name 			<enum 1 phyrx_err_synth_off>
54*5113495bSYour Name 
55*5113495bSYour Name 			<enum 2 phyrx_err_ofdma_timing>
56*5113495bSYour Name 
57*5113495bSYour Name 			<enum 3 phyrx_err_ofdma_signal_parity>
58*5113495bSYour Name 
59*5113495bSYour Name 			<enum 4 phyrx_err_ofdma_rate_illegal>
60*5113495bSYour Name 
61*5113495bSYour Name 			<enum 5 phyrx_err_ofdma_length_illegal>
62*5113495bSYour Name 
63*5113495bSYour Name 			<enum 6 phyrx_err_ofdma_restart>
64*5113495bSYour Name 
65*5113495bSYour Name 			<enum 7 phyrx_err_ofdma_service>
66*5113495bSYour Name 
67*5113495bSYour Name 			<enum 8 phyrx_err_ppdu_ofdma_power_drop>
68*5113495bSYour Name 
69*5113495bSYour Name 
70*5113495bSYour Name 
71*5113495bSYour Name 			<enum 9 phyrx_err_cck_blokker>
72*5113495bSYour Name 
73*5113495bSYour Name 			<enum 10 phyrx_err_cck_timing>
74*5113495bSYour Name 
75*5113495bSYour Name 			<enum 11 phyrx_err_cck_header_crc>
76*5113495bSYour Name 
77*5113495bSYour Name 			<enum 12 phyrx_err_cck_rate_illegal>
78*5113495bSYour Name 
79*5113495bSYour Name 			<enum 13 phyrx_err_cck_length_illegal>
80*5113495bSYour Name 
81*5113495bSYour Name 			<enum 14 phyrx_err_cck_restart>
82*5113495bSYour Name 
83*5113495bSYour Name 			<enum 15 phyrx_err_cck_service>
84*5113495bSYour Name 
85*5113495bSYour Name 			<enum 16 phyrx_err_cck_power_drop>
86*5113495bSYour Name 
87*5113495bSYour Name 
88*5113495bSYour Name 
89*5113495bSYour Name 			<enum 17 phyrx_err_ht_crc_err>
90*5113495bSYour Name 
91*5113495bSYour Name 			<enum 18 phyrx_err_ht_length_illegal>
92*5113495bSYour Name 
93*5113495bSYour Name 			<enum 19 phyrx_err_ht_rate_illegal>
94*5113495bSYour Name 
95*5113495bSYour Name 			<enum 20 phyrx_err_ht_zlf>
96*5113495bSYour Name 
97*5113495bSYour Name 			<enum 21 phyrx_err_false_radar_ext>
98*5113495bSYour Name 
99*5113495bSYour Name 
100*5113495bSYour Name 
101*5113495bSYour Name 			<enum 22 phyrx_err_green_field>
102*5113495bSYour Name 
103*5113495bSYour Name 
104*5113495bSYour Name 
105*5113495bSYour Name 			<enum 23 phyrx_err_bw_gt_dyn_bw>
106*5113495bSYour Name 
107*5113495bSYour Name 			<enum 24 phyrx_err_leg_ht_mismatch>
108*5113495bSYour Name 
109*5113495bSYour Name 			<enum 25 phyrx_err_vht_crc_error>
110*5113495bSYour Name 
111*5113495bSYour Name 			<enum 26 phyrx_err_vht_siga_unsupported>
112*5113495bSYour Name 
113*5113495bSYour Name 			<enum 27 phyrx_err_vht_lsig_len_invalid>
114*5113495bSYour Name 
115*5113495bSYour Name 			<enum 28 phyrx_err_vht_ndp_or_zlf>
116*5113495bSYour Name 
117*5113495bSYour Name 			<enum 29 phyrx_err_vht_nsym_lt_zero>
118*5113495bSYour Name 
119*5113495bSYour Name 			<enum 30 phyrx_err_vht_rx_extra_symbol_mismatch>
120*5113495bSYour Name 
121*5113495bSYour Name 			<enum 31 phyrx_err_vht_rx_skip_group_id0>
122*5113495bSYour Name 
123*5113495bSYour Name 			<enum 32 phyrx_err_vht_rx_skip_group_id1to62>
124*5113495bSYour Name 
125*5113495bSYour Name 			<enum 33 phyrx_err_vht_rx_skip_group_id63>
126*5113495bSYour Name 
127*5113495bSYour Name 			<enum 34 phyrx_err_ofdm_ldpc_decoder_disabled>
128*5113495bSYour Name 
129*5113495bSYour Name 			<enum 35 phyrx_err_defer_nap>
130*5113495bSYour Name 
131*5113495bSYour Name 			<enum 36 phyrx_err_fdomain_timeout>
132*5113495bSYour Name 
133*5113495bSYour Name 			<enum 37 phyrx_err_lsig_rel_check>
134*5113495bSYour Name 
135*5113495bSYour Name 			<enum 38 phyrx_err_bt_collision>
136*5113495bSYour Name 
137*5113495bSYour Name 			<enum 39 phyrx_err_unsupported_mu_feedback>
138*5113495bSYour Name 
139*5113495bSYour Name 			<enum 40 phyrx_err_ppdu_tx_interrupt_rx>
140*5113495bSYour Name 
141*5113495bSYour Name 			<enum 41 phyrx_err_unsupported_cbf>
142*5113495bSYour Name 
143*5113495bSYour Name 
144*5113495bSYour Name 
145*5113495bSYour Name 			<enum 42 phyrx_err_other>  Should not really be used. If
146*5113495bSYour Name 			needed, ask for documentation update
147*5113495bSYour Name 
148*5113495bSYour Name 
149*5113495bSYour Name 
150*5113495bSYour Name 			<enum 43 phyrx_err_he_siga_unsupported > <enum 44
151*5113495bSYour Name 			phyrx_err_he_crc_error > <enum 45
152*5113495bSYour Name 			phyrx_err_he_sigb_unsupported > <enum 46
153*5113495bSYour Name 			phyrx_err_he_mu_mode_unsupported > <enum 47
154*5113495bSYour Name 			phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero
155*5113495bSYour Name 			> <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50
156*5113495bSYour Name 			phyrx_err_he_num_users_unsupported ><enum 51
157*5113495bSYour Name 			phyrx_err_he_sounding_params_unsupported >
158*5113495bSYour Name 
159*5113495bSYour Name 
160*5113495bSYour Name 
161*5113495bSYour Name 			<enum 52 phyrx_err_MU_UL_no_power_detected>
162*5113495bSYour Name 
163*5113495bSYour Name 
164*5113495bSYour Name 
165*5113495bSYour Name 
166*5113495bSYour Name 
167*5113495bSYour Name 
168*5113495bSYour Name 
169*5113495bSYour Name 			<legal 0 - 52>
170*5113495bSYour Name 
171*5113495bSYour Name phy_enters_nap_state
172*5113495bSYour Name 
173*5113495bSYour Name 			When set, PHY enters PHY NAP state after sending this
174*5113495bSYour Name 			abort
175*5113495bSYour Name 
176*5113495bSYour Name 
177*5113495bSYour Name 
178*5113495bSYour Name 			Note that nap and defer state are mutually exclusive.
179*5113495bSYour Name 
180*5113495bSYour Name 
181*5113495bSYour Name 
182*5113495bSYour Name 			Field put pro-actively in place....usage still to be
183*5113495bSYour Name 			agreed upon.
184*5113495bSYour Name 
185*5113495bSYour Name 			<legal all>
186*5113495bSYour Name 
187*5113495bSYour Name phy_enters_defer_state
188*5113495bSYour Name 
189*5113495bSYour Name 			When set, PHY enters PHY defer state after sending this
190*5113495bSYour Name 			abort
191*5113495bSYour Name 
192*5113495bSYour Name 
193*5113495bSYour Name 
194*5113495bSYour Name 			Note that nap and defer state are mutually exclusive.
195*5113495bSYour Name 
196*5113495bSYour Name 
197*5113495bSYour Name 
198*5113495bSYour Name 			Field put pro-actively in place....usage still to be
199*5113495bSYour Name 			agreed upon.
200*5113495bSYour Name 
201*5113495bSYour Name 			<legal all>
202*5113495bSYour Name 
203*5113495bSYour Name reserved_0
204*5113495bSYour Name 
205*5113495bSYour Name 			<legal 0>
206*5113495bSYour Name 
207*5113495bSYour Name receive_duration
208*5113495bSYour Name 
209*5113495bSYour Name 			The remaining receive duration of this PPDU in the
210*5113495bSYour Name 			medium (in us). When PHY does not know this duration when
211*5113495bSYour Name 			this TLV is generated, the field will be set to 0.
212*5113495bSYour Name 
213*5113495bSYour Name 			The timing reference point is the reception by the MAC
214*5113495bSYour Name 			of this TLV. The value shall be accurate to within 2us.
215*5113495bSYour Name 
216*5113495bSYour Name 
217*5113495bSYour Name 
218*5113495bSYour Name 			In case Phy_enters_nap_state and/or
219*5113495bSYour Name 			Phy_enters_defer_state is set, there is a possibility that
220*5113495bSYour Name 			MAC PMM can also decide to go into a low(er) power state.
221*5113495bSYour Name 
222*5113495bSYour Name 			<legal all>
223*5113495bSYour Name */
224*5113495bSYour Name 
225*5113495bSYour Name 
226*5113495bSYour Name /* Description		PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON
227*5113495bSYour Name 
228*5113495bSYour Name 			<enum 0 phyrx_err_phy_off> Reception aborted due to
229*5113495bSYour Name 			receiving a PHY_OFF TLV
230*5113495bSYour Name 
231*5113495bSYour Name 			<enum 1 phyrx_err_synth_off>
232*5113495bSYour Name 
233*5113495bSYour Name 			<enum 2 phyrx_err_ofdma_timing>
234*5113495bSYour Name 
235*5113495bSYour Name 			<enum 3 phyrx_err_ofdma_signal_parity>
236*5113495bSYour Name 
237*5113495bSYour Name 			<enum 4 phyrx_err_ofdma_rate_illegal>
238*5113495bSYour Name 
239*5113495bSYour Name 			<enum 5 phyrx_err_ofdma_length_illegal>
240*5113495bSYour Name 
241*5113495bSYour Name 			<enum 6 phyrx_err_ofdma_restart>
242*5113495bSYour Name 
243*5113495bSYour Name 			<enum 7 phyrx_err_ofdma_service>
244*5113495bSYour Name 
245*5113495bSYour Name 			<enum 8 phyrx_err_ppdu_ofdma_power_drop>
246*5113495bSYour Name 
247*5113495bSYour Name 
248*5113495bSYour Name 
249*5113495bSYour Name 			<enum 9 phyrx_err_cck_blokker>
250*5113495bSYour Name 
251*5113495bSYour Name 			<enum 10 phyrx_err_cck_timing>
252*5113495bSYour Name 
253*5113495bSYour Name 			<enum 11 phyrx_err_cck_header_crc>
254*5113495bSYour Name 
255*5113495bSYour Name 			<enum 12 phyrx_err_cck_rate_illegal>
256*5113495bSYour Name 
257*5113495bSYour Name 			<enum 13 phyrx_err_cck_length_illegal>
258*5113495bSYour Name 
259*5113495bSYour Name 			<enum 14 phyrx_err_cck_restart>
260*5113495bSYour Name 
261*5113495bSYour Name 			<enum 15 phyrx_err_cck_service>
262*5113495bSYour Name 
263*5113495bSYour Name 			<enum 16 phyrx_err_cck_power_drop>
264*5113495bSYour Name 
265*5113495bSYour Name 
266*5113495bSYour Name 
267*5113495bSYour Name 			<enum 17 phyrx_err_ht_crc_err>
268*5113495bSYour Name 
269*5113495bSYour Name 			<enum 18 phyrx_err_ht_length_illegal>
270*5113495bSYour Name 
271*5113495bSYour Name 			<enum 19 phyrx_err_ht_rate_illegal>
272*5113495bSYour Name 
273*5113495bSYour Name 			<enum 20 phyrx_err_ht_zlf>
274*5113495bSYour Name 
275*5113495bSYour Name 			<enum 21 phyrx_err_false_radar_ext>
276*5113495bSYour Name 
277*5113495bSYour Name 
278*5113495bSYour Name 
279*5113495bSYour Name 			<enum 22 phyrx_err_green_field>
280*5113495bSYour Name 
281*5113495bSYour Name 
282*5113495bSYour Name 
283*5113495bSYour Name 			<enum 23 phyrx_err_bw_gt_dyn_bw>
284*5113495bSYour Name 
285*5113495bSYour Name 			<enum 24 phyrx_err_leg_ht_mismatch>
286*5113495bSYour Name 
287*5113495bSYour Name 			<enum 25 phyrx_err_vht_crc_error>
288*5113495bSYour Name 
289*5113495bSYour Name 			<enum 26 phyrx_err_vht_siga_unsupported>
290*5113495bSYour Name 
291*5113495bSYour Name 			<enum 27 phyrx_err_vht_lsig_len_invalid>
292*5113495bSYour Name 
293*5113495bSYour Name 			<enum 28 phyrx_err_vht_ndp_or_zlf>
294*5113495bSYour Name 
295*5113495bSYour Name 			<enum 29 phyrx_err_vht_nsym_lt_zero>
296*5113495bSYour Name 
297*5113495bSYour Name 			<enum 30 phyrx_err_vht_rx_extra_symbol_mismatch>
298*5113495bSYour Name 
299*5113495bSYour Name 			<enum 31 phyrx_err_vht_rx_skip_group_id0>
300*5113495bSYour Name 
301*5113495bSYour Name 			<enum 32 phyrx_err_vht_rx_skip_group_id1to62>
302*5113495bSYour Name 
303*5113495bSYour Name 			<enum 33 phyrx_err_vht_rx_skip_group_id63>
304*5113495bSYour Name 
305*5113495bSYour Name 			<enum 34 phyrx_err_ofdm_ldpc_decoder_disabled>
306*5113495bSYour Name 
307*5113495bSYour Name 			<enum 35 phyrx_err_defer_nap>
308*5113495bSYour Name 
309*5113495bSYour Name 			<enum 36 phyrx_err_fdomain_timeout>
310*5113495bSYour Name 
311*5113495bSYour Name 			<enum 37 phyrx_err_lsig_rel_check>
312*5113495bSYour Name 
313*5113495bSYour Name 			<enum 38 phyrx_err_bt_collision>
314*5113495bSYour Name 
315*5113495bSYour Name 			<enum 39 phyrx_err_unsupported_mu_feedback>
316*5113495bSYour Name 
317*5113495bSYour Name 			<enum 40 phyrx_err_ppdu_tx_interrupt_rx>
318*5113495bSYour Name 
319*5113495bSYour Name 			<enum 41 phyrx_err_unsupported_cbf>
320*5113495bSYour Name 
321*5113495bSYour Name 
322*5113495bSYour Name 
323*5113495bSYour Name 			<enum 42 phyrx_err_other>  Should not really be used. If
324*5113495bSYour Name 			needed, ask for documentation update
325*5113495bSYour Name 
326*5113495bSYour Name 
327*5113495bSYour Name 
328*5113495bSYour Name 			<enum 43 phyrx_err_he_siga_unsupported > <enum 44
329*5113495bSYour Name 			phyrx_err_he_crc_error > <enum 45
330*5113495bSYour Name 			phyrx_err_he_sigb_unsupported > <enum 46
331*5113495bSYour Name 			phyrx_err_he_mu_mode_unsupported > <enum 47
332*5113495bSYour Name 			phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero
333*5113495bSYour Name 			> <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50
334*5113495bSYour Name 			phyrx_err_he_num_users_unsupported ><enum 51
335*5113495bSYour Name 			phyrx_err_he_sounding_params_unsupported >
336*5113495bSYour Name 
337*5113495bSYour Name 
338*5113495bSYour Name 
339*5113495bSYour Name 			<enum 52 phyrx_err_MU_UL_no_power_detected>
340*5113495bSYour Name 
341*5113495bSYour Name 
342*5113495bSYour Name 
343*5113495bSYour Name 
344*5113495bSYour Name 
345*5113495bSYour Name 
346*5113495bSYour Name 
347*5113495bSYour Name 			<legal 0 - 52>
348*5113495bSYour Name */
349*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_OFFSET         0x00000000
350*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_LSB            0
351*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_MASK           0x000000ff
352*5113495bSYour Name 
353*5113495bSYour Name /* Description		PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE
354*5113495bSYour Name 
355*5113495bSYour Name 			When set, PHY enters PHY NAP state after sending this
356*5113495bSYour Name 			abort
357*5113495bSYour Name 
358*5113495bSYour Name 
359*5113495bSYour Name 
360*5113495bSYour Name 			Note that nap and defer state are mutually exclusive.
361*5113495bSYour Name 
362*5113495bSYour Name 
363*5113495bSYour Name 
364*5113495bSYour Name 			Field put pro-actively in place....usage still to be
365*5113495bSYour Name 			agreed upon.
366*5113495bSYour Name 
367*5113495bSYour Name 			<legal all>
368*5113495bSYour Name */
369*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_OFFSET       0x00000000
370*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_LSB          8
371*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_MASK         0x00000100
372*5113495bSYour Name 
373*5113495bSYour Name /* Description		PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE
374*5113495bSYour Name 
375*5113495bSYour Name 			When set, PHY enters PHY defer state after sending this
376*5113495bSYour Name 			abort
377*5113495bSYour Name 
378*5113495bSYour Name 
379*5113495bSYour Name 
380*5113495bSYour Name 			Note that nap and defer state are mutually exclusive.
381*5113495bSYour Name 
382*5113495bSYour Name 
383*5113495bSYour Name 
384*5113495bSYour Name 			Field put pro-actively in place....usage still to be
385*5113495bSYour Name 			agreed upon.
386*5113495bSYour Name 
387*5113495bSYour Name 			<legal all>
388*5113495bSYour Name */
389*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_OFFSET     0x00000000
390*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_LSB        9
391*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_MASK       0x00000200
392*5113495bSYour Name 
393*5113495bSYour Name /* Description		PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0
394*5113495bSYour Name 
395*5113495bSYour Name 			<legal 0>
396*5113495bSYour Name */
397*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_OFFSET                 0x00000000
398*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_LSB                    10
399*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_MASK                   0x0000fc00
400*5113495bSYour Name 
401*5113495bSYour Name /* Description		PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION
402*5113495bSYour Name 
403*5113495bSYour Name 			The remaining receive duration of this PPDU in the
404*5113495bSYour Name 			medium (in us). When PHY does not know this duration when
405*5113495bSYour Name 			this TLV is generated, the field will be set to 0.
406*5113495bSYour Name 
407*5113495bSYour Name 			The timing reference point is the reception by the MAC
408*5113495bSYour Name 			of this TLV. The value shall be accurate to within 2us.
409*5113495bSYour Name 
410*5113495bSYour Name 
411*5113495bSYour Name 
412*5113495bSYour Name 			In case Phy_enters_nap_state and/or
413*5113495bSYour Name 			Phy_enters_defer_state is set, there is a possibility that
414*5113495bSYour Name 			MAC PMM can also decide to go into a low(er) power state.
415*5113495bSYour Name 
416*5113495bSYour Name 			<legal all>
417*5113495bSYour Name */
418*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_OFFSET           0x00000000
419*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_LSB              16
420*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_MASK             0xffff0000
421*5113495bSYour Name 
422*5113495bSYour Name 
423*5113495bSYour Name #endif // _PHYRX_ABORT_REQUEST_INFO_H_
424