xref: /wlan-driver/fw-api/hw/qca8074/v2/reo_flush_timeout_list_status.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 // $ATH_LICENSE_HW_HDR_C$
18 //
19 // DO NOT EDIT!  This file is automatically generated
20 //               These definitions are tied to a particular hardware layout
21 
22 
23 #ifndef _REO_FLUSH_TIMEOUT_LIST_STATUS_H_
24 #define _REO_FLUSH_TIMEOUT_LIST_STATUS_H_
25 #if !defined(__ASSEMBLER__)
26 #endif
27 
28 #include "uniform_reo_status_header.h"
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0-1	struct uniform_reo_status_header status_header;
34 //	2	error_detected[0], timout_list_empty[1], reserved_2a[31:2]
35 //	3	release_desc_count[15:0], forward_buf_count[31:16]
36 //	4	reserved_4a[31:0]
37 //	5	reserved_5a[31:0]
38 //	6	reserved_6a[31:0]
39 //	7	reserved_7a[31:0]
40 //	8	reserved_8a[31:0]
41 //	9	reserved_9a[31:0]
42 //	10	reserved_10a[31:0]
43 //	11	reserved_11a[31:0]
44 //	12	reserved_12a[31:0]
45 //	13	reserved_13a[31:0]
46 //	14	reserved_14a[31:0]
47 //	15	reserved_15a[31:0]
48 //	16	reserved_16a[31:0]
49 //	17	reserved_17a[31:0]
50 //	18	reserved_18a[31:0]
51 //	19	reserved_19a[31:0]
52 //	20	reserved_20a[31:0]
53 //	21	reserved_21a[31:0]
54 //	22	reserved_22a[31:0]
55 //	23	reserved_23a[31:0]
56 //	24	reserved_24a[27:0], looping_count[31:28]
57 //
58 // ################ END SUMMARY #################
59 
60 #define NUM_OF_DWORDS_REO_FLUSH_TIMEOUT_LIST_STATUS 25
61 
62 struct reo_flush_timeout_list_status {
63     struct            uniform_reo_status_header                       status_header;
64              uint32_t error_detected                  :  1, //[0]
65                       timout_list_empty               :  1, //[1]
66                       reserved_2a                     : 30; //[31:2]
67              uint32_t release_desc_count              : 16, //[15:0]
68                       forward_buf_count               : 16; //[31:16]
69              uint32_t reserved_4a                     : 32; //[31:0]
70              uint32_t reserved_5a                     : 32; //[31:0]
71              uint32_t reserved_6a                     : 32; //[31:0]
72              uint32_t reserved_7a                     : 32; //[31:0]
73              uint32_t reserved_8a                     : 32; //[31:0]
74              uint32_t reserved_9a                     : 32; //[31:0]
75              uint32_t reserved_10a                    : 32; //[31:0]
76              uint32_t reserved_11a                    : 32; //[31:0]
77              uint32_t reserved_12a                    : 32; //[31:0]
78              uint32_t reserved_13a                    : 32; //[31:0]
79              uint32_t reserved_14a                    : 32; //[31:0]
80              uint32_t reserved_15a                    : 32; //[31:0]
81              uint32_t reserved_16a                    : 32; //[31:0]
82              uint32_t reserved_17a                    : 32; //[31:0]
83              uint32_t reserved_18a                    : 32; //[31:0]
84              uint32_t reserved_19a                    : 32; //[31:0]
85              uint32_t reserved_20a                    : 32; //[31:0]
86              uint32_t reserved_21a                    : 32; //[31:0]
87              uint32_t reserved_22a                    : 32; //[31:0]
88              uint32_t reserved_23a                    : 32; //[31:0]
89              uint32_t reserved_24a                    : 28, //[27:0]
90                       looping_count                   :  4; //[31:28]
91 };
92 
93 /*
94 
95 struct uniform_reo_status_header status_header
96 
97 			Consumer: SW
98 
99 			Producer: REO
100 
101 
102 
103 			Details that can link this status with the original
104 			command. It also contains info on how long REO took to
105 			execute this command.
106 
107 error_detected
108 
109 			0: No error has been detected while executing this
110 			command
111 
112 			1: command not properly executed and returned with an
113 			error
114 
115 
116 
117 			NOTE: Current no error is defined, but field is put in
118 			place to avoid data structure changes in future...
119 
120 timout_list_empty
121 
122 			When set, REO has depleted the timeout list and all
123 			entries are gone.
124 
125 			<legal all>
126 
127 reserved_2a
128 
129 			<legal 0>
130 
131 release_desc_count
132 
133 			Consumer: REO
134 
135 			Producer: SW
136 
137 
138 
139 			The number of link descriptors released
140 
141 			<legal all>
142 
143 forward_buf_count
144 
145 			Consumer: REO
146 
147 			Producer: SW
148 
149 
150 
151 			The number of buffers forwarded to the REO destination
152 			rings
153 
154 			<legal all>
155 
156 reserved_4a
157 
158 			<legal 0>
159 
160 reserved_5a
161 
162 			<legal 0>
163 
164 reserved_6a
165 
166 			<legal 0>
167 
168 reserved_7a
169 
170 			<legal 0>
171 
172 reserved_8a
173 
174 			<legal 0>
175 
176 reserved_9a
177 
178 			<legal 0>
179 
180 reserved_10a
181 
182 			<legal 0>
183 
184 reserved_11a
185 
186 			<legal 0>
187 
188 reserved_12a
189 
190 			<legal 0>
191 
192 reserved_13a
193 
194 			<legal 0>
195 
196 reserved_14a
197 
198 			<legal 0>
199 
200 reserved_15a
201 
202 			<legal 0>
203 
204 reserved_16a
205 
206 			<legal 0>
207 
208 reserved_17a
209 
210 			<legal 0>
211 
212 reserved_18a
213 
214 			<legal 0>
215 
216 reserved_19a
217 
218 			<legal 0>
219 
220 reserved_20a
221 
222 			<legal 0>
223 
224 reserved_21a
225 
226 			<legal 0>
227 
228 reserved_22a
229 
230 			<legal 0>
231 
232 reserved_23a
233 
234 			<legal 0>
235 
236 reserved_24a
237 
238 			<legal 0>
239 
240 looping_count
241 
242 			A count value that indicates the number of times the
243 			producer of entries into this Ring has looped around the
244 			ring.
245 
246 			At initialization time, this value is set to 0. On the
247 			first loop, this value is set to 1. After the max value is
248 			reached allowed by the number of bits for this field, the
249 			count value continues with 0 again.
250 
251 
252 
253 			In case SW is the consumer of the ring entries, it can
254 			use this field to figure out up to where the producer of
255 			entries has created new entries. This eliminates the need to
256 			check where the head pointer' of the ring is located once
257 			the SW starts processing an interrupt indicating that new
258 			entries have been put into this ring...
259 
260 
261 
262 			Also note that SW if it wants only needs to look at the
263 			LSB bit of this count value.
264 
265 			<legal all>
266 */
267 
268 
269  /* EXTERNAL REFERENCE : struct uniform_reo_status_header status_header */
270 
271 
272 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER
273 
274 			Consumer: SW , DEBUG
275 
276 			Producer: REO
277 
278 
279 
280 			The value in this field is equal to value of the
281 			'REO_CMD_Number' field the REO command
282 
283 
284 
285 			This field helps to correlate the statuses with the REO
286 			commands.
287 
288 
289 
290 			<legal all>
291 */
292 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET 0x00000000
293 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_LSB 0
294 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_MASK 0x0000ffff
295 
296 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME
297 
298 			Consumer: DEBUG
299 
300 			Producer: REO
301 
302 
303 
304 			The amount of time REO took to excecute the command.
305 			Note that this time does not include the duration of the
306 			command waiting in the command ring, before the execution
307 			started.
308 
309 
310 
311 			In us.
312 
313 
314 
315 			<legal all>
316 */
317 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET 0x00000000
318 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_LSB 16
319 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_MASK 0x03ff0000
320 
321 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS
322 
323 			Consumer: DEBUG
324 
325 			Producer: REO
326 
327 
328 
329 			Execution status of the command.
330 
331 
332 
333 			<enum 0 reo_successful_execution> Command has
334 			successfully be executed
335 
336 			<enum 1 reo_blocked_execution> Command could not be
337 			executed as the queue or cache was blocked
338 
339 			<enum 2 reo_failed_execution> Command has encountered
340 			problems when executing, like the queue descriptor not being
341 			valid. None of the status fields in the entire STATUS TLV
342 			are valid.
343 
344 			<enum 3 reo_resource_blocked> Command is NOT  executed
345 			because one or more descriptors were blocked. This is SW
346 			programming mistake.
347 
348 			None of the status fields in the entire STATUS TLV are
349 			valid.
350 
351 
352 
353 			<legal  0-3>
354 */
355 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET 0x00000000
356 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB 26
357 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK 0x0c000000
358 
359 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_RESERVED_0A
360 
361 			<legal 0>
362 */
363 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_RESERVED_0A_OFFSET 0x00000000
364 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_RESERVED_0A_LSB 28
365 #define REO_FLUSH_TIMEOUT_LIST_STATUS_0_STATUS_HEADER_RESERVED_0A_MASK 0xf0000000
366 
367 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_1_STATUS_HEADER_TIMESTAMP
368 
369 			Timestamp at the moment that this status report is
370 			written.
371 
372 
373 
374 			<legal all>
375 */
376 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_STATUS_HEADER_TIMESTAMP_OFFSET 0x00000004
377 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_STATUS_HEADER_TIMESTAMP_LSB  0
378 #define REO_FLUSH_TIMEOUT_LIST_STATUS_1_STATUS_HEADER_TIMESTAMP_MASK 0xffffffff
379 
380 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED
381 
382 			0: No error has been detected while executing this
383 			command
384 
385 			1: command not properly executed and returned with an
386 			error
387 
388 
389 
390 			NOTE: Current no error is defined, but field is put in
391 			place to avoid data structure changes in future...
392 */
393 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_OFFSET        0x00000008
394 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_LSB           0
395 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_ERROR_DETECTED_MASK          0x00000001
396 
397 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY
398 
399 			When set, REO has depleted the timeout list and all
400 			entries are gone.
401 
402 			<legal all>
403 */
404 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_OFFSET     0x00000008
405 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_LSB        1
406 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_TIMOUT_LIST_EMPTY_MASK       0x00000002
407 
408 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A
409 
410 			<legal 0>
411 */
412 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_OFFSET           0x00000008
413 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_LSB              2
414 #define REO_FLUSH_TIMEOUT_LIST_STATUS_2_RESERVED_2A_MASK             0xfffffffc
415 
416 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT
417 
418 			Consumer: REO
419 
420 			Producer: SW
421 
422 
423 
424 			The number of link descriptors released
425 
426 			<legal all>
427 */
428 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_OFFSET    0x0000000c
429 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_LSB       0
430 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_RELEASE_DESC_COUNT_MASK      0x0000ffff
431 
432 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT
433 
434 			Consumer: REO
435 
436 			Producer: SW
437 
438 
439 
440 			The number of buffers forwarded to the REO destination
441 			rings
442 
443 			<legal all>
444 */
445 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_OFFSET     0x0000000c
446 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_LSB        16
447 #define REO_FLUSH_TIMEOUT_LIST_STATUS_3_FORWARD_BUF_COUNT_MASK       0xffff0000
448 
449 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A
450 
451 			<legal 0>
452 */
453 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_OFFSET           0x00000010
454 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_LSB              0
455 #define REO_FLUSH_TIMEOUT_LIST_STATUS_4_RESERVED_4A_MASK             0xffffffff
456 
457 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A
458 
459 			<legal 0>
460 */
461 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_OFFSET           0x00000014
462 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_LSB              0
463 #define REO_FLUSH_TIMEOUT_LIST_STATUS_5_RESERVED_5A_MASK             0xffffffff
464 
465 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A
466 
467 			<legal 0>
468 */
469 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_OFFSET           0x00000018
470 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_LSB              0
471 #define REO_FLUSH_TIMEOUT_LIST_STATUS_6_RESERVED_6A_MASK             0xffffffff
472 
473 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A
474 
475 			<legal 0>
476 */
477 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_OFFSET           0x0000001c
478 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_LSB              0
479 #define REO_FLUSH_TIMEOUT_LIST_STATUS_7_RESERVED_7A_MASK             0xffffffff
480 
481 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A
482 
483 			<legal 0>
484 */
485 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_OFFSET           0x00000020
486 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_LSB              0
487 #define REO_FLUSH_TIMEOUT_LIST_STATUS_8_RESERVED_8A_MASK             0xffffffff
488 
489 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A
490 
491 			<legal 0>
492 */
493 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_OFFSET           0x00000024
494 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_LSB              0
495 #define REO_FLUSH_TIMEOUT_LIST_STATUS_9_RESERVED_9A_MASK             0xffffffff
496 
497 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A
498 
499 			<legal 0>
500 */
501 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_OFFSET         0x00000028
502 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_LSB            0
503 #define REO_FLUSH_TIMEOUT_LIST_STATUS_10_RESERVED_10A_MASK           0xffffffff
504 
505 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A
506 
507 			<legal 0>
508 */
509 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_OFFSET         0x0000002c
510 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_LSB            0
511 #define REO_FLUSH_TIMEOUT_LIST_STATUS_11_RESERVED_11A_MASK           0xffffffff
512 
513 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A
514 
515 			<legal 0>
516 */
517 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_OFFSET         0x00000030
518 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_LSB            0
519 #define REO_FLUSH_TIMEOUT_LIST_STATUS_12_RESERVED_12A_MASK           0xffffffff
520 
521 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A
522 
523 			<legal 0>
524 */
525 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_OFFSET         0x00000034
526 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_LSB            0
527 #define REO_FLUSH_TIMEOUT_LIST_STATUS_13_RESERVED_13A_MASK           0xffffffff
528 
529 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A
530 
531 			<legal 0>
532 */
533 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_OFFSET         0x00000038
534 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_LSB            0
535 #define REO_FLUSH_TIMEOUT_LIST_STATUS_14_RESERVED_14A_MASK           0xffffffff
536 
537 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A
538 
539 			<legal 0>
540 */
541 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_OFFSET         0x0000003c
542 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_LSB            0
543 #define REO_FLUSH_TIMEOUT_LIST_STATUS_15_RESERVED_15A_MASK           0xffffffff
544 
545 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A
546 
547 			<legal 0>
548 */
549 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_OFFSET         0x00000040
550 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_LSB            0
551 #define REO_FLUSH_TIMEOUT_LIST_STATUS_16_RESERVED_16A_MASK           0xffffffff
552 
553 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A
554 
555 			<legal 0>
556 */
557 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_OFFSET         0x00000044
558 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_LSB            0
559 #define REO_FLUSH_TIMEOUT_LIST_STATUS_17_RESERVED_17A_MASK           0xffffffff
560 
561 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A
562 
563 			<legal 0>
564 */
565 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_OFFSET         0x00000048
566 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_LSB            0
567 #define REO_FLUSH_TIMEOUT_LIST_STATUS_18_RESERVED_18A_MASK           0xffffffff
568 
569 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A
570 
571 			<legal 0>
572 */
573 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_OFFSET         0x0000004c
574 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_LSB            0
575 #define REO_FLUSH_TIMEOUT_LIST_STATUS_19_RESERVED_19A_MASK           0xffffffff
576 
577 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A
578 
579 			<legal 0>
580 */
581 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_OFFSET         0x00000050
582 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_LSB            0
583 #define REO_FLUSH_TIMEOUT_LIST_STATUS_20_RESERVED_20A_MASK           0xffffffff
584 
585 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A
586 
587 			<legal 0>
588 */
589 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_OFFSET         0x00000054
590 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_LSB            0
591 #define REO_FLUSH_TIMEOUT_LIST_STATUS_21_RESERVED_21A_MASK           0xffffffff
592 
593 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A
594 
595 			<legal 0>
596 */
597 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_OFFSET         0x00000058
598 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_LSB            0
599 #define REO_FLUSH_TIMEOUT_LIST_STATUS_22_RESERVED_22A_MASK           0xffffffff
600 
601 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A
602 
603 			<legal 0>
604 */
605 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_OFFSET         0x0000005c
606 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_LSB            0
607 #define REO_FLUSH_TIMEOUT_LIST_STATUS_23_RESERVED_23A_MASK           0xffffffff
608 
609 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A
610 
611 			<legal 0>
612 */
613 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_OFFSET         0x00000060
614 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_LSB            0
615 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_RESERVED_24A_MASK           0x0fffffff
616 
617 /* Description		REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT
618 
619 			A count value that indicates the number of times the
620 			producer of entries into this Ring has looped around the
621 			ring.
622 
623 			At initialization time, this value is set to 0. On the
624 			first loop, this value is set to 1. After the max value is
625 			reached allowed by the number of bits for this field, the
626 			count value continues with 0 again.
627 
628 
629 
630 			In case SW is the consumer of the ring entries, it can
631 			use this field to figure out up to where the producer of
632 			entries has created new entries. This eliminates the need to
633 			check where the head pointer' of the ring is located once
634 			the SW starts processing an interrupt indicating that new
635 			entries have been put into this ring...
636 
637 
638 
639 			Also note that SW if it wants only needs to look at the
640 			LSB bit of this count value.
641 
642 			<legal all>
643 */
644 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_OFFSET        0x00000060
645 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_LSB           28
646 #define REO_FLUSH_TIMEOUT_LIST_STATUS_24_LOOPING_COUNT_MASK          0xf0000000
647 
648 
649 #endif // _REO_FLUSH_TIMEOUT_LIST_STATUS_H_
650