xref: /wlan-driver/fw-api/hw/qca8074/v2/reo_get_queue_stats.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 // $ATH_LICENSE_HW_HDR_C$
18 //
19 // DO NOT EDIT!  This file is automatically generated
20 //               These definitions are tied to a particular hardware layout
21 
22 
23 #ifndef _REO_GET_QUEUE_STATS_H_
24 #define _REO_GET_QUEUE_STATS_H_
25 #if !defined(__ASSEMBLER__)
26 #endif
27 
28 #include "uniform_reo_cmd_header.h"
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0	struct uniform_reo_cmd_header cmd_header;
34 //	1	rx_reo_queue_desc_addr_31_0[31:0]
35 //	2	rx_reo_queue_desc_addr_39_32[7:0], clear_stats[8], reserved_2a[31:9]
36 //	3	reserved_3a[31:0]
37 //	4	reserved_4a[31:0]
38 //	5	reserved_5a[31:0]
39 //	6	reserved_6a[31:0]
40 //	7	reserved_7a[31:0]
41 //	8	reserved_8a[31:0]
42 //
43 // ################ END SUMMARY #################
44 
45 #define NUM_OF_DWORDS_REO_GET_QUEUE_STATS 9
46 
47 struct reo_get_queue_stats {
48     struct            uniform_reo_cmd_header                       cmd_header;
49              uint32_t rx_reo_queue_desc_addr_31_0     : 32; //[31:0]
50              uint32_t rx_reo_queue_desc_addr_39_32    :  8, //[7:0]
51                       clear_stats                     :  1, //[8]
52                       reserved_2a                     : 23; //[31:9]
53              uint32_t reserved_3a                     : 32; //[31:0]
54              uint32_t reserved_4a                     : 32; //[31:0]
55              uint32_t reserved_5a                     : 32; //[31:0]
56              uint32_t reserved_6a                     : 32; //[31:0]
57              uint32_t reserved_7a                     : 32; //[31:0]
58              uint32_t reserved_8a                     : 32; //[31:0]
59 };
60 
61 /*
62 
63 struct uniform_reo_cmd_header cmd_header
64 
65 			Consumer: REO
66 
67 			Producer: SW
68 
69 
70 
71 			Details for command execution tracking purposes.
72 
73 rx_reo_queue_desc_addr_31_0
74 
75 			Consumer: REO
76 
77 			Producer: SW
78 
79 
80 
81 			Address (lower 32 bits) of the REO queue descriptor
82 
83 			<legal all>
84 
85 rx_reo_queue_desc_addr_39_32
86 
87 			Consumer: REO
88 
89 			Producer: SW
90 
91 
92 
93 			Address (upper 8 bits) of the REO queue descriptor
94 
95 			<legal all>
96 
97 clear_stats
98 
99 			Clear stat settings....
100 
101 
102 
103 			<enum 0 no_clear> Do NOT clear the stats after
104 			generating the status
105 
106 			<enum 1 clear_the_stats> Clear the stats after
107 			generating the status.
108 
109 
110 
111 			The stats actually cleared are:
112 
113 			Timeout_count
114 
115 			Forward_due_to_bar_count
116 
117 			Duplicate_count
118 
119 			Frames_in_order_count
120 
121 			BAR_received_count
122 
123 			MPDU_Frames_processed_count
124 
125 			MSDU_Frames_processed_count
126 
127 			Total_processed_byte_count
128 
129 			Late_receive_MPDU_count
130 
131 			window_jump_2k
132 
133 			Hole_count
134 
135 			<legal 0-1>
136 
137 reserved_2a
138 
139 			<legal 0>
140 
141 reserved_3a
142 
143 			<legal 0>
144 
145 reserved_4a
146 
147 			<legal 0>
148 
149 reserved_5a
150 
151 			<legal 0>
152 
153 reserved_6a
154 
155 			<legal 0>
156 
157 reserved_7a
158 
159 			<legal 0>
160 
161 reserved_8a
162 
163 			<legal 0>
164 */
165 
166 
167  /* EXTERNAL REFERENCE : struct uniform_reo_cmd_header cmd_header */
168 
169 
170 /* Description		REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER
171 
172 			Consumer: REO/SW/DEBUG
173 
174 			Producer: SW
175 
176 
177 
178 			This number can be used by SW to track, identify and
179 			link the created commands with the command statusses
180 
181 
182 
183 
184 
185 			<legal all>
186 */
187 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER_OFFSET       0x00000000
188 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER_LSB          0
189 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER_MASK         0x0000ffff
190 
191 /* Description		REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED
192 
193 			Consumer: REO
194 
195 			Producer: SW
196 
197 
198 
199 			<enum 0 NoStatus> REO does not need to generate a status
200 			TLV for the execution of this command
201 
202 			<enum 1 StatusRequired> REO shall generate a status TLV
203 			for the execution of this command
204 
205 
206 
207 			<legal all>
208 */
209 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET  0x00000000
210 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED_LSB     16
211 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED_MASK    0x00010000
212 
213 /* Description		REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A
214 
215 			<legal 0>
216 */
217 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A_OFFSET          0x00000000
218 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A_LSB             17
219 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A_MASK            0xfffe0000
220 
221 /* Description		REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0
222 
223 			Consumer: REO
224 
225 			Producer: SW
226 
227 
228 
229 			Address (lower 32 bits) of the REO queue descriptor
230 
231 			<legal all>
232 */
233 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET     0x00000004
234 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_LSB        0
235 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_MASK       0xffffffff
236 
237 /* Description		REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32
238 
239 			Consumer: REO
240 
241 			Producer: SW
242 
243 
244 
245 			Address (upper 8 bits) of the REO queue descriptor
246 
247 			<legal all>
248 */
249 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET    0x00000008
250 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_LSB       0
251 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_MASK      0x000000ff
252 
253 /* Description		REO_GET_QUEUE_STATS_2_CLEAR_STATS
254 
255 			Clear stat settings....
256 
257 
258 
259 			<enum 0 no_clear> Do NOT clear the stats after
260 			generating the status
261 
262 			<enum 1 clear_the_stats> Clear the stats after
263 			generating the status.
264 
265 
266 
267 			The stats actually cleared are:
268 
269 			Timeout_count
270 
271 			Forward_due_to_bar_count
272 
273 			Duplicate_count
274 
275 			Frames_in_order_count
276 
277 			BAR_received_count
278 
279 			MPDU_Frames_processed_count
280 
281 			MSDU_Frames_processed_count
282 
283 			Total_processed_byte_count
284 
285 			Late_receive_MPDU_count
286 
287 			window_jump_2k
288 
289 			Hole_count
290 
291 			<legal 0-1>
292 */
293 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_OFFSET                     0x00000008
294 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_LSB                        8
295 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_MASK                       0x00000100
296 
297 /* Description		REO_GET_QUEUE_STATS_2_RESERVED_2A
298 
299 			<legal 0>
300 */
301 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_OFFSET                     0x00000008
302 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_LSB                        9
303 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_MASK                       0xfffffe00
304 
305 /* Description		REO_GET_QUEUE_STATS_3_RESERVED_3A
306 
307 			<legal 0>
308 */
309 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_OFFSET                     0x0000000c
310 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_LSB                        0
311 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_MASK                       0xffffffff
312 
313 /* Description		REO_GET_QUEUE_STATS_4_RESERVED_4A
314 
315 			<legal 0>
316 */
317 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_OFFSET                     0x00000010
318 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_LSB                        0
319 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_MASK                       0xffffffff
320 
321 /* Description		REO_GET_QUEUE_STATS_5_RESERVED_5A
322 
323 			<legal 0>
324 */
325 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_OFFSET                     0x00000014
326 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_LSB                        0
327 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_MASK                       0xffffffff
328 
329 /* Description		REO_GET_QUEUE_STATS_6_RESERVED_6A
330 
331 			<legal 0>
332 */
333 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_OFFSET                     0x00000018
334 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_LSB                        0
335 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_MASK                       0xffffffff
336 
337 /* Description		REO_GET_QUEUE_STATS_7_RESERVED_7A
338 
339 			<legal 0>
340 */
341 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_OFFSET                     0x0000001c
342 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_LSB                        0
343 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_MASK                       0xffffffff
344 
345 /* Description		REO_GET_QUEUE_STATS_8_RESERVED_8A
346 
347 			<legal 0>
348 */
349 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_OFFSET                     0x00000020
350 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_LSB                        0
351 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_MASK                       0xffffffff
352 
353 
354 #endif // _REO_GET_QUEUE_STATS_H_
355