xref: /wlan-driver/fw-api/hw/qca8074/v2/rx_timing_offset_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3*5113495bSYour Name  *
4*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for any
5*5113495bSYour Name  * purpose with or without fee is hereby granted, provided that the above
6*5113495bSYour Name  * copyright notice and this permission notice appear in all copies.
7*5113495bSYour Name  *
8*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*5113495bSYour Name  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*5113495bSYour Name  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*5113495bSYour Name  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*5113495bSYour Name  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*5113495bSYour Name  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*5113495bSYour Name  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*5113495bSYour Name  */
16*5113495bSYour Name 
17*5113495bSYour Name // $ATH_LICENSE_HW_HDR_C$
18*5113495bSYour Name //
19*5113495bSYour Name // DO NOT EDIT!  This file is automatically generated
20*5113495bSYour Name //               These definitions are tied to a particular hardware layout
21*5113495bSYour Name 
22*5113495bSYour Name 
23*5113495bSYour Name #ifndef _RX_TIMING_OFFSET_INFO_H_
24*5113495bSYour Name #define _RX_TIMING_OFFSET_INFO_H_
25*5113495bSYour Name #if !defined(__ASSEMBLER__)
26*5113495bSYour Name #endif
27*5113495bSYour Name 
28*5113495bSYour Name 
29*5113495bSYour Name // ################ START SUMMARY #################
30*5113495bSYour Name //
31*5113495bSYour Name //	Dword	Fields
32*5113495bSYour Name //	0	residual_phase_offset[11:0], reserved[31:12]
33*5113495bSYour Name //
34*5113495bSYour Name // ################ END SUMMARY #################
35*5113495bSYour Name 
36*5113495bSYour Name #define NUM_OF_DWORDS_RX_TIMING_OFFSET_INFO 1
37*5113495bSYour Name 
38*5113495bSYour Name struct rx_timing_offset_info {
39*5113495bSYour Name              uint32_t residual_phase_offset           : 12, //[11:0]
40*5113495bSYour Name                       reserved                        : 20; //[31:12]
41*5113495bSYour Name };
42*5113495bSYour Name 
43*5113495bSYour Name /*
44*5113495bSYour Name 
45*5113495bSYour Name residual_phase_offset
46*5113495bSYour Name 
47*5113495bSYour Name 			Cumulative reference frequency error at end of RX
48*5113495bSYour Name 
49*5113495bSYour Name 			<legal all>
50*5113495bSYour Name 
51*5113495bSYour Name reserved
52*5113495bSYour Name 
53*5113495bSYour Name 			<legal 0>
54*5113495bSYour Name */
55*5113495bSYour Name 
56*5113495bSYour Name 
57*5113495bSYour Name /* Description		RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET
58*5113495bSYour Name 
59*5113495bSYour Name 			Cumulative reference frequency error at end of RX
60*5113495bSYour Name 
61*5113495bSYour Name 			<legal all>
62*5113495bSYour Name */
63*5113495bSYour Name #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_OFFSET         0x00000000
64*5113495bSYour Name #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_LSB            0
65*5113495bSYour Name #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_MASK           0x00000fff
66*5113495bSYour Name 
67*5113495bSYour Name /* Description		RX_TIMING_OFFSET_INFO_0_RESERVED
68*5113495bSYour Name 
69*5113495bSYour Name 			<legal 0>
70*5113495bSYour Name */
71*5113495bSYour Name #define RX_TIMING_OFFSET_INFO_0_RESERVED_OFFSET                      0x00000000
72*5113495bSYour Name #define RX_TIMING_OFFSET_INFO_0_RESERVED_LSB                         12
73*5113495bSYour Name #define RX_TIMING_OFFSET_INFO_0_RESERVED_MASK                        0xfffff000
74*5113495bSYour Name 
75*5113495bSYour Name 
76*5113495bSYour Name #endif // _RX_TIMING_OFFSET_INFO_H_
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