1 /* 2 * Copyright (c) 2021 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 // $ATH_LICENSE_HW_HDR_C$ 18 // 19 // DO NOT EDIT! This file is automatically generated 20 // These definitions are tied to a particular hardware layout 21 22 23 #ifndef _BUFFER_ADDR_INFO_H_ 24 #define _BUFFER_ADDR_INFO_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 29 // ################ START SUMMARY ################# 30 // 31 // Dword Fields 32 // 0 buffer_addr_31_0[31:0] 33 // 1 buffer_addr_39_32[7:0], return_buffer_manager[10:8], sw_buffer_cookie[31:11] 34 // 35 // ################ END SUMMARY ################# 36 37 #define NUM_OF_DWORDS_BUFFER_ADDR_INFO 2 38 39 struct buffer_addr_info { 40 uint32_t buffer_addr_31_0 : 32; //[31:0] 41 uint32_t buffer_addr_39_32 : 8, //[7:0] 42 return_buffer_manager : 3, //[10:8] 43 sw_buffer_cookie : 21; //[31:11] 44 }; 45 46 /* 47 48 buffer_addr_31_0 49 50 Address (lower 32 bits) of the MSDU buffer OR 51 MSDU_EXTENSION descriptor OR Link Descriptor 52 53 54 55 In case of 'NULL' pointer, this field is set to 0 56 57 <legal all> 58 59 buffer_addr_39_32 60 61 Address (upper 8 bits) of the MSDU buffer OR 62 MSDU_EXTENSION descriptor OR Link Descriptor 63 64 65 66 In case of 'NULL' pointer, this field is set to 0 67 68 <legal all> 69 70 return_buffer_manager 71 72 Consumer: WBM 73 74 Producer: SW/FW 75 76 77 78 In case of 'NULL' pointer, this field is set to 0 79 80 81 82 Indicates to which buffer manager the buffer OR 83 MSDU_EXTENSION descriptor OR link descriptor that is being 84 pointed to shall be returned after the frame has been 85 processed. It is used by WBM for routing purposes. 86 87 88 89 <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 90 to the WMB buffer idle list 91 92 <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be 93 returned to the WMB idle link descriptor idle list 94 95 <enum 2 FW_BM> This buffer shall be returned to the FW 96 97 <enum 3 SW0_BM> This buffer shall be returned to the SW, 98 ring 0 99 100 <enum 4 SW1_BM> This buffer shall be returned to the SW, 101 ring 1 102 103 <enum 5 SW2_BM> This buffer shall be returned to the SW, 104 ring 2 105 106 <enum 6 SW3_BM> This buffer shall be returned to the SW, 107 ring 3 108 109 <enum 7 SW4_BM> This buffer shall be returned to the SW, 110 ring 3 111 112 113 114 <legal all> 115 116 sw_buffer_cookie 117 118 Cookie field exclusively used by SW. 119 120 121 122 In case of 'NULL' pointer, this field is set to 0 123 124 125 126 HW ignores the contents, accept that it passes the 127 programmed value on to other descriptors together with the 128 physical address 129 130 131 132 Field can be used by SW to for example associate the 133 buffers physical address with the virtual address 134 135 The bit definitions as used by SW are within SW HLD 136 specification 137 138 139 140 NOTE: 141 142 The three most significant bits can have a special 143 meaning in case this struct is embedded in a TX_MPDU_DETAILS 144 STRUCT, and field transmit_bw_restriction is set 145 146 147 148 In case of NON punctured transmission: 149 150 Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only 151 152 Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only 153 154 Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only 155 156 Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only 157 158 159 160 In case of punctured transmission: 161 162 Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only 163 164 Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only 165 166 Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only 167 168 Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only 169 170 Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only 171 172 Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only 173 174 Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only 175 176 Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only 177 178 179 180 Note: a punctured transmission is indicated by the 181 presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler 182 TLV 183 184 185 186 <legal all> 187 */ 188 189 190 /* Description BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0 191 192 Address (lower 32 bits) of the MSDU buffer OR 193 MSDU_EXTENSION descriptor OR Link Descriptor 194 195 196 197 In case of 'NULL' pointer, this field is set to 0 198 199 <legal all> 200 */ 201 #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET 0x00000000 202 #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_LSB 0 203 #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK 0xffffffff 204 205 /* Description BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32 206 207 Address (upper 8 bits) of the MSDU buffer OR 208 MSDU_EXTENSION descriptor OR Link Descriptor 209 210 211 212 In case of 'NULL' pointer, this field is set to 0 213 214 <legal all> 215 */ 216 #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_OFFSET 0x00000004 217 #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_LSB 0 218 #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK 0x000000ff 219 220 /* Description BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER 221 222 Consumer: WBM 223 224 Producer: SW/FW 225 226 227 228 In case of 'NULL' pointer, this field is set to 0 229 230 231 232 Indicates to which buffer manager the buffer OR 233 MSDU_EXTENSION descriptor OR link descriptor that is being 234 pointed to shall be returned after the frame has been 235 processed. It is used by WBM for routing purposes. 236 237 238 239 <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 240 to the WMB buffer idle list 241 242 <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be 243 returned to the WMB idle link descriptor idle list 244 245 <enum 2 FW_BM> This buffer shall be returned to the FW 246 247 <enum 3 SW0_BM> This buffer shall be returned to the SW, 248 ring 0 249 250 <enum 4 SW1_BM> This buffer shall be returned to the SW, 251 ring 1 252 253 <enum 5 SW2_BM> This buffer shall be returned to the SW, 254 ring 2 255 256 <enum 6 SW3_BM> This buffer shall be returned to the SW, 257 ring 3 258 259 <enum 7 SW4_BM> This buffer shall be returned to the SW, 260 ring 3 261 262 263 264 <legal all> 265 */ 266 #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET 0x00000004 267 #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB 8 268 #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK 0x00000700 269 270 /* Description BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE 271 272 Cookie field exclusively used by SW. 273 274 275 276 In case of 'NULL' pointer, this field is set to 0 277 278 279 280 HW ignores the contents, accept that it passes the 281 programmed value on to other descriptors together with the 282 physical address 283 284 285 286 Field can be used by SW to for example associate the 287 buffers physical address with the virtual address 288 289 The bit definitions as used by SW are within SW HLD 290 specification 291 292 293 294 NOTE: 295 296 The three most significant bits can have a special 297 meaning in case this struct is embedded in a TX_MPDU_DETAILS 298 STRUCT, and field transmit_bw_restriction is set 299 300 301 302 In case of NON punctured transmission: 303 304 Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only 305 306 Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only 307 308 Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only 309 310 Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only 311 312 313 314 In case of punctured transmission: 315 316 Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only 317 318 Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only 319 320 Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only 321 322 Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only 323 324 Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only 325 326 Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only 327 328 Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only 329 330 Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only 331 332 333 334 Note: a punctured transmission is indicated by the 335 presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler 336 TLV 337 338 339 340 <legal all> 341 */ 342 #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET 0x00000004 343 #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB 11 344 #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK 0xfffff800 345 346 347 #endif // _BUFFER_ADDR_INFO_H_ 348