1 /* 2 * Copyright (c) 2021 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 // $ATH_LICENSE_HW_HDR_C$ 18 // 19 // DO NOT EDIT! This file is automatically generated 20 // These definitions are tied to a particular hardware layout 21 22 23 #ifndef _REO_UPDATE_RX_REO_QUEUE_H_ 24 #define _REO_UPDATE_RX_REO_QUEUE_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 #include "uniform_reo_cmd_header.h" 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0 struct uniform_reo_cmd_header cmd_header; 34 // 1 rx_reo_queue_desc_addr_31_0[31:0] 35 // 2 rx_reo_queue_desc_addr_39_32[7:0], update_receive_queue_number[8], update_vld[9], update_associated_link_descriptor_counter[10], update_disable_duplicate_detection[11], update_soft_reorder_enable[12], update_ac[13], update_bar[14], update_rty[15], update_chk_2k_mode[16], update_oor_mode[17], update_ba_window_size[18], update_pn_check_needed[19], update_pn_shall_be_even[20], update_pn_shall_be_uneven[21], update_pn_handling_enable[22], update_pn_size[23], update_ignore_ampdu_flag[24], update_svld[25], update_ssn[26], update_seq_2k_error_detected_flag[27], update_pn_error_detected_flag[28], update_pn_valid[29], update_pn[30], clear_stat_counters[31] 36 // 3 receive_queue_number[15:0], vld[16], associated_link_descriptor_counter[18:17], disable_duplicate_detection[19], soft_reorder_enable[20], ac[22:21], bar[23], rty[24], chk_2k_mode[25], oor_mode[26], pn_check_needed[27], pn_shall_be_even[28], pn_shall_be_uneven[29], pn_handling_enable[30], ignore_ampdu_flag[31] 37 // 4 ba_window_size[7:0], pn_size[9:8], svld[10], ssn[22:11], seq_2k_error_detected_flag[23], pn_error_detected_flag[24], pn_valid[25], flush_from_cache[26], reserved_4a[31:27] 38 // 5 pn_31_0[31:0] 39 // 6 pn_63_32[31:0] 40 // 7 pn_95_64[31:0] 41 // 8 pn_127_96[31:0] 42 // 43 // ################ END SUMMARY ################# 44 45 #define NUM_OF_DWORDS_REO_UPDATE_RX_REO_QUEUE 9 46 47 struct reo_update_rx_reo_queue { 48 struct uniform_reo_cmd_header cmd_header; 49 uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0] 50 uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0] 51 update_receive_queue_number : 1, //[8] 52 update_vld : 1, //[9] 53 update_associated_link_descriptor_counter: 1, //[10] 54 update_disable_duplicate_detection: 1, //[11] 55 update_soft_reorder_enable : 1, //[12] 56 update_ac : 1, //[13] 57 update_bar : 1, //[14] 58 update_rty : 1, //[15] 59 update_chk_2k_mode : 1, //[16] 60 update_oor_mode : 1, //[17] 61 update_ba_window_size : 1, //[18] 62 update_pn_check_needed : 1, //[19] 63 update_pn_shall_be_even : 1, //[20] 64 update_pn_shall_be_uneven : 1, //[21] 65 update_pn_handling_enable : 1, //[22] 66 update_pn_size : 1, //[23] 67 update_ignore_ampdu_flag : 1, //[24] 68 update_svld : 1, //[25] 69 update_ssn : 1, //[26] 70 update_seq_2k_error_detected_flag: 1, //[27] 71 update_pn_error_detected_flag : 1, //[28] 72 update_pn_valid : 1, //[29] 73 update_pn : 1, //[30] 74 clear_stat_counters : 1; //[31] 75 uint32_t receive_queue_number : 16, //[15:0] 76 vld : 1, //[16] 77 associated_link_descriptor_counter: 2, //[18:17] 78 disable_duplicate_detection : 1, //[19] 79 soft_reorder_enable : 1, //[20] 80 ac : 2, //[22:21] 81 bar : 1, //[23] 82 rty : 1, //[24] 83 chk_2k_mode : 1, //[25] 84 oor_mode : 1, //[26] 85 pn_check_needed : 1, //[27] 86 pn_shall_be_even : 1, //[28] 87 pn_shall_be_uneven : 1, //[29] 88 pn_handling_enable : 1, //[30] 89 ignore_ampdu_flag : 1; //[31] 90 uint32_t ba_window_size : 8, //[7:0] 91 pn_size : 2, //[9:8] 92 svld : 1, //[10] 93 ssn : 12, //[22:11] 94 seq_2k_error_detected_flag : 1, //[23] 95 pn_error_detected_flag : 1, //[24] 96 pn_valid : 1, //[25] 97 flush_from_cache : 1, //[26] 98 reserved_4a : 5; //[31:27] 99 uint32_t pn_31_0 : 32; //[31:0] 100 uint32_t pn_63_32 : 32; //[31:0] 101 uint32_t pn_95_64 : 32; //[31:0] 102 uint32_t pn_127_96 : 32; //[31:0] 103 }; 104 105 /* 106 107 struct uniform_reo_cmd_header cmd_header 108 109 Consumer: REO 110 111 Producer: SW 112 113 114 115 Details for command execution tracking purposes. 116 117 rx_reo_queue_desc_addr_31_0 118 119 Consumer: REO 120 121 Producer: SW 122 123 124 125 Address (lower 32 bits) of the REO queue descriptor 126 127 <legal all> 128 129 rx_reo_queue_desc_addr_39_32 130 131 Consumer: REO 132 133 Producer: SW 134 135 136 137 Address (upper 8 bits) of the REO queue descriptor 138 139 <legal all> 140 141 update_receive_queue_number 142 143 Consumer: REO 144 145 Producer: SW 146 147 When set, receive_queue_number from this command will be 148 updated in the descriptor. 149 150 <legal all> 151 152 update_vld 153 154 Consumer: REO 155 156 Producer: SW 157 158 159 160 When clear, REO will NOT update the VLD bit setting. For 161 this setting, SW MUST set the Flush_from_cache bit in this 162 command. 163 164 165 166 When set, VLD from this command will be updated in the 167 descriptor. 168 169 <legal all> 170 171 update_associated_link_descriptor_counter 172 173 Consumer: REO 174 175 Producer: SW 176 177 When set, Associated_link_descriptor_counter from this 178 command will be updated in the descriptor. 179 180 <legal all> 181 182 update_disable_duplicate_detection 183 184 Consumer: REO 185 186 Producer: SW 187 188 When set, Disable_duplicate_detection from this command 189 will be updated in the descriptor. 190 191 <legal all> 192 193 update_soft_reorder_enable 194 195 Consumer: REO 196 197 Producer: SW 198 199 When set, Soft_reorder_enable from this command will be 200 updated in the descriptor. 201 202 <legal all> 203 204 update_ac 205 206 Consumer: REO 207 208 Producer: SW 209 210 When set, AC from this command will be updated in the 211 descriptor. 212 213 <legal all> 214 215 update_bar 216 217 Consumer: REO 218 219 Producer: SW 220 221 When set, BAR from this command will be updated in the 222 descriptor. 223 224 <legal all> 225 226 update_rty 227 228 Consumer: REO 229 230 Producer: SW 231 232 When set, RTY from this command will be updated in the 233 descriptor. 234 235 <legal all> 236 237 update_chk_2k_mode 238 239 Consumer: REO 240 241 Producer: SW 242 243 When set, Chk_2k_mode from this command will be updated 244 in the descriptor. 245 246 <legal all> 247 248 update_oor_mode 249 250 Consumer: REO 251 252 Producer: SW 253 254 When set, OOR_Mode from this command will be updated in 255 the descriptor. 256 257 <legal all> 258 259 update_ba_window_size 260 261 Consumer: REO 262 263 Producer: SW 264 265 When set, BA_window_size from this command will be 266 updated in the descriptor. 267 268 <legal all> 269 270 update_pn_check_needed 271 272 Consumer: REO 273 274 Producer: SW 275 276 When set, Pn_check_needed from this command will be 277 updated in the descriptor. 278 279 <legal all> 280 281 update_pn_shall_be_even 282 283 Consumer: REO 284 285 Producer: SW 286 287 When set, Pn_shall_be_even from this command will be 288 updated in the descriptor. 289 290 <legal all> 291 292 update_pn_shall_be_uneven 293 294 Consumer: REO 295 296 Producer: SW 297 298 When set, Pn_shall_be_uneven from this command will be 299 updated in the descriptor. 300 301 <legal all> 302 303 update_pn_handling_enable 304 305 Consumer: REO 306 307 Producer: SW 308 309 When set, Pn_handling_enable from this command will be 310 updated in the descriptor. 311 312 <legal all> 313 314 update_pn_size 315 316 Consumer: REO 317 318 Producer: SW 319 320 When set, Pn_size from this command will be updated in 321 the descriptor. 322 323 <legal all> 324 325 update_ignore_ampdu_flag 326 327 Consumer: REO 328 329 Producer: SW 330 331 When set, Ignore_ampdu_flag from this command will be 332 updated in the descriptor. 333 334 <legal all> 335 336 update_svld 337 338 Consumer: REO 339 340 Producer: SW 341 342 When set, Svld from this command will be updated in the 343 descriptor. 344 345 <legal all> 346 347 update_ssn 348 349 Consumer: REO 350 351 Producer: SW 352 353 When set, SSN from this command will be updated in the 354 descriptor. 355 356 <legal all> 357 358 update_seq_2k_error_detected_flag 359 360 Consumer: REO 361 362 Producer: SW 363 364 When set, Seq_2k_error_detected_flag from this command 365 will be updated in the descriptor. 366 367 <legal all> 368 369 update_pn_error_detected_flag 370 371 Consumer: REO 372 373 Producer: SW 374 375 When set, pn_error_detected_flag from this command will 376 be updated in the descriptor. 377 378 <legal all> 379 380 update_pn_valid 381 382 Consumer: REO 383 384 Producer: SW 385 386 When set, pn_valid from this command will be updated in 387 the descriptor. 388 389 <legal all> 390 391 update_pn 392 393 Consumer: REO 394 395 Producer: SW 396 397 When set, all pn_... fields from this command will be 398 updated in the descriptor. 399 400 <legal all> 401 402 clear_stat_counters 403 404 Consumer: REO 405 406 Producer: SW 407 408 When set, REO will clear (=> set to 0) the following 409 stat counters in the REO_QUEUE_STRUCT 410 411 412 413 Last_rx_enqueue_TimeStamp 414 415 Last_rx_dequeue_Timestamp 416 417 Rx_bitmap (not a counter, but bitmap is cleared) 418 419 Timeout_count 420 421 Forward_due_to_bar_count 422 423 Duplicate_count 424 425 Frames_in_order_count 426 427 BAR_received_count 428 429 MPDU_Frames_processed_count 430 431 MSDU_Frames_processed_count 432 433 Total_processed_byte_count 434 435 Late_receive_MPDU_count 436 437 window_jump_2k 438 439 Hole_count 440 441 442 443 <legal all> 444 445 receive_queue_number 446 447 448 449 450 Field value to be copied over into the RX_REO_QUEUE 451 descriptor. 452 453 <legal all> 454 455 vld 456 457 Field only valid when Update_VLD is set 458 459 460 461 Field value to be copied over into the RX_REO_QUEUE 462 descriptor. 463 464 <legal all> 465 466 associated_link_descriptor_counter 467 468 Field only valid when 469 Update_Associated_link_descriptor_counter is set 470 471 472 473 Field value to be copied over into the RX_REO_QUEUE 474 descriptor. 475 476 <legal all> 477 478 disable_duplicate_detection 479 480 Field only valid when Update_Disable_duplicate_detection 481 is set 482 483 484 485 Field value to be copied over into the RX_REO_QUEUE 486 descriptor. 487 488 <legal all> 489 490 soft_reorder_enable 491 492 Field only valid when Update_Soft_reorder_enable is set 493 494 495 496 Field value to be copied over into the RX_REO_QUEUE 497 descriptor. 498 499 <legal all> 500 501 ac 502 503 Field only valid when Update_AC is set 504 505 506 507 Field value to be copied over into the RX_REO_QUEUE 508 descriptor. 509 510 <legal all> 511 512 bar 513 514 Field only valid when Update_BAR is set 515 516 517 518 Field value to be copied over into the RX_REO_QUEUE 519 descriptor. 520 521 <legal all> 522 523 rty 524 525 Field only valid when Update_RTY is set 526 527 528 529 Field value to be copied over into the RX_REO_QUEUE 530 descriptor. 531 532 <legal all> 533 534 chk_2k_mode 535 536 Field only valid when Update_Chk_2k_Mode is set 537 538 539 540 Field value to be copied over into the RX_REO_QUEUE 541 descriptor. 542 543 <legal all> 544 545 oor_mode 546 547 Field only valid when Update_OOR_Mode is set 548 549 550 551 Field value to be copied over into the RX_REO_QUEUE 552 descriptor. 553 554 <legal all> 555 556 pn_check_needed 557 558 Field only valid when Update_Pn_check_needed is set 559 560 561 562 Field value to be copied over into the RX_REO_QUEUE 563 descriptor. 564 565 <legal all> 566 567 pn_shall_be_even 568 569 Field only valid when Update_Pn_shall_be_even is set 570 571 572 573 Field value to be copied over into the RX_REO_QUEUE 574 descriptor. 575 576 <legal all> 577 578 pn_shall_be_uneven 579 580 Field only valid when Update_Pn_shall_be_uneven is set 581 582 583 584 Field value to be copied over into the RX_REO_QUEUE 585 descriptor. 586 587 <legal all> 588 589 pn_handling_enable 590 591 Field only valid when Update_Pn_handling_enable is set 592 593 594 595 Field value to be copied over into the RX_REO_QUEUE 596 descriptor. 597 598 <legal all> 599 600 ignore_ampdu_flag 601 602 Field only valid when Update_Ignore_ampdu_flag is set 603 604 605 606 Field value to be copied over into the RX_REO_QUEUE 607 descriptor. 608 609 <legal all> 610 611 ba_window_size 612 613 Field only valid when Update_BA_window_size is set 614 615 616 617 Field value to be copied over into the RX_REO_QUEUE 618 descriptor. 619 620 <legal all> 621 622 pn_size 623 624 Field only valid when Update_Pn_size is set 625 626 627 628 Field value to be copied over into the RX_REO_QUEUE 629 descriptor. 630 631 632 633 <enum 0 pn_size_24> 634 635 <enum 1 pn_size_48> 636 637 <enum 2 pn_size_128> 638 639 640 641 <legal 0-2> 642 643 svld 644 645 Field only valid when Update_Svld is set 646 647 648 649 Field value to be copied over into the RX_REO_QUEUE 650 descriptor. 651 652 <legal all> 653 654 ssn 655 656 Field only valid when Update_SSN is set 657 658 659 660 Field value to be copied over into the RX_REO_QUEUE 661 descriptor. 662 663 <legal all> 664 665 seq_2k_error_detected_flag 666 667 Field only valid when Update_Seq_2k_error_detected_flag 668 is set 669 670 671 672 Field value to be copied over into the RX_REO_QUEUE 673 descriptor. 674 675 <legal all> 676 677 pn_error_detected_flag 678 679 Field only valid when Update_pn_error_detected_flag is 680 set 681 682 683 684 Field value to be copied over into the RX_REO_QUEUE 685 descriptor. 686 687 <legal all> 688 689 pn_valid 690 691 Field only valid when Update_pn_valid is set 692 693 694 695 Field value to be copied over into the RX_REO_QUEUE 696 descriptor. 697 698 <legal all> 699 700 flush_from_cache 701 702 When set, REO shall, after finishing the execution of 703 this command, flush the related descriptor from the cache. 704 705 <legal all> 706 707 reserved_4a 708 709 <legal 0> 710 711 pn_31_0 712 713 Field only valid when Update_Pn is set 714 715 716 717 Field value to be copied over into the RX_REO_QUEUE 718 descriptor. 719 720 <legal all> 721 722 pn_63_32 723 724 Field only valid when Update_pn is set 725 726 727 728 Field value to be copied over into the RX_REO_QUEUE 729 descriptor. 730 731 <legal all> 732 733 pn_95_64 734 735 Field only valid when Update_pn is set 736 737 738 739 Field value to be copied over into the RX_REO_QUEUE 740 descriptor. 741 742 <legal all> 743 744 pn_127_96 745 746 Field only valid when Update_pn is set 747 748 749 750 Field value to be copied over into the RX_REO_QUEUE 751 descriptor. 752 753 <legal all> 754 */ 755 756 757 /* EXTERNAL REFERENCE : struct uniform_reo_cmd_header cmd_header */ 758 759 760 /* Description REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER 761 762 Consumer: REO/SW/DEBUG 763 764 Producer: SW 765 766 767 768 This number can be used by SW to track, identify and 769 link the created commands with the command statusses 770 771 772 773 774 775 <legal all> 776 */ 777 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x00000000 778 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_LSB 0 779 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_MASK 0x0000ffff 780 781 /* Description REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED 782 783 Consumer: REO 784 785 Producer: SW 786 787 788 789 <enum 0 NoStatus> REO does not need to generate a status 790 TLV for the execution of this command 791 792 <enum 1 StatusRequired> REO shall generate a status TLV 793 for the execution of this command 794 795 796 797 <legal all> 798 */ 799 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET 0x00000000 800 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_LSB 16 801 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_MASK 0x00010000 802 803 /* Description REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A 804 805 <legal 0> 806 */ 807 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_OFFSET 0x00000000 808 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_LSB 17 809 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_MASK 0xfffe0000 810 811 /* Description REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0 812 813 Consumer: REO 814 815 Producer: SW 816 817 818 819 Address (lower 32 bits) of the REO queue descriptor 820 821 <legal all> 822 */ 823 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000004 824 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0 825 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff 826 827 /* Description REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32 828 829 Consumer: REO 830 831 Producer: SW 832 833 834 835 Address (upper 8 bits) of the REO queue descriptor 836 837 <legal all> 838 */ 839 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000008 840 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 841 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff 842 843 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER 844 845 Consumer: REO 846 847 Producer: SW 848 849 When set, receive_queue_number from this command will be 850 updated in the descriptor. 851 852 <legal all> 853 */ 854 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_OFFSET 0x00000008 855 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_LSB 8 856 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_MASK 0x00000100 857 858 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD 859 860 Consumer: REO 861 862 Producer: SW 863 864 865 866 When clear, REO will NOT update the VLD bit setting. For 867 this setting, SW MUST set the Flush_from_cache bit in this 868 command. 869 870 871 872 When set, VLD from this command will be updated in the 873 descriptor. 874 875 <legal all> 876 */ 877 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_OFFSET 0x00000008 878 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_LSB 9 879 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_MASK 0x00000200 880 881 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER 882 883 Consumer: REO 884 885 Producer: SW 886 887 When set, Associated_link_descriptor_counter from this 888 command will be updated in the descriptor. 889 890 <legal all> 891 */ 892 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x00000008 893 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 10 894 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x00000400 895 896 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION 897 898 Consumer: REO 899 900 Producer: SW 901 902 When set, Disable_duplicate_detection from this command 903 will be updated in the descriptor. 904 905 <legal all> 906 */ 907 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_OFFSET 0x00000008 908 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_LSB 11 909 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_MASK 0x00000800 910 911 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE 912 913 Consumer: REO 914 915 Producer: SW 916 917 When set, Soft_reorder_enable from this command will be 918 updated in the descriptor. 919 920 <legal all> 921 */ 922 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_OFFSET 0x00000008 923 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_LSB 12 924 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_MASK 0x00001000 925 926 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC 927 928 Consumer: REO 929 930 Producer: SW 931 932 When set, AC from this command will be updated in the 933 descriptor. 934 935 <legal all> 936 */ 937 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_OFFSET 0x00000008 938 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_LSB 13 939 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_MASK 0x00002000 940 941 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR 942 943 Consumer: REO 944 945 Producer: SW 946 947 When set, BAR from this command will be updated in the 948 descriptor. 949 950 <legal all> 951 */ 952 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_OFFSET 0x00000008 953 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_LSB 14 954 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_MASK 0x00004000 955 956 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY 957 958 Consumer: REO 959 960 Producer: SW 961 962 When set, RTY from this command will be updated in the 963 descriptor. 964 965 <legal all> 966 */ 967 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_OFFSET 0x00000008 968 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_LSB 15 969 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_MASK 0x00008000 970 971 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE 972 973 Consumer: REO 974 975 Producer: SW 976 977 When set, Chk_2k_mode from this command will be updated 978 in the descriptor. 979 980 <legal all> 981 */ 982 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_OFFSET 0x00000008 983 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_LSB 16 984 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_MASK 0x00010000 985 986 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE 987 988 Consumer: REO 989 990 Producer: SW 991 992 When set, OOR_Mode from this command will be updated in 993 the descriptor. 994 995 <legal all> 996 */ 997 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_OFFSET 0x00000008 998 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_LSB 17 999 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_MASK 0x00020000 1000 1001 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE 1002 1003 Consumer: REO 1004 1005 Producer: SW 1006 1007 When set, BA_window_size from this command will be 1008 updated in the descriptor. 1009 1010 <legal all> 1011 */ 1012 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_OFFSET 0x00000008 1013 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_LSB 18 1014 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_MASK 0x00040000 1015 1016 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED 1017 1018 Consumer: REO 1019 1020 Producer: SW 1021 1022 When set, Pn_check_needed from this command will be 1023 updated in the descriptor. 1024 1025 <legal all> 1026 */ 1027 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_OFFSET 0x00000008 1028 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_LSB 19 1029 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_MASK 0x00080000 1030 1031 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN 1032 1033 Consumer: REO 1034 1035 Producer: SW 1036 1037 When set, Pn_shall_be_even from this command will be 1038 updated in the descriptor. 1039 1040 <legal all> 1041 */ 1042 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_OFFSET 0x00000008 1043 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_LSB 20 1044 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_MASK 0x00100000 1045 1046 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN 1047 1048 Consumer: REO 1049 1050 Producer: SW 1051 1052 When set, Pn_shall_be_uneven from this command will be 1053 updated in the descriptor. 1054 1055 <legal all> 1056 */ 1057 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_OFFSET 0x00000008 1058 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_LSB 21 1059 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_MASK 0x00200000 1060 1061 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE 1062 1063 Consumer: REO 1064 1065 Producer: SW 1066 1067 When set, Pn_handling_enable from this command will be 1068 updated in the descriptor. 1069 1070 <legal all> 1071 */ 1072 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_OFFSET 0x00000008 1073 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_LSB 22 1074 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_MASK 0x00400000 1075 1076 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE 1077 1078 Consumer: REO 1079 1080 Producer: SW 1081 1082 When set, Pn_size from this command will be updated in 1083 the descriptor. 1084 1085 <legal all> 1086 */ 1087 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_OFFSET 0x00000008 1088 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_LSB 23 1089 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_MASK 0x00800000 1090 1091 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG 1092 1093 Consumer: REO 1094 1095 Producer: SW 1096 1097 When set, Ignore_ampdu_flag from this command will be 1098 updated in the descriptor. 1099 1100 <legal all> 1101 */ 1102 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_OFFSET 0x00000008 1103 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_LSB 24 1104 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_MASK 0x01000000 1105 1106 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD 1107 1108 Consumer: REO 1109 1110 Producer: SW 1111 1112 When set, Svld from this command will be updated in the 1113 descriptor. 1114 1115 <legal all> 1116 */ 1117 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_OFFSET 0x00000008 1118 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_LSB 25 1119 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_MASK 0x02000000 1120 1121 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN 1122 1123 Consumer: REO 1124 1125 Producer: SW 1126 1127 When set, SSN from this command will be updated in the 1128 descriptor. 1129 1130 <legal all> 1131 */ 1132 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_OFFSET 0x00000008 1133 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_LSB 26 1134 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_MASK 0x04000000 1135 1136 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG 1137 1138 Consumer: REO 1139 1140 Producer: SW 1141 1142 When set, Seq_2k_error_detected_flag from this command 1143 will be updated in the descriptor. 1144 1145 <legal all> 1146 */ 1147 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x00000008 1148 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_LSB 27 1149 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x08000000 1150 1151 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG 1152 1153 Consumer: REO 1154 1155 Producer: SW 1156 1157 When set, pn_error_detected_flag from this command will 1158 be updated in the descriptor. 1159 1160 <legal all> 1161 */ 1162 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_OFFSET 0x00000008 1163 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_LSB 28 1164 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_MASK 0x10000000 1165 1166 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID 1167 1168 Consumer: REO 1169 1170 Producer: SW 1171 1172 When set, pn_valid from this command will be updated in 1173 the descriptor. 1174 1175 <legal all> 1176 */ 1177 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_OFFSET 0x00000008 1178 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_LSB 29 1179 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_MASK 0x20000000 1180 1181 /* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN 1182 1183 Consumer: REO 1184 1185 Producer: SW 1186 1187 When set, all pn_... fields from this command will be 1188 updated in the descriptor. 1189 1190 <legal all> 1191 */ 1192 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_OFFSET 0x00000008 1193 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_LSB 30 1194 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_MASK 0x40000000 1195 1196 /* Description REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS 1197 1198 Consumer: REO 1199 1200 Producer: SW 1201 1202 When set, REO will clear (=> set to 0) the following 1203 stat counters in the REO_QUEUE_STRUCT 1204 1205 1206 1207 Last_rx_enqueue_TimeStamp 1208 1209 Last_rx_dequeue_Timestamp 1210 1211 Rx_bitmap (not a counter, but bitmap is cleared) 1212 1213 Timeout_count 1214 1215 Forward_due_to_bar_count 1216 1217 Duplicate_count 1218 1219 Frames_in_order_count 1220 1221 BAR_received_count 1222 1223 MPDU_Frames_processed_count 1224 1225 MSDU_Frames_processed_count 1226 1227 Total_processed_byte_count 1228 1229 Late_receive_MPDU_count 1230 1231 window_jump_2k 1232 1233 Hole_count 1234 1235 1236 1237 <legal all> 1238 */ 1239 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_OFFSET 0x00000008 1240 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_LSB 31 1241 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_MASK 0x80000000 1242 1243 /* Description REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER 1244 1245 1246 1247 1248 Field value to be copied over into the RX_REO_QUEUE 1249 descriptor. 1250 1251 <legal all> 1252 */ 1253 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000000c 1254 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_LSB 0 1255 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_MASK 0x0000ffff 1256 1257 /* Description REO_UPDATE_RX_REO_QUEUE_3_VLD 1258 1259 Field only valid when Update_VLD is set 1260 1261 1262 1263 Field value to be copied over into the RX_REO_QUEUE 1264 descriptor. 1265 1266 <legal all> 1267 */ 1268 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_OFFSET 0x0000000c 1269 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_LSB 16 1270 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_MASK 0x00010000 1271 1272 /* Description REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER 1273 1274 Field only valid when 1275 Update_Associated_link_descriptor_counter is set 1276 1277 1278 1279 Field value to be copied over into the RX_REO_QUEUE 1280 descriptor. 1281 1282 <legal all> 1283 */ 1284 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x0000000c 1285 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 17 1286 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x00060000 1287 1288 /* Description REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION 1289 1290 Field only valid when Update_Disable_duplicate_detection 1291 is set 1292 1293 1294 1295 Field value to be copied over into the RX_REO_QUEUE 1296 descriptor. 1297 1298 <legal all> 1299 */ 1300 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_OFFSET 0x0000000c 1301 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_LSB 19 1302 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_MASK 0x00080000 1303 1304 /* Description REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE 1305 1306 Field only valid when Update_Soft_reorder_enable is set 1307 1308 1309 1310 Field value to be copied over into the RX_REO_QUEUE 1311 descriptor. 1312 1313 <legal all> 1314 */ 1315 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_OFFSET 0x0000000c 1316 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_LSB 20 1317 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_MASK 0x00100000 1318 1319 /* Description REO_UPDATE_RX_REO_QUEUE_3_AC 1320 1321 Field only valid when Update_AC is set 1322 1323 1324 1325 Field value to be copied over into the RX_REO_QUEUE 1326 descriptor. 1327 1328 <legal all> 1329 */ 1330 #define REO_UPDATE_RX_REO_QUEUE_3_AC_OFFSET 0x0000000c 1331 #define REO_UPDATE_RX_REO_QUEUE_3_AC_LSB 21 1332 #define REO_UPDATE_RX_REO_QUEUE_3_AC_MASK 0x00600000 1333 1334 /* Description REO_UPDATE_RX_REO_QUEUE_3_BAR 1335 1336 Field only valid when Update_BAR is set 1337 1338 1339 1340 Field value to be copied over into the RX_REO_QUEUE 1341 descriptor. 1342 1343 <legal all> 1344 */ 1345 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_OFFSET 0x0000000c 1346 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_LSB 23 1347 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_MASK 0x00800000 1348 1349 /* Description REO_UPDATE_RX_REO_QUEUE_3_RTY 1350 1351 Field only valid when Update_RTY is set 1352 1353 1354 1355 Field value to be copied over into the RX_REO_QUEUE 1356 descriptor. 1357 1358 <legal all> 1359 */ 1360 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_OFFSET 0x0000000c 1361 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_LSB 24 1362 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_MASK 0x01000000 1363 1364 /* Description REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE 1365 1366 Field only valid when Update_Chk_2k_Mode is set 1367 1368 1369 1370 Field value to be copied over into the RX_REO_QUEUE 1371 descriptor. 1372 1373 <legal all> 1374 */ 1375 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_OFFSET 0x0000000c 1376 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_LSB 25 1377 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_MASK 0x02000000 1378 1379 /* Description REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE 1380 1381 Field only valid when Update_OOR_Mode is set 1382 1383 1384 1385 Field value to be copied over into the RX_REO_QUEUE 1386 descriptor. 1387 1388 <legal all> 1389 */ 1390 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_OFFSET 0x0000000c 1391 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_LSB 26 1392 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_MASK 0x04000000 1393 1394 /* Description REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED 1395 1396 Field only valid when Update_Pn_check_needed is set 1397 1398 1399 1400 Field value to be copied over into the RX_REO_QUEUE 1401 descriptor. 1402 1403 <legal all> 1404 */ 1405 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_OFFSET 0x0000000c 1406 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_LSB 27 1407 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_MASK 0x08000000 1408 1409 /* Description REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN 1410 1411 Field only valid when Update_Pn_shall_be_even is set 1412 1413 1414 1415 Field value to be copied over into the RX_REO_QUEUE 1416 descriptor. 1417 1418 <legal all> 1419 */ 1420 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_OFFSET 0x0000000c 1421 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_LSB 28 1422 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_MASK 0x10000000 1423 1424 /* Description REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN 1425 1426 Field only valid when Update_Pn_shall_be_uneven is set 1427 1428 1429 1430 Field value to be copied over into the RX_REO_QUEUE 1431 descriptor. 1432 1433 <legal all> 1434 */ 1435 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_OFFSET 0x0000000c 1436 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_LSB 29 1437 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_MASK 0x20000000 1438 1439 /* Description REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE 1440 1441 Field only valid when Update_Pn_handling_enable is set 1442 1443 1444 1445 Field value to be copied over into the RX_REO_QUEUE 1446 descriptor. 1447 1448 <legal all> 1449 */ 1450 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_OFFSET 0x0000000c 1451 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_LSB 30 1452 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_MASK 0x40000000 1453 1454 /* Description REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG 1455 1456 Field only valid when Update_Ignore_ampdu_flag is set 1457 1458 1459 1460 Field value to be copied over into the RX_REO_QUEUE 1461 descriptor. 1462 1463 <legal all> 1464 */ 1465 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_OFFSET 0x0000000c 1466 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_LSB 31 1467 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_MASK 0x80000000 1468 1469 /* Description REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE 1470 1471 Field only valid when Update_BA_window_size is set 1472 1473 1474 1475 Field value to be copied over into the RX_REO_QUEUE 1476 descriptor. 1477 1478 <legal all> 1479 */ 1480 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_OFFSET 0x00000010 1481 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_LSB 0 1482 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_MASK 0x000000ff 1483 1484 /* Description REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE 1485 1486 Field only valid when Update_Pn_size is set 1487 1488 1489 1490 Field value to be copied over into the RX_REO_QUEUE 1491 descriptor. 1492 1493 1494 1495 <enum 0 pn_size_24> 1496 1497 <enum 1 pn_size_48> 1498 1499 <enum 2 pn_size_128> 1500 1501 1502 1503 <legal 0-2> 1504 */ 1505 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_OFFSET 0x00000010 1506 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_LSB 8 1507 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_MASK 0x00000300 1508 1509 /* Description REO_UPDATE_RX_REO_QUEUE_4_SVLD 1510 1511 Field only valid when Update_Svld is set 1512 1513 1514 1515 Field value to be copied over into the RX_REO_QUEUE 1516 descriptor. 1517 1518 <legal all> 1519 */ 1520 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_OFFSET 0x00000010 1521 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_LSB 10 1522 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_MASK 0x00000400 1523 1524 /* Description REO_UPDATE_RX_REO_QUEUE_4_SSN 1525 1526 Field only valid when Update_SSN is set 1527 1528 1529 1530 Field value to be copied over into the RX_REO_QUEUE 1531 descriptor. 1532 1533 <legal all> 1534 */ 1535 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_OFFSET 0x00000010 1536 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_LSB 11 1537 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_MASK 0x007ff800 1538 1539 /* Description REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG 1540 1541 Field only valid when Update_Seq_2k_error_detected_flag 1542 is set 1543 1544 1545 1546 Field value to be copied over into the RX_REO_QUEUE 1547 descriptor. 1548 1549 <legal all> 1550 */ 1551 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x00000010 1552 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_LSB 23 1553 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x00800000 1554 1555 /* Description REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG 1556 1557 Field only valid when Update_pn_error_detected_flag is 1558 set 1559 1560 1561 1562 Field value to be copied over into the RX_REO_QUEUE 1563 descriptor. 1564 1565 <legal all> 1566 */ 1567 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_OFFSET 0x00000010 1568 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_LSB 24 1569 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_MASK 0x01000000 1570 1571 /* Description REO_UPDATE_RX_REO_QUEUE_4_PN_VALID 1572 1573 Field only valid when Update_pn_valid is set 1574 1575 1576 1577 Field value to be copied over into the RX_REO_QUEUE 1578 descriptor. 1579 1580 <legal all> 1581 */ 1582 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_OFFSET 0x00000010 1583 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_LSB 25 1584 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_MASK 0x02000000 1585 1586 /* Description REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE 1587 1588 When set, REO shall, after finishing the execution of 1589 this command, flush the related descriptor from the cache. 1590 1591 <legal all> 1592 */ 1593 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_OFFSET 0x00000010 1594 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_LSB 26 1595 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_MASK 0x04000000 1596 1597 /* Description REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A 1598 1599 <legal 0> 1600 */ 1601 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_OFFSET 0x00000010 1602 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_LSB 27 1603 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_MASK 0xf8000000 1604 1605 /* Description REO_UPDATE_RX_REO_QUEUE_5_PN_31_0 1606 1607 Field only valid when Update_Pn is set 1608 1609 1610 1611 Field value to be copied over into the RX_REO_QUEUE 1612 descriptor. 1613 1614 <legal all> 1615 */ 1616 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_OFFSET 0x00000014 1617 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_LSB 0 1618 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_MASK 0xffffffff 1619 1620 /* Description REO_UPDATE_RX_REO_QUEUE_6_PN_63_32 1621 1622 Field only valid when Update_pn is set 1623 1624 1625 1626 Field value to be copied over into the RX_REO_QUEUE 1627 descriptor. 1628 1629 <legal all> 1630 */ 1631 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_OFFSET 0x00000018 1632 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_LSB 0 1633 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_MASK 0xffffffff 1634 1635 /* Description REO_UPDATE_RX_REO_QUEUE_7_PN_95_64 1636 1637 Field only valid when Update_pn is set 1638 1639 1640 1641 Field value to be copied over into the RX_REO_QUEUE 1642 descriptor. 1643 1644 <legal all> 1645 */ 1646 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_OFFSET 0x0000001c 1647 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_LSB 0 1648 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_MASK 0xffffffff 1649 1650 /* Description REO_UPDATE_RX_REO_QUEUE_8_PN_127_96 1651 1652 Field only valid when Update_pn is set 1653 1654 1655 1656 Field value to be copied over into the RX_REO_QUEUE 1657 descriptor. 1658 1659 <legal all> 1660 */ 1661 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_OFFSET 0x00000020 1662 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_LSB 0 1663 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_MASK 0xffffffff 1664 1665 1666 #endif // _REO_UPDATE_RX_REO_QUEUE_H_ 1667