1 /* 2 * Copyright (c) 2021 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 // $ATH_LICENSE_HW_HDR_C$ 18 // 19 // DO NOT EDIT! This file is automatically generated 20 // These definitions are tied to a particular hardware layout 21 22 23 #ifndef _RX_ATTENTION_H_ 24 #define _RX_ATTENTION_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 29 // ################ START SUMMARY ################# 30 // 31 // Dword Fields 32 // 0 rxpcu_mpdu_filter_in_category[1:0], sw_frame_group_id[8:2], reserved_0[15:9], phy_ppdu_id[31:16] 33 // 1 first_mpdu[0], reserved_1a[1], mcast_bcast[2], ast_index_not_found[3], ast_index_timeout[4], power_mgmt[5], non_qos[6], null_data[7], mgmt_type[8], ctrl_type[9], more_data[10], eosp[11], a_msdu_error[12], fragment_flag[13], order[14], cce_match[15], overflow_err[16], msdu_length_err[17], tcp_udp_chksum_fail[18], ip_chksum_fail[19], sa_idx_invalid[20], da_idx_invalid[21], reserved_1b[22], rx_in_tx_decrypt_byp[23], encrypt_required[24], directed[25], buffer_fragment[26], mpdu_length_err[27], tkip_mic_err[28], decrypt_err[29], unencrypted_frame_err[30], fcs_err[31] 34 // 2 flow_idx_timeout[0], flow_idx_invalid[1], wifi_parser_error[2], amsdu_parser_error[3], sa_idx_timeout[4], da_idx_timeout[5], msdu_limit_error[6], da_is_valid[7], da_is_mcbc[8], sa_is_valid[9], decrypt_status_code[12:10], rx_bitmap_not_updated[13], reserved_2[30:14], msdu_done[31] 35 // 36 // ################ END SUMMARY ################# 37 38 #define NUM_OF_DWORDS_RX_ATTENTION 3 39 40 struct rx_attention { 41 uint32_t rxpcu_mpdu_filter_in_category : 2, //[1:0] 42 sw_frame_group_id : 7, //[8:2] 43 reserved_0 : 7, //[15:9] 44 phy_ppdu_id : 16; //[31:16] 45 uint32_t first_mpdu : 1, //[0] 46 reserved_1a : 1, //[1] 47 mcast_bcast : 1, //[2] 48 ast_index_not_found : 1, //[3] 49 ast_index_timeout : 1, //[4] 50 power_mgmt : 1, //[5] 51 non_qos : 1, //[6] 52 null_data : 1, //[7] 53 mgmt_type : 1, //[8] 54 ctrl_type : 1, //[9] 55 more_data : 1, //[10] 56 eosp : 1, //[11] 57 a_msdu_error : 1, //[12] 58 fragment_flag : 1, //[13] 59 order : 1, //[14] 60 cce_match : 1, //[15] 61 overflow_err : 1, //[16] 62 msdu_length_err : 1, //[17] 63 tcp_udp_chksum_fail : 1, //[18] 64 ip_chksum_fail : 1, //[19] 65 sa_idx_invalid : 1, //[20] 66 da_idx_invalid : 1, //[21] 67 reserved_1b : 1, //[22] 68 rx_in_tx_decrypt_byp : 1, //[23] 69 encrypt_required : 1, //[24] 70 directed : 1, //[25] 71 buffer_fragment : 1, //[26] 72 mpdu_length_err : 1, //[27] 73 tkip_mic_err : 1, //[28] 74 decrypt_err : 1, //[29] 75 unencrypted_frame_err : 1, //[30] 76 fcs_err : 1; //[31] 77 uint32_t flow_idx_timeout : 1, //[0] 78 flow_idx_invalid : 1, //[1] 79 wifi_parser_error : 1, //[2] 80 amsdu_parser_error : 1, //[3] 81 sa_idx_timeout : 1, //[4] 82 da_idx_timeout : 1, //[5] 83 msdu_limit_error : 1, //[6] 84 da_is_valid : 1, //[7] 85 da_is_mcbc : 1, //[8] 86 sa_is_valid : 1, //[9] 87 decrypt_status_code : 3, //[12:10] 88 rx_bitmap_not_updated : 1, //[13] 89 reserved_2 : 17, //[30:14] 90 msdu_done : 1; //[31] 91 }; 92 93 /* 94 95 rxpcu_mpdu_filter_in_category 96 97 Field indicates what the reason was that this MPDU frame 98 was allowed to come into the receive path by RXPCU 99 100 <enum 0 rxpcu_filter_pass> This MPDU passed the normal 101 frame filter programming of rxpcu 102 103 <enum 1 rxpcu_monitor_client> This MPDU did NOT pass the 104 regular frame filter and would have been dropped, were it 105 not for the frame fitting into the 'monitor_client' 106 category. 107 108 <enum 2 rxpcu_monitor_other> This MPDU did NOT pass the 109 regular frame filter and also did not pass the 110 rxpcu_monitor_client filter. It would have been dropped 111 accept that it did pass the 'monitor_other' category. 112 113 <legal 0-2> 114 115 sw_frame_group_id 116 117 SW processes frames based on certain classifications. 118 This field indicates to what sw classification this MPDU is 119 mapped. 120 121 The classification is given in priority order 122 123 124 125 <enum 0 sw_frame_group_NDP_frame> 126 127 128 129 <enum 1 sw_frame_group_Multicast_data> 130 131 <enum 2 sw_frame_group_Unicast_data> 132 133 <enum 3 sw_frame_group_Null_data > This includes mpdus 134 of type Data Null as well as QoS Data Null 135 136 137 138 <enum 4 sw_frame_group_mgmt_0000 > 139 140 <enum 5 sw_frame_group_mgmt_0001 > 141 142 <enum 6 sw_frame_group_mgmt_0010 > 143 144 <enum 7 sw_frame_group_mgmt_0011 > 145 146 <enum 8 sw_frame_group_mgmt_0100 > 147 148 <enum 9 sw_frame_group_mgmt_0101 > 149 150 <enum 10 sw_frame_group_mgmt_0110 > 151 152 <enum 11 sw_frame_group_mgmt_0111 > 153 154 <enum 12 sw_frame_group_mgmt_1000 > 155 156 <enum 13 sw_frame_group_mgmt_1001 > 157 158 <enum 14 sw_frame_group_mgmt_1010 > 159 160 <enum 15 sw_frame_group_mgmt_1011 > 161 162 <enum 16 sw_frame_group_mgmt_1100 > 163 164 <enum 17 sw_frame_group_mgmt_1101 > 165 166 <enum 18 sw_frame_group_mgmt_1110 > 167 168 <enum 19 sw_frame_group_mgmt_1111 > 169 170 171 172 <enum 20 sw_frame_group_ctrl_0000 > 173 174 <enum 21 sw_frame_group_ctrl_0001 > 175 176 <enum 22 sw_frame_group_ctrl_0010 > 177 178 <enum 23 sw_frame_group_ctrl_0011 > 179 180 <enum 24 sw_frame_group_ctrl_0100 > 181 182 <enum 25 sw_frame_group_ctrl_0101 > 183 184 <enum 26 sw_frame_group_ctrl_0110 > 185 186 <enum 27 sw_frame_group_ctrl_0111 > 187 188 <enum 28 sw_frame_group_ctrl_1000 > 189 190 <enum 29 sw_frame_group_ctrl_1001 > 191 192 <enum 30 sw_frame_group_ctrl_1010 > 193 194 <enum 31 sw_frame_group_ctrl_1011 > 195 196 <enum 32 sw_frame_group_ctrl_1100 > 197 198 <enum 33 sw_frame_group_ctrl_1101 > 199 200 <enum 34 sw_frame_group_ctrl_1110 > 201 202 <enum 35 sw_frame_group_ctrl_1111 > 203 204 205 206 <enum 36 sw_frame_group_unsupported> This covers type 3 207 and protocol version != 0 208 209 210 211 212 213 214 <legal 0-37> 215 216 reserved_0 217 218 <legal 0> 219 220 phy_ppdu_id 221 222 A ppdu counter value that PHY increments for every PPDU 223 received. The counter value wraps around 224 225 <legal all> 226 227 first_mpdu 228 229 Indicates the first MSDU of the PPDU. If both 230 first_mpdu and last_mpdu are set in the MSDU then this is a 231 not an A-MPDU frame but a stand alone MPDU. Interior MPDU 232 in an A-MPDU shall have both first_mpdu and last_mpdu bits 233 set to 0. The PPDU start status will only be valid when 234 this bit is set. 235 236 reserved_1a 237 238 <legal 0> 239 240 mcast_bcast 241 242 Multicast / broadcast indicator. Only set when the MAC 243 address 1 bit 0 is set indicating mcast/bcast and the BSSID 244 matches one of the 4 BSSID registers. Only set when 245 first_msdu is set. 246 247 ast_index_not_found 248 249 Only valid when first_msdu is set. 250 251 252 253 Indicates no AST matching entries within the the max 254 search count. 255 256 ast_index_timeout 257 258 Only valid when first_msdu is set. 259 260 261 262 Indicates an unsuccessful search in the address seach 263 table due to timeout. 264 265 power_mgmt 266 267 Power management bit set in the 802.11 header. Only set 268 when first_msdu is set. 269 270 non_qos 271 272 Set if packet is not a non-QoS data frame. Only set 273 when first_msdu is set. 274 275 null_data 276 277 Set if frame type indicates either null data or QoS null 278 data format. Only set when first_msdu is set. 279 280 mgmt_type 281 282 Set if packet is a management packet. Only set when 283 first_msdu is set. 284 285 ctrl_type 286 287 Set if packet is a control packet. Only set when 288 first_msdu is set. 289 290 more_data 291 292 Set if more bit in frame control is set. Only set when 293 first_msdu is set. 294 295 eosp 296 297 Set if the EOSP (end of service period) bit in the QoS 298 control field is set. Only set when first_msdu is set. 299 300 a_msdu_error 301 302 Set if number of MSDUs in A-MSDU is above a threshold or 303 if the size of the MSDU is invalid. This receive buffer 304 will contain all of the remainder of the MSDUs in this MPDU 305 without decapsulation. 306 307 fragment_flag 308 309 Indicates that this is an 802.11 fragment frame. This 310 is set when either the more_frag bit is set in the frame 311 control or the fragment number is not zero. Only set when 312 first_msdu is set. 313 314 order 315 316 Set if the order bit in the frame control is set. Only 317 set when first_msdu is set. 318 319 cce_match 320 321 Indicates that this status has a corresponding MSDU that 322 requires FW processing. The OLE will have classification 323 ring mask registers which will indicate the ring(s) for 324 packets and descriptors which need FW attention. 325 326 overflow_err 327 328 RXPCU Receive FIFO ran out of space to receive the full 329 MPDU. Therefor this MPDU is terminated early and is thus 330 corrupted. 331 332 333 334 This MPDU will not be ACKed. 335 336 RXPCU might still be able to correctly receive the 337 following MPDUs in the PPDU if enough fifo space became 338 available in time 339 340 msdu_length_err 341 342 Indicates that the MSDU length from the 802.3 343 encapsulated length field extends beyond the MPDU boundary 344 or if the length is less than 14 bytes. 345 346 Merged with original other_msdu_err: Indicates that the 347 MSDU threshold was exceeded and thus all the rest of the 348 MSDUs will not be scattered and will not be decasulated but 349 will be DMA'ed in RAW format as a single MSDU buffer 350 351 tcp_udp_chksum_fail 352 353 Indicates that the computed checksum (tcp_udp_chksum) 354 did not match the checksum in the TCP/UDP header. 355 356 ip_chksum_fail 357 358 Indicates that the computed checksum did not match the 359 checksum in the IP header. 360 361 sa_idx_invalid 362 363 Indicates no matching entry was found in the address 364 search table for the source MAC address. 365 366 da_idx_invalid 367 368 Indicates no matching entry was found in the address 369 search table for the destination MAC address. 370 371 reserved_1b 372 373 374 rx_in_tx_decrypt_byp 375 376 Indicates that RX packet is not decrypted as Crypto is 377 busy with TX packet processing. 378 379 encrypt_required 380 381 Indicates that this data type frame is not encrypted 382 even if the policy for this MPDU requires encryption as 383 indicated in the peer entry key type. 384 385 directed 386 387 MPDU is a directed packet which means that the RA 388 matched our STA addresses. In proxySTA it means that the TA 389 matched an entry in our address search table with the 390 corresponding no_ack bit is the address search entry 391 cleared. 392 393 buffer_fragment 394 395 Indicates that at least one of the rx buffers has been 396 fragmented. If set the FW should look at the rx_frag_info 397 descriptor described below. 398 399 mpdu_length_err 400 401 Indicates that the MPDU was pre-maturely terminated 402 resulting in a truncated MPDU. Don't trust the MPDU length 403 field. 404 405 tkip_mic_err 406 407 Indicates that the MPDU Michael integrity check failed 408 409 decrypt_err 410 411 Indicates that the MPDU decrypt integrity check failed 412 or CRYPTO received an encrypted frame, but did not get a 413 valid corresponding key id in the peer entry. 414 415 unencrypted_frame_err 416 417 Copied here by RX OLE from the RX_MPDU_END TLV 418 419 fcs_err 420 421 Indicates that the MPDU FCS check failed 422 423 flow_idx_timeout 424 425 Indicates an unsuccessful flow search due to the 426 expiring of the search timer. 427 428 <legal all> 429 430 flow_idx_invalid 431 432 flow id is not valid 433 434 <legal all> 435 436 wifi_parser_error 437 438 Indicates that the WiFi frame has one of the following 439 errors 440 441 o has less than minimum allowed bytes as per standard 442 443 o has incomplete VLAN LLC/SNAP (only for non A-MSDUs) 444 445 <legal all> 446 447 amsdu_parser_error 448 449 A-MSDU could not be properly de-agregated. 450 451 <legal all> 452 453 sa_idx_timeout 454 455 Indicates an unsuccessful MAC source address search due 456 to the expiring of the search timer. 457 458 da_idx_timeout 459 460 Indicates an unsuccessful MAC destination address search 461 due to the expiring of the search timer. 462 463 msdu_limit_error 464 465 Indicates that the MSDU threshold was exceeded and thus 466 all the rest of the MSDUs will not be scattered and will not 467 be decasulated but will be DMA'ed in RAW format as a single 468 MSDU buffer 469 470 da_is_valid 471 472 Indicates that OLE found a valid DA entry 473 474 da_is_mcbc 475 476 Field Only valid if da_is_valid is set 477 478 479 480 Indicates the DA address was a Multicast of Broadcast 481 address. 482 483 sa_is_valid 484 485 Indicates that OLE found a valid SA entry 486 487 decrypt_status_code 488 489 Field provides insight into the decryption performed 490 491 492 493 <enum 0 decrypt_ok> Frame had protection enabled and 494 decrypted properly 495 496 <enum 1 decrypt_unprotected_frame > Frame is unprotected 497 and hence bypassed 498 499 <enum 2 decrypt_data_err > Frame has protection enabled 500 and could not be properly decrypted due to MIC/ICV mismatch 501 etc. 502 503 <enum 3 decrypt_key_invalid > Frame has protection 504 enabled but the key that was required to decrypt this frame 505 was not valid 506 507 <enum 4 decrypt_peer_entry_invalid > Frame has 508 protection enabled but the key that was required to decrypt 509 this frame was not valid 510 511 <enum 5 decrypt_other > Reserved for other indications 512 513 514 515 <legal 0 - 5> 516 517 rx_bitmap_not_updated 518 519 Frame is received, but RXPCU could not update the 520 receive bitmap due to (temporary) fifo contraints. 521 522 <legal all> 523 524 reserved_2 525 526 <legal 0> 527 528 msdu_done 529 530 If set indicates that the RX packet data, RX header 531 data, RX PPDU start descriptor, RX MPDU start/end 532 descriptor, RX MSDU start/end descriptors and RX Attention 533 descriptor are all valid. This bit must be in the last 534 octet of the descriptor. 535 */ 536 537 538 /* Description RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY 539 540 Field indicates what the reason was that this MPDU frame 541 was allowed to come into the receive path by RXPCU 542 543 <enum 0 rxpcu_filter_pass> This MPDU passed the normal 544 frame filter programming of rxpcu 545 546 <enum 1 rxpcu_monitor_client> This MPDU did NOT pass the 547 regular frame filter and would have been dropped, were it 548 not for the frame fitting into the 'monitor_client' 549 category. 550 551 <enum 2 rxpcu_monitor_other> This MPDU did NOT pass the 552 regular frame filter and also did not pass the 553 rxpcu_monitor_client filter. It would have been dropped 554 accept that it did pass the 'monitor_other' category. 555 556 <legal 0-2> 557 */ 558 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x00000000 559 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0 560 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x00000003 561 562 /* Description RX_ATTENTION_0_SW_FRAME_GROUP_ID 563 564 SW processes frames based on certain classifications. 565 This field indicates to what sw classification this MPDU is 566 mapped. 567 568 The classification is given in priority order 569 570 571 572 <enum 0 sw_frame_group_NDP_frame> 573 574 575 576 <enum 1 sw_frame_group_Multicast_data> 577 578 <enum 2 sw_frame_group_Unicast_data> 579 580 <enum 3 sw_frame_group_Null_data > This includes mpdus 581 of type Data Null as well as QoS Data Null 582 583 584 585 <enum 4 sw_frame_group_mgmt_0000 > 586 587 <enum 5 sw_frame_group_mgmt_0001 > 588 589 <enum 6 sw_frame_group_mgmt_0010 > 590 591 <enum 7 sw_frame_group_mgmt_0011 > 592 593 <enum 8 sw_frame_group_mgmt_0100 > 594 595 <enum 9 sw_frame_group_mgmt_0101 > 596 597 <enum 10 sw_frame_group_mgmt_0110 > 598 599 <enum 11 sw_frame_group_mgmt_0111 > 600 601 <enum 12 sw_frame_group_mgmt_1000 > 602 603 <enum 13 sw_frame_group_mgmt_1001 > 604 605 <enum 14 sw_frame_group_mgmt_1010 > 606 607 <enum 15 sw_frame_group_mgmt_1011 > 608 609 <enum 16 sw_frame_group_mgmt_1100 > 610 611 <enum 17 sw_frame_group_mgmt_1101 > 612 613 <enum 18 sw_frame_group_mgmt_1110 > 614 615 <enum 19 sw_frame_group_mgmt_1111 > 616 617 618 619 <enum 20 sw_frame_group_ctrl_0000 > 620 621 <enum 21 sw_frame_group_ctrl_0001 > 622 623 <enum 22 sw_frame_group_ctrl_0010 > 624 625 <enum 23 sw_frame_group_ctrl_0011 > 626 627 <enum 24 sw_frame_group_ctrl_0100 > 628 629 <enum 25 sw_frame_group_ctrl_0101 > 630 631 <enum 26 sw_frame_group_ctrl_0110 > 632 633 <enum 27 sw_frame_group_ctrl_0111 > 634 635 <enum 28 sw_frame_group_ctrl_1000 > 636 637 <enum 29 sw_frame_group_ctrl_1001 > 638 639 <enum 30 sw_frame_group_ctrl_1010 > 640 641 <enum 31 sw_frame_group_ctrl_1011 > 642 643 <enum 32 sw_frame_group_ctrl_1100 > 644 645 <enum 33 sw_frame_group_ctrl_1101 > 646 647 <enum 34 sw_frame_group_ctrl_1110 > 648 649 <enum 35 sw_frame_group_ctrl_1111 > 650 651 652 653 <enum 36 sw_frame_group_unsupported> This covers type 3 654 and protocol version != 0 655 656 657 658 659 660 661 <legal 0-37> 662 */ 663 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_OFFSET 0x00000000 664 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_LSB 2 665 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_MASK 0x000001fc 666 667 /* Description RX_ATTENTION_0_RESERVED_0 668 669 <legal 0> 670 */ 671 #define RX_ATTENTION_0_RESERVED_0_OFFSET 0x00000000 672 #define RX_ATTENTION_0_RESERVED_0_LSB 9 673 #define RX_ATTENTION_0_RESERVED_0_MASK 0x0000fe00 674 675 /* Description RX_ATTENTION_0_PHY_PPDU_ID 676 677 A ppdu counter value that PHY increments for every PPDU 678 received. The counter value wraps around 679 680 <legal all> 681 */ 682 #define RX_ATTENTION_0_PHY_PPDU_ID_OFFSET 0x00000000 683 #define RX_ATTENTION_0_PHY_PPDU_ID_LSB 16 684 #define RX_ATTENTION_0_PHY_PPDU_ID_MASK 0xffff0000 685 686 /* Description RX_ATTENTION_1_FIRST_MPDU 687 688 Indicates the first MSDU of the PPDU. If both 689 first_mpdu and last_mpdu are set in the MSDU then this is a 690 not an A-MPDU frame but a stand alone MPDU. Interior MPDU 691 in an A-MPDU shall have both first_mpdu and last_mpdu bits 692 set to 0. The PPDU start status will only be valid when 693 this bit is set. 694 */ 695 #define RX_ATTENTION_1_FIRST_MPDU_OFFSET 0x00000004 696 #define RX_ATTENTION_1_FIRST_MPDU_LSB 0 697 #define RX_ATTENTION_1_FIRST_MPDU_MASK 0x00000001 698 699 /* Description RX_ATTENTION_1_RESERVED_1A 700 701 <legal 0> 702 */ 703 #define RX_ATTENTION_1_RESERVED_1A_OFFSET 0x00000004 704 #define RX_ATTENTION_1_RESERVED_1A_LSB 1 705 #define RX_ATTENTION_1_RESERVED_1A_MASK 0x00000002 706 707 /* Description RX_ATTENTION_1_MCAST_BCAST 708 709 Multicast / broadcast indicator. Only set when the MAC 710 address 1 bit 0 is set indicating mcast/bcast and the BSSID 711 matches one of the 4 BSSID registers. Only set when 712 first_msdu is set. 713 */ 714 #define RX_ATTENTION_1_MCAST_BCAST_OFFSET 0x00000004 715 #define RX_ATTENTION_1_MCAST_BCAST_LSB 2 716 #define RX_ATTENTION_1_MCAST_BCAST_MASK 0x00000004 717 718 /* Description RX_ATTENTION_1_AST_INDEX_NOT_FOUND 719 720 Only valid when first_msdu is set. 721 722 723 724 Indicates no AST matching entries within the the max 725 search count. 726 */ 727 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_OFFSET 0x00000004 728 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_LSB 3 729 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_MASK 0x00000008 730 731 /* Description RX_ATTENTION_1_AST_INDEX_TIMEOUT 732 733 Only valid when first_msdu is set. 734 735 736 737 Indicates an unsuccessful search in the address seach 738 table due to timeout. 739 */ 740 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_OFFSET 0x00000004 741 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_LSB 4 742 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_MASK 0x00000010 743 744 /* Description RX_ATTENTION_1_POWER_MGMT 745 746 Power management bit set in the 802.11 header. Only set 747 when first_msdu is set. 748 */ 749 #define RX_ATTENTION_1_POWER_MGMT_OFFSET 0x00000004 750 #define RX_ATTENTION_1_POWER_MGMT_LSB 5 751 #define RX_ATTENTION_1_POWER_MGMT_MASK 0x00000020 752 753 /* Description RX_ATTENTION_1_NON_QOS 754 755 Set if packet is not a non-QoS data frame. Only set 756 when first_msdu is set. 757 */ 758 #define RX_ATTENTION_1_NON_QOS_OFFSET 0x00000004 759 #define RX_ATTENTION_1_NON_QOS_LSB 6 760 #define RX_ATTENTION_1_NON_QOS_MASK 0x00000040 761 762 /* Description RX_ATTENTION_1_NULL_DATA 763 764 Set if frame type indicates either null data or QoS null 765 data format. Only set when first_msdu is set. 766 */ 767 #define RX_ATTENTION_1_NULL_DATA_OFFSET 0x00000004 768 #define RX_ATTENTION_1_NULL_DATA_LSB 7 769 #define RX_ATTENTION_1_NULL_DATA_MASK 0x00000080 770 771 /* Description RX_ATTENTION_1_MGMT_TYPE 772 773 Set if packet is a management packet. Only set when 774 first_msdu is set. 775 */ 776 #define RX_ATTENTION_1_MGMT_TYPE_OFFSET 0x00000004 777 #define RX_ATTENTION_1_MGMT_TYPE_LSB 8 778 #define RX_ATTENTION_1_MGMT_TYPE_MASK 0x00000100 779 780 /* Description RX_ATTENTION_1_CTRL_TYPE 781 782 Set if packet is a control packet. Only set when 783 first_msdu is set. 784 */ 785 #define RX_ATTENTION_1_CTRL_TYPE_OFFSET 0x00000004 786 #define RX_ATTENTION_1_CTRL_TYPE_LSB 9 787 #define RX_ATTENTION_1_CTRL_TYPE_MASK 0x00000200 788 789 /* Description RX_ATTENTION_1_MORE_DATA 790 791 Set if more bit in frame control is set. Only set when 792 first_msdu is set. 793 */ 794 #define RX_ATTENTION_1_MORE_DATA_OFFSET 0x00000004 795 #define RX_ATTENTION_1_MORE_DATA_LSB 10 796 #define RX_ATTENTION_1_MORE_DATA_MASK 0x00000400 797 798 /* Description RX_ATTENTION_1_EOSP 799 800 Set if the EOSP (end of service period) bit in the QoS 801 control field is set. Only set when first_msdu is set. 802 */ 803 #define RX_ATTENTION_1_EOSP_OFFSET 0x00000004 804 #define RX_ATTENTION_1_EOSP_LSB 11 805 #define RX_ATTENTION_1_EOSP_MASK 0x00000800 806 807 /* Description RX_ATTENTION_1_A_MSDU_ERROR 808 809 Set if number of MSDUs in A-MSDU is above a threshold or 810 if the size of the MSDU is invalid. This receive buffer 811 will contain all of the remainder of the MSDUs in this MPDU 812 without decapsulation. 813 */ 814 #define RX_ATTENTION_1_A_MSDU_ERROR_OFFSET 0x00000004 815 #define RX_ATTENTION_1_A_MSDU_ERROR_LSB 12 816 #define RX_ATTENTION_1_A_MSDU_ERROR_MASK 0x00001000 817 818 /* Description RX_ATTENTION_1_FRAGMENT_FLAG 819 820 Indicates that this is an 802.11 fragment frame. This 821 is set when either the more_frag bit is set in the frame 822 control or the fragment number is not zero. Only set when 823 first_msdu is set. 824 */ 825 #define RX_ATTENTION_1_FRAGMENT_FLAG_OFFSET 0x00000004 826 #define RX_ATTENTION_1_FRAGMENT_FLAG_LSB 13 827 #define RX_ATTENTION_1_FRAGMENT_FLAG_MASK 0x00002000 828 829 /* Description RX_ATTENTION_1_ORDER 830 831 Set if the order bit in the frame control is set. Only 832 set when first_msdu is set. 833 */ 834 #define RX_ATTENTION_1_ORDER_OFFSET 0x00000004 835 #define RX_ATTENTION_1_ORDER_LSB 14 836 #define RX_ATTENTION_1_ORDER_MASK 0x00004000 837 838 /* Description RX_ATTENTION_1_CCE_MATCH 839 840 Indicates that this status has a corresponding MSDU that 841 requires FW processing. The OLE will have classification 842 ring mask registers which will indicate the ring(s) for 843 packets and descriptors which need FW attention. 844 */ 845 #define RX_ATTENTION_1_CCE_MATCH_OFFSET 0x00000004 846 #define RX_ATTENTION_1_CCE_MATCH_LSB 15 847 #define RX_ATTENTION_1_CCE_MATCH_MASK 0x00008000 848 849 /* Description RX_ATTENTION_1_OVERFLOW_ERR 850 851 RXPCU Receive FIFO ran out of space to receive the full 852 MPDU. Therefor this MPDU is terminated early and is thus 853 corrupted. 854 855 856 857 This MPDU will not be ACKed. 858 859 RXPCU might still be able to correctly receive the 860 following MPDUs in the PPDU if enough fifo space became 861 available in time 862 */ 863 #define RX_ATTENTION_1_OVERFLOW_ERR_OFFSET 0x00000004 864 #define RX_ATTENTION_1_OVERFLOW_ERR_LSB 16 865 #define RX_ATTENTION_1_OVERFLOW_ERR_MASK 0x00010000 866 867 /* Description RX_ATTENTION_1_MSDU_LENGTH_ERR 868 869 Indicates that the MSDU length from the 802.3 870 encapsulated length field extends beyond the MPDU boundary 871 or if the length is less than 14 bytes. 872 873 Merged with original other_msdu_err: Indicates that the 874 MSDU threshold was exceeded and thus all the rest of the 875 MSDUs will not be scattered and will not be decasulated but 876 will be DMA'ed in RAW format as a single MSDU buffer 877 */ 878 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_OFFSET 0x00000004 879 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_LSB 17 880 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_MASK 0x00020000 881 882 /* Description RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL 883 884 Indicates that the computed checksum (tcp_udp_chksum) 885 did not match the checksum in the TCP/UDP header. 886 */ 887 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000004 888 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_LSB 18 889 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_MASK 0x00040000 890 891 /* Description RX_ATTENTION_1_IP_CHKSUM_FAIL 892 893 Indicates that the computed checksum did not match the 894 checksum in the IP header. 895 */ 896 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_OFFSET 0x00000004 897 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_LSB 19 898 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_MASK 0x00080000 899 900 /* Description RX_ATTENTION_1_SA_IDX_INVALID 901 902 Indicates no matching entry was found in the address 903 search table for the source MAC address. 904 */ 905 #define RX_ATTENTION_1_SA_IDX_INVALID_OFFSET 0x00000004 906 #define RX_ATTENTION_1_SA_IDX_INVALID_LSB 20 907 #define RX_ATTENTION_1_SA_IDX_INVALID_MASK 0x00100000 908 909 /* Description RX_ATTENTION_1_DA_IDX_INVALID 910 911 Indicates no matching entry was found in the address 912 search table for the destination MAC address. 913 */ 914 #define RX_ATTENTION_1_DA_IDX_INVALID_OFFSET 0x00000004 915 #define RX_ATTENTION_1_DA_IDX_INVALID_LSB 21 916 #define RX_ATTENTION_1_DA_IDX_INVALID_MASK 0x00200000 917 918 /* Description RX_ATTENTION_1_RESERVED_1B 919 920 */ 921 #define RX_ATTENTION_1_RESERVED_1B_OFFSET 0x00000004 922 #define RX_ATTENTION_1_RESERVED_1B_LSB 22 923 #define RX_ATTENTION_1_RESERVED_1B_MASK 0x00400000 924 925 /* Description RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP 926 927 Indicates that RX packet is not decrypted as Crypto is 928 busy with TX packet processing. 929 */ 930 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_OFFSET 0x00000004 931 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_LSB 23 932 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_MASK 0x00800000 933 934 /* Description RX_ATTENTION_1_ENCRYPT_REQUIRED 935 936 Indicates that this data type frame is not encrypted 937 even if the policy for this MPDU requires encryption as 938 indicated in the peer entry key type. 939 */ 940 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_OFFSET 0x00000004 941 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_LSB 24 942 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_MASK 0x01000000 943 944 /* Description RX_ATTENTION_1_DIRECTED 945 946 MPDU is a directed packet which means that the RA 947 matched our STA addresses. In proxySTA it means that the TA 948 matched an entry in our address search table with the 949 corresponding no_ack bit is the address search entry 950 cleared. 951 */ 952 #define RX_ATTENTION_1_DIRECTED_OFFSET 0x00000004 953 #define RX_ATTENTION_1_DIRECTED_LSB 25 954 #define RX_ATTENTION_1_DIRECTED_MASK 0x02000000 955 956 /* Description RX_ATTENTION_1_BUFFER_FRAGMENT 957 958 Indicates that at least one of the rx buffers has been 959 fragmented. If set the FW should look at the rx_frag_info 960 descriptor described below. 961 */ 962 #define RX_ATTENTION_1_BUFFER_FRAGMENT_OFFSET 0x00000004 963 #define RX_ATTENTION_1_BUFFER_FRAGMENT_LSB 26 964 #define RX_ATTENTION_1_BUFFER_FRAGMENT_MASK 0x04000000 965 966 /* Description RX_ATTENTION_1_MPDU_LENGTH_ERR 967 968 Indicates that the MPDU was pre-maturely terminated 969 resulting in a truncated MPDU. Don't trust the MPDU length 970 field. 971 */ 972 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_OFFSET 0x00000004 973 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_LSB 27 974 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_MASK 0x08000000 975 976 /* Description RX_ATTENTION_1_TKIP_MIC_ERR 977 978 Indicates that the MPDU Michael integrity check failed 979 */ 980 #define RX_ATTENTION_1_TKIP_MIC_ERR_OFFSET 0x00000004 981 #define RX_ATTENTION_1_TKIP_MIC_ERR_LSB 28 982 #define RX_ATTENTION_1_TKIP_MIC_ERR_MASK 0x10000000 983 984 /* Description RX_ATTENTION_1_DECRYPT_ERR 985 986 Indicates that the MPDU decrypt integrity check failed 987 or CRYPTO received an encrypted frame, but did not get a 988 valid corresponding key id in the peer entry. 989 */ 990 #define RX_ATTENTION_1_DECRYPT_ERR_OFFSET 0x00000004 991 #define RX_ATTENTION_1_DECRYPT_ERR_LSB 29 992 #define RX_ATTENTION_1_DECRYPT_ERR_MASK 0x20000000 993 994 /* Description RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR 995 996 Copied here by RX OLE from the RX_MPDU_END TLV 997 */ 998 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_OFFSET 0x00000004 999 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_LSB 30 1000 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_MASK 0x40000000 1001 1002 /* Description RX_ATTENTION_1_FCS_ERR 1003 1004 Indicates that the MPDU FCS check failed 1005 */ 1006 #define RX_ATTENTION_1_FCS_ERR_OFFSET 0x00000004 1007 #define RX_ATTENTION_1_FCS_ERR_LSB 31 1008 #define RX_ATTENTION_1_FCS_ERR_MASK 0x80000000 1009 1010 /* Description RX_ATTENTION_2_FLOW_IDX_TIMEOUT 1011 1012 Indicates an unsuccessful flow search due to the 1013 expiring of the search timer. 1014 1015 <legal all> 1016 */ 1017 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_OFFSET 0x00000008 1018 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_LSB 0 1019 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_MASK 0x00000001 1020 1021 /* Description RX_ATTENTION_2_FLOW_IDX_INVALID 1022 1023 flow id is not valid 1024 1025 <legal all> 1026 */ 1027 #define RX_ATTENTION_2_FLOW_IDX_INVALID_OFFSET 0x00000008 1028 #define RX_ATTENTION_2_FLOW_IDX_INVALID_LSB 1 1029 #define RX_ATTENTION_2_FLOW_IDX_INVALID_MASK 0x00000002 1030 1031 /* Description RX_ATTENTION_2_WIFI_PARSER_ERROR 1032 1033 Indicates that the WiFi frame has one of the following 1034 errors 1035 1036 o has less than minimum allowed bytes as per standard 1037 1038 o has incomplete VLAN LLC/SNAP (only for non A-MSDUs) 1039 1040 <legal all> 1041 */ 1042 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_OFFSET 0x00000008 1043 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_LSB 2 1044 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_MASK 0x00000004 1045 1046 /* Description RX_ATTENTION_2_AMSDU_PARSER_ERROR 1047 1048 A-MSDU could not be properly de-agregated. 1049 1050 <legal all> 1051 */ 1052 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_OFFSET 0x00000008 1053 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_LSB 3 1054 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_MASK 0x00000008 1055 1056 /* Description RX_ATTENTION_2_SA_IDX_TIMEOUT 1057 1058 Indicates an unsuccessful MAC source address search due 1059 to the expiring of the search timer. 1060 */ 1061 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_OFFSET 0x00000008 1062 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_LSB 4 1063 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_MASK 0x00000010 1064 1065 /* Description RX_ATTENTION_2_DA_IDX_TIMEOUT 1066 1067 Indicates an unsuccessful MAC destination address search 1068 due to the expiring of the search timer. 1069 */ 1070 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_OFFSET 0x00000008 1071 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_LSB 5 1072 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_MASK 0x00000020 1073 1074 /* Description RX_ATTENTION_2_MSDU_LIMIT_ERROR 1075 1076 Indicates that the MSDU threshold was exceeded and thus 1077 all the rest of the MSDUs will not be scattered and will not 1078 be decasulated but will be DMA'ed in RAW format as a single 1079 MSDU buffer 1080 */ 1081 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_OFFSET 0x00000008 1082 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_LSB 6 1083 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_MASK 0x00000040 1084 1085 /* Description RX_ATTENTION_2_DA_IS_VALID 1086 1087 Indicates that OLE found a valid DA entry 1088 */ 1089 #define RX_ATTENTION_2_DA_IS_VALID_OFFSET 0x00000008 1090 #define RX_ATTENTION_2_DA_IS_VALID_LSB 7 1091 #define RX_ATTENTION_2_DA_IS_VALID_MASK 0x00000080 1092 1093 /* Description RX_ATTENTION_2_DA_IS_MCBC 1094 1095 Field Only valid if da_is_valid is set 1096 1097 1098 1099 Indicates the DA address was a Multicast of Broadcast 1100 address. 1101 */ 1102 #define RX_ATTENTION_2_DA_IS_MCBC_OFFSET 0x00000008 1103 #define RX_ATTENTION_2_DA_IS_MCBC_LSB 8 1104 #define RX_ATTENTION_2_DA_IS_MCBC_MASK 0x00000100 1105 1106 /* Description RX_ATTENTION_2_SA_IS_VALID 1107 1108 Indicates that OLE found a valid SA entry 1109 */ 1110 #define RX_ATTENTION_2_SA_IS_VALID_OFFSET 0x00000008 1111 #define RX_ATTENTION_2_SA_IS_VALID_LSB 9 1112 #define RX_ATTENTION_2_SA_IS_VALID_MASK 0x00000200 1113 1114 /* Description RX_ATTENTION_2_DECRYPT_STATUS_CODE 1115 1116 Field provides insight into the decryption performed 1117 1118 1119 1120 <enum 0 decrypt_ok> Frame had protection enabled and 1121 decrypted properly 1122 1123 <enum 1 decrypt_unprotected_frame > Frame is unprotected 1124 and hence bypassed 1125 1126 <enum 2 decrypt_data_err > Frame has protection enabled 1127 and could not be properly decrypted due to MIC/ICV mismatch 1128 etc. 1129 1130 <enum 3 decrypt_key_invalid > Frame has protection 1131 enabled but the key that was required to decrypt this frame 1132 was not valid 1133 1134 <enum 4 decrypt_peer_entry_invalid > Frame has 1135 protection enabled but the key that was required to decrypt 1136 this frame was not valid 1137 1138 <enum 5 decrypt_other > Reserved for other indications 1139 1140 1141 1142 <legal 0 - 5> 1143 */ 1144 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_OFFSET 0x00000008 1145 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_LSB 10 1146 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_MASK 0x00001c00 1147 1148 /* Description RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED 1149 1150 Frame is received, but RXPCU could not update the 1151 receive bitmap due to (temporary) fifo contraints. 1152 1153 <legal all> 1154 */ 1155 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_OFFSET 0x00000008 1156 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_LSB 13 1157 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_MASK 0x00002000 1158 1159 /* Description RX_ATTENTION_2_RESERVED_2 1160 1161 <legal 0> 1162 */ 1163 #define RX_ATTENTION_2_RESERVED_2_OFFSET 0x00000008 1164 #define RX_ATTENTION_2_RESERVED_2_LSB 14 1165 #define RX_ATTENTION_2_RESERVED_2_MASK 0x7fffc000 1166 1167 /* Description RX_ATTENTION_2_MSDU_DONE 1168 1169 If set indicates that the RX packet data, RX header 1170 data, RX PPDU start descriptor, RX MPDU start/end 1171 descriptor, RX MSDU start/end descriptors and RX Attention 1172 descriptor are all valid. This bit must be in the last 1173 octet of the descriptor. 1174 */ 1175 #define RX_ATTENTION_2_MSDU_DONE_OFFSET 0x00000008 1176 #define RX_ATTENTION_2_MSDU_DONE_LSB 31 1177 #define RX_ATTENTION_2_MSDU_DONE_MASK 0x80000000 1178 1179 1180 #endif // _RX_ATTENTION_H_ 1181