xref: /wlan-driver/fw-api/hw/qca9574/rx_flow_search_entry.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2021 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 // $ATH_LICENSE_HW_HDR_C$
18 //
19 // DO NOT EDIT!  This file is automatically generated
20 //               These definitions are tied to a particular hardware layout
21 
22 
23 #ifndef _RX_FLOW_SEARCH_ENTRY_H_
24 #define _RX_FLOW_SEARCH_ENTRY_H_
25 #if !defined(__ASSEMBLER__)
26 #endif
27 
28 
29 // ################ START SUMMARY #################
30 //
31 //	Dword	Fields
32 //	0	src_ip_127_96[31:0]
33 //	1	src_ip_95_64[31:0]
34 //	2	src_ip_63_32[31:0]
35 //	3	src_ip_31_0[31:0]
36 //	4	dest_ip_127_96[31:0]
37 //	5	dest_ip_95_64[31:0]
38 //	6	dest_ip_63_32[31:0]
39 //	7	dest_ip_31_0[31:0]
40 //	8	src_port[15:0], dest_port[31:16]
41 //	9	l4_protocol[7:0], valid[8], reserved_9[29:9], reo_destination_handler[31:30]
42 //	10	metadata[31:0]
43 //	11	reo_destination_indication[4:0], msdu_drop[5], reserved_11[7:6], msdu_count[31:8]
44 //	12	msdu_byte_count[31:0]
45 //	13	timestamp[31:0]
46 //
47 // ################ END SUMMARY #################
48 
49 #define NUM_OF_DWORDS_RX_FLOW_SEARCH_ENTRY 14
50 
51 struct rx_flow_search_entry {
52              uint32_t src_ip_127_96                   : 32; //[31:0]
53              uint32_t src_ip_95_64                    : 32; //[31:0]
54              uint32_t src_ip_63_32                    : 32; //[31:0]
55              uint32_t src_ip_31_0                     : 32; //[31:0]
56              uint32_t dest_ip_127_96                  : 32; //[31:0]
57              uint32_t dest_ip_95_64                   : 32; //[31:0]
58              uint32_t dest_ip_63_32                   : 32; //[31:0]
59              uint32_t dest_ip_31_0                    : 32; //[31:0]
60              uint32_t src_port                        : 16, //[15:0]
61                       dest_port                       : 16; //[31:16]
62              uint32_t l4_protocol                     :  8, //[7:0]
63                       valid                           :  1, //[8]
64                       reserved_9                      : 21, //[29:9]
65                       reo_destination_handler         :  2; //[31:30]
66              uint32_t metadata                        : 32; //[31:0]
67              uint32_t reo_destination_indication      :  5, //[4:0]
68                       msdu_drop                       :  1, //[5]
69                       reserved_11                     :  2, //[7:6]
70                       msdu_count                      : 24; //[31:8]
71              uint32_t msdu_byte_count                 : 32; //[31:0]
72              uint32_t timestamp                       : 32; //[31:0]
73 };
74 
75 /*
76 
77 src_ip_127_96
78 
79 			Uppermost 32 bits of source IPv6 address or prefix as
80 			per Common Parser register field IP_DA_SA_PREFIX (with the
81 			first byte in the MSB and the last byte in the LSB, i.e.
82 			requiring a byte-swap for little-endian SW w.r.t. the byte
83 			order in an IPv6 packet)
84 
85 			<legal all>
86 
87 src_ip_95_64
88 
89 			Next 32 bits of source IPv6 address or prefix (requiring
90 			a byte-swap for little-endian SW) <legal all>
91 
92 src_ip_63_32
93 
94 			Next 32 bits of source IPv6 address or lowest 32 bits of
95 			prefix (requiring a byte-swap for little-endian SW)
96 
97 			<legal all>
98 
99 src_ip_31_0
100 
101 			Lowest 32 bits of source IPv6 address, or source IPv4
102 			address (requiring a byte-swap for little-endian SW w.r.t.
103 			the byte order in an IPv6 or IPv4 packet)
104 
105 			<legal all>
106 
107 dest_ip_127_96
108 
109 			Uppermost 32 bits of destination IPv6 address or prefix
110 			as per Common Parser register field IP_DA_SA_PREFIX (with
111 			the first byte in the MSB and the last byte in the LSB, i.e.
112 			requiring a byte-swap for little-endian SW w.r.t. the byte
113 			order as in an IPv6 packet)
114 
115 			<legal all>
116 
117 dest_ip_95_64
118 
119 			Next 32 bits of destination IPv6 address or prefix
120 			(requiring a byte-swap for little-endian SW)
121 
122 			<legal all>
123 
124 dest_ip_63_32
125 
126 			Next 32 bits of destination IPv6 address or lowest 32
127 			bits of prefix (requiring a byte-swap for little-endian SW)
128 
129 			<legal all>
130 
131 dest_ip_31_0
132 
133 			Lowest 32 bits of destination IPv6 address, or
134 			destination IPv4 address (requiring a byte-swap for
135 			little-endian SW w.r.t. the byte order in an IPv6 or IPv4
136 			packet)
137 
138 			<legal all>
139 
140 src_port
141 
142 			LSB of SPI in case of ESP/AH
143 
144 			else source port in case of TCP/UDP without IPsec,
145 
146 			else zeros in case of ICMP (with the first/third byte in
147 			the MSB and the second/fourth byte in the LSB, i.e.
148 			requiring a byte-swap for little-endian SW w.r.t. the byte
149 			order as in an IPv6 or IPv4 packet)  <legal all>
150 
151 dest_port
152 
153 			MSB of SPI in case of ESP/AH
154 
155 			else destination port in case of TCP/UDP without IPsec,
156 
157 			else zeros in case of ICMP (with the first byte in the
158 			MSB and the second byte in the LSB, i.e. requiring a
159 			byte-swap for little-endian SW w.r.t. the byte order as in
160 			an IPv6 or IPv4 packet)
161 
162 			<legal all>
163 
164 l4_protocol
165 
166 			IPsec or L4 protocol
167 
168 
169 
170 			<enum 1 ICMPV4>
171 
172 			<enum 6 TCP>
173 
174 			<enum 17 UDP>
175 
176 			<enum 50 ESP>
177 
178 			<enum 51 AH>
179 
180 			<enum 58 ICMPV6>
181 
182 			<legal 1, 6, 17, 50, 51, 58>
183 
184 valid
185 
186 			Indicates validity of entry
187 
188 			<legal all>
189 
190 reserved_9
191 
192 			<legal 0>
193 
194 reo_destination_handler
195 
196 			Indicates how to decide the REO destination indication
197 
198 			<enum 0 RXFT_USE_FT> Follow this entry
199 
200 			<enum 1 RXFT_USE_ASPT> Use address search+peer table
201 			entry
202 
203 			<enum 2 RXFT_USE_FT2> Follow this entry
204 
205 			<enum 3 RXFT_USE_CCE> Use CCE super-rule
206 
207 			<legal all>
208 
209 metadata
210 
211 			Value to be passed to SW if this flow search entry
212 			matches
213 
214 			<legal all>
215 
216 reo_destination_indication
217 
218 			The ID of the REO exit ring where the MSDU frame shall
219 			push after (MPDU level) reordering has finished.
220 
221 
222 
223 			<enum 0 reo_destination_tcl> Reo will push the frame
224 			into the REO2TCL ring
225 
226 			<enum 1 reo_destination_sw1> Reo will push the frame
227 			into the REO2SW1 ring
228 
229 			<enum 2 reo_destination_sw2> Reo will push the frame
230 			into the REO2SW1 ring
231 
232 			<enum 3 reo_destination_sw3> Reo will push the frame
233 			into the REO2SW1 ring
234 
235 			<enum 4 reo_destination_sw4> Reo will push the frame
236 			into the REO2SW1 ring
237 
238 			<enum 5 reo_destination_release> Reo will push the frame
239 			into the REO_release ring
240 
241 			<enum 6 reo_destination_fw> Reo will push the frame into
242 			the REO2FW ring
243 
244 			<enum 7 reo_destination_7> REO remaps this
245 
246 			<enum 8 reo_destination_8> REO remaps this <enum 9
247 			reo_destination_9> REO remaps this <enum 10
248 			reo_destination_10> REO remaps this
249 
250 			<enum 11 reo_destination_11> REO remaps this
251 
252 			<enum 12 reo_destination_12> REO remaps this <enum 13
253 			reo_destination_13> REO remaps this
254 
255 			<enum 14 reo_destination_14> REO remaps this
256 
257 			<enum 15 reo_destination_15> REO remaps this
258 
259 			<enum 16 reo_destination_16> REO remaps this
260 
261 			<enum 17 reo_destination_17> REO remaps this
262 
263 			<enum 18 reo_destination_18> REO remaps this
264 
265 			<enum 19 reo_destination_19> REO remaps this
266 
267 			<enum 20 reo_destination_20> REO remaps this
268 
269 			<enum 21 reo_destination_21> REO remaps this
270 
271 			<enum 22 reo_destination_22> REO remaps this
272 
273 			<enum 23 reo_destination_23> REO remaps this
274 
275 			<enum 24 reo_destination_24> REO remaps this
276 
277 			<enum 25 reo_destination_25> REO remaps this
278 
279 			<enum 26 reo_destination_26> REO remaps this
280 
281 			<enum 27 reo_destination_27> REO remaps this
282 
283 			<enum 28 reo_destination_28> REO remaps this
284 
285 			<enum 29 reo_destination_29> REO remaps this
286 
287 			<enum 30 reo_destination_30> REO remaps this
288 
289 			<enum 31 reo_destination_31> REO remaps this
290 
291 
292 
293 			<legal all>
294 
295 msdu_drop
296 
297 			Overriding indication to REO to forward to REO release
298 			ring
299 
300 			<legal all>
301 
302 reserved_11
303 
304 			<legal 0>
305 
306 msdu_count
307 
308 			Number of Rx MSDUs matching this flow
309 
310 			<legal all>
311 
312 msdu_byte_count
313 
314 			Number of bytes in Rx MSDUs matching this flow
315 
316 			<legal all>
317 
318 timestamp
319 
320 			Time of last reception (as measured at Rx OLE) matching
321 			this flow
322 
323 			<legal all>
324 */
325 
326 
327 /* Description		RX_FLOW_SEARCH_ENTRY_0_SRC_IP_127_96
328 
329 			Uppermost 32 bits of source IPv6 address or prefix as
330 			per Common Parser register field IP_DA_SA_PREFIX (with the
331 			first byte in the MSB and the last byte in the LSB, i.e.
332 			requiring a byte-swap for little-endian SW w.r.t. the byte
333 			order in an IPv6 packet)
334 
335 			<legal all>
336 */
337 #define RX_FLOW_SEARCH_ENTRY_0_SRC_IP_127_96_OFFSET                  0x00000000
338 #define RX_FLOW_SEARCH_ENTRY_0_SRC_IP_127_96_LSB                     0
339 #define RX_FLOW_SEARCH_ENTRY_0_SRC_IP_127_96_MASK                    0xffffffff
340 
341 /* Description		RX_FLOW_SEARCH_ENTRY_1_SRC_IP_95_64
342 
343 			Next 32 bits of source IPv6 address or prefix (requiring
344 			a byte-swap for little-endian SW) <legal all>
345 */
346 #define RX_FLOW_SEARCH_ENTRY_1_SRC_IP_95_64_OFFSET                   0x00000004
347 #define RX_FLOW_SEARCH_ENTRY_1_SRC_IP_95_64_LSB                      0
348 #define RX_FLOW_SEARCH_ENTRY_1_SRC_IP_95_64_MASK                     0xffffffff
349 
350 /* Description		RX_FLOW_SEARCH_ENTRY_2_SRC_IP_63_32
351 
352 			Next 32 bits of source IPv6 address or lowest 32 bits of
353 			prefix (requiring a byte-swap for little-endian SW)
354 
355 			<legal all>
356 */
357 #define RX_FLOW_SEARCH_ENTRY_2_SRC_IP_63_32_OFFSET                   0x00000008
358 #define RX_FLOW_SEARCH_ENTRY_2_SRC_IP_63_32_LSB                      0
359 #define RX_FLOW_SEARCH_ENTRY_2_SRC_IP_63_32_MASK                     0xffffffff
360 
361 /* Description		RX_FLOW_SEARCH_ENTRY_3_SRC_IP_31_0
362 
363 			Lowest 32 bits of source IPv6 address, or source IPv4
364 			address (requiring a byte-swap for little-endian SW w.r.t.
365 			the byte order in an IPv6 or IPv4 packet)
366 
367 			<legal all>
368 */
369 #define RX_FLOW_SEARCH_ENTRY_3_SRC_IP_31_0_OFFSET                    0x0000000c
370 #define RX_FLOW_SEARCH_ENTRY_3_SRC_IP_31_0_LSB                       0
371 #define RX_FLOW_SEARCH_ENTRY_3_SRC_IP_31_0_MASK                      0xffffffff
372 
373 /* Description		RX_FLOW_SEARCH_ENTRY_4_DEST_IP_127_96
374 
375 			Uppermost 32 bits of destination IPv6 address or prefix
376 			as per Common Parser register field IP_DA_SA_PREFIX (with
377 			the first byte in the MSB and the last byte in the LSB, i.e.
378 			requiring a byte-swap for little-endian SW w.r.t. the byte
379 			order as in an IPv6 packet)
380 
381 			<legal all>
382 */
383 #define RX_FLOW_SEARCH_ENTRY_4_DEST_IP_127_96_OFFSET                 0x00000010
384 #define RX_FLOW_SEARCH_ENTRY_4_DEST_IP_127_96_LSB                    0
385 #define RX_FLOW_SEARCH_ENTRY_4_DEST_IP_127_96_MASK                   0xffffffff
386 
387 /* Description		RX_FLOW_SEARCH_ENTRY_5_DEST_IP_95_64
388 
389 			Next 32 bits of destination IPv6 address or prefix
390 			(requiring a byte-swap for little-endian SW)
391 
392 			<legal all>
393 */
394 #define RX_FLOW_SEARCH_ENTRY_5_DEST_IP_95_64_OFFSET                  0x00000014
395 #define RX_FLOW_SEARCH_ENTRY_5_DEST_IP_95_64_LSB                     0
396 #define RX_FLOW_SEARCH_ENTRY_5_DEST_IP_95_64_MASK                    0xffffffff
397 
398 /* Description		RX_FLOW_SEARCH_ENTRY_6_DEST_IP_63_32
399 
400 			Next 32 bits of destination IPv6 address or lowest 32
401 			bits of prefix (requiring a byte-swap for little-endian SW)
402 
403 			<legal all>
404 */
405 #define RX_FLOW_SEARCH_ENTRY_6_DEST_IP_63_32_OFFSET                  0x00000018
406 #define RX_FLOW_SEARCH_ENTRY_6_DEST_IP_63_32_LSB                     0
407 #define RX_FLOW_SEARCH_ENTRY_6_DEST_IP_63_32_MASK                    0xffffffff
408 
409 /* Description		RX_FLOW_SEARCH_ENTRY_7_DEST_IP_31_0
410 
411 			Lowest 32 bits of destination IPv6 address, or
412 			destination IPv4 address (requiring a byte-swap for
413 			little-endian SW w.r.t. the byte order in an IPv6 or IPv4
414 			packet)
415 
416 			<legal all>
417 */
418 #define RX_FLOW_SEARCH_ENTRY_7_DEST_IP_31_0_OFFSET                   0x0000001c
419 #define RX_FLOW_SEARCH_ENTRY_7_DEST_IP_31_0_LSB                      0
420 #define RX_FLOW_SEARCH_ENTRY_7_DEST_IP_31_0_MASK                     0xffffffff
421 
422 /* Description		RX_FLOW_SEARCH_ENTRY_8_SRC_PORT
423 
424 			LSB of SPI in case of ESP/AH
425 
426 			else source port in case of TCP/UDP without IPsec,
427 
428 			else zeros in case of ICMP (with the first/third byte in
429 			the MSB and the second/fourth byte in the LSB, i.e.
430 			requiring a byte-swap for little-endian SW w.r.t. the byte
431 			order as in an IPv6 or IPv4 packet)  <legal all>
432 */
433 #define RX_FLOW_SEARCH_ENTRY_8_SRC_PORT_OFFSET                       0x00000020
434 #define RX_FLOW_SEARCH_ENTRY_8_SRC_PORT_LSB                          0
435 #define RX_FLOW_SEARCH_ENTRY_8_SRC_PORT_MASK                         0x0000ffff
436 
437 /* Description		RX_FLOW_SEARCH_ENTRY_8_DEST_PORT
438 
439 			MSB of SPI in case of ESP/AH
440 
441 			else destination port in case of TCP/UDP without IPsec,
442 
443 			else zeros in case of ICMP (with the first byte in the
444 			MSB and the second byte in the LSB, i.e. requiring a
445 			byte-swap for little-endian SW w.r.t. the byte order as in
446 			an IPv6 or IPv4 packet)
447 
448 			<legal all>
449 */
450 #define RX_FLOW_SEARCH_ENTRY_8_DEST_PORT_OFFSET                      0x00000020
451 #define RX_FLOW_SEARCH_ENTRY_8_DEST_PORT_LSB                         16
452 #define RX_FLOW_SEARCH_ENTRY_8_DEST_PORT_MASK                        0xffff0000
453 
454 /* Description		RX_FLOW_SEARCH_ENTRY_9_L4_PROTOCOL
455 
456 			IPsec or L4 protocol
457 
458 
459 
460 			<enum 1 ICMPV4>
461 
462 			<enum 6 TCP>
463 
464 			<enum 17 UDP>
465 
466 			<enum 50 ESP>
467 
468 			<enum 51 AH>
469 
470 			<enum 58 ICMPV6>
471 
472 			<legal 1, 6, 17, 50, 51, 58>
473 */
474 #define RX_FLOW_SEARCH_ENTRY_9_L4_PROTOCOL_OFFSET                    0x00000024
475 #define RX_FLOW_SEARCH_ENTRY_9_L4_PROTOCOL_LSB                       0
476 #define RX_FLOW_SEARCH_ENTRY_9_L4_PROTOCOL_MASK                      0x000000ff
477 
478 /* Description		RX_FLOW_SEARCH_ENTRY_9_VALID
479 
480 			Indicates validity of entry
481 
482 			<legal all>
483 */
484 #define RX_FLOW_SEARCH_ENTRY_9_VALID_OFFSET                          0x00000024
485 #define RX_FLOW_SEARCH_ENTRY_9_VALID_LSB                             8
486 #define RX_FLOW_SEARCH_ENTRY_9_VALID_MASK                            0x00000100
487 
488 /* Description		RX_FLOW_SEARCH_ENTRY_9_RESERVED_9
489 
490 			<legal 0>
491 */
492 #define RX_FLOW_SEARCH_ENTRY_9_RESERVED_9_OFFSET                     0x00000024
493 #define RX_FLOW_SEARCH_ENTRY_9_RESERVED_9_LSB                        9
494 #define RX_FLOW_SEARCH_ENTRY_9_RESERVED_9_MASK                       0x3ffffe00
495 
496 /* Description		RX_FLOW_SEARCH_ENTRY_9_REO_DESTINATION_HANDLER
497 
498 			Indicates how to decide the REO destination indication
499 
500 			<enum 0 RXFT_USE_FT> Follow this entry
501 
502 			<enum 1 RXFT_USE_ASPT> Use address search+peer table
503 			entry
504 
505 			<enum 2 RXFT_USE_FT2> Follow this entry
506 
507 			<enum 3 RXFT_USE_CCE> Use CCE super-rule
508 
509 			<legal all>
510 */
511 #define RX_FLOW_SEARCH_ENTRY_9_REO_DESTINATION_HANDLER_OFFSET        0x00000024
512 #define RX_FLOW_SEARCH_ENTRY_9_REO_DESTINATION_HANDLER_LSB           30
513 #define RX_FLOW_SEARCH_ENTRY_9_REO_DESTINATION_HANDLER_MASK          0xc0000000
514 
515 /* Description		RX_FLOW_SEARCH_ENTRY_10_METADATA
516 
517 			Value to be passed to SW if this flow search entry
518 			matches
519 
520 			<legal all>
521 */
522 #define RX_FLOW_SEARCH_ENTRY_10_METADATA_OFFSET                      0x00000028
523 #define RX_FLOW_SEARCH_ENTRY_10_METADATA_LSB                         0
524 #define RX_FLOW_SEARCH_ENTRY_10_METADATA_MASK                        0xffffffff
525 
526 /* Description		RX_FLOW_SEARCH_ENTRY_11_REO_DESTINATION_INDICATION
527 
528 			The ID of the REO exit ring where the MSDU frame shall
529 			push after (MPDU level) reordering has finished.
530 
531 
532 
533 			<enum 0 reo_destination_tcl> Reo will push the frame
534 			into the REO2TCL ring
535 
536 			<enum 1 reo_destination_sw1> Reo will push the frame
537 			into the REO2SW1 ring
538 
539 			<enum 2 reo_destination_sw2> Reo will push the frame
540 			into the REO2SW1 ring
541 
542 			<enum 3 reo_destination_sw3> Reo will push the frame
543 			into the REO2SW1 ring
544 
545 			<enum 4 reo_destination_sw4> Reo will push the frame
546 			into the REO2SW1 ring
547 
548 			<enum 5 reo_destination_release> Reo will push the frame
549 			into the REO_release ring
550 
551 			<enum 6 reo_destination_fw> Reo will push the frame into
552 			the REO2FW ring
553 
554 			<enum 7 reo_destination_7> REO remaps this
555 
556 			<enum 8 reo_destination_8> REO remaps this <enum 9
557 			reo_destination_9> REO remaps this <enum 10
558 			reo_destination_10> REO remaps this
559 
560 			<enum 11 reo_destination_11> REO remaps this
561 
562 			<enum 12 reo_destination_12> REO remaps this <enum 13
563 			reo_destination_13> REO remaps this
564 
565 			<enum 14 reo_destination_14> REO remaps this
566 
567 			<enum 15 reo_destination_15> REO remaps this
568 
569 			<enum 16 reo_destination_16> REO remaps this
570 
571 			<enum 17 reo_destination_17> REO remaps this
572 
573 			<enum 18 reo_destination_18> REO remaps this
574 
575 			<enum 19 reo_destination_19> REO remaps this
576 
577 			<enum 20 reo_destination_20> REO remaps this
578 
579 			<enum 21 reo_destination_21> REO remaps this
580 
581 			<enum 22 reo_destination_22> REO remaps this
582 
583 			<enum 23 reo_destination_23> REO remaps this
584 
585 			<enum 24 reo_destination_24> REO remaps this
586 
587 			<enum 25 reo_destination_25> REO remaps this
588 
589 			<enum 26 reo_destination_26> REO remaps this
590 
591 			<enum 27 reo_destination_27> REO remaps this
592 
593 			<enum 28 reo_destination_28> REO remaps this
594 
595 			<enum 29 reo_destination_29> REO remaps this
596 
597 			<enum 30 reo_destination_30> REO remaps this
598 
599 			<enum 31 reo_destination_31> REO remaps this
600 
601 
602 
603 			<legal all>
604 */
605 #define RX_FLOW_SEARCH_ENTRY_11_REO_DESTINATION_INDICATION_OFFSET    0x0000002c
606 #define RX_FLOW_SEARCH_ENTRY_11_REO_DESTINATION_INDICATION_LSB       0
607 #define RX_FLOW_SEARCH_ENTRY_11_REO_DESTINATION_INDICATION_MASK      0x0000001f
608 
609 /* Description		RX_FLOW_SEARCH_ENTRY_11_MSDU_DROP
610 
611 			Overriding indication to REO to forward to REO release
612 			ring
613 
614 			<legal all>
615 */
616 #define RX_FLOW_SEARCH_ENTRY_11_MSDU_DROP_OFFSET                     0x0000002c
617 #define RX_FLOW_SEARCH_ENTRY_11_MSDU_DROP_LSB                        5
618 #define RX_FLOW_SEARCH_ENTRY_11_MSDU_DROP_MASK                       0x00000020
619 
620 /* Description		RX_FLOW_SEARCH_ENTRY_11_RESERVED_11
621 
622 			<legal 0>
623 */
624 #define RX_FLOW_SEARCH_ENTRY_11_RESERVED_11_OFFSET                   0x0000002c
625 #define RX_FLOW_SEARCH_ENTRY_11_RESERVED_11_LSB                      6
626 #define RX_FLOW_SEARCH_ENTRY_11_RESERVED_11_MASK                     0x000000c0
627 
628 /* Description		RX_FLOW_SEARCH_ENTRY_11_MSDU_COUNT
629 
630 			Number of Rx MSDUs matching this flow
631 
632 			<legal all>
633 */
634 #define RX_FLOW_SEARCH_ENTRY_11_MSDU_COUNT_OFFSET                    0x0000002c
635 #define RX_FLOW_SEARCH_ENTRY_11_MSDU_COUNT_LSB                       8
636 #define RX_FLOW_SEARCH_ENTRY_11_MSDU_COUNT_MASK                      0xffffff00
637 
638 /* Description		RX_FLOW_SEARCH_ENTRY_12_MSDU_BYTE_COUNT
639 
640 			Number of bytes in Rx MSDUs matching this flow
641 
642 			<legal all>
643 */
644 #define RX_FLOW_SEARCH_ENTRY_12_MSDU_BYTE_COUNT_OFFSET               0x00000030
645 #define RX_FLOW_SEARCH_ENTRY_12_MSDU_BYTE_COUNT_LSB                  0
646 #define RX_FLOW_SEARCH_ENTRY_12_MSDU_BYTE_COUNT_MASK                 0xffffffff
647 
648 /* Description		RX_FLOW_SEARCH_ENTRY_13_TIMESTAMP
649 
650 			Time of last reception (as measured at Rx OLE) matching
651 			this flow
652 
653 			<legal all>
654 */
655 #define RX_FLOW_SEARCH_ENTRY_13_TIMESTAMP_OFFSET                     0x00000034
656 #define RX_FLOW_SEARCH_ENTRY_13_TIMESTAMP_LSB                        0
657 #define RX_FLOW_SEARCH_ENTRY_13_TIMESTAMP_MASK                       0xffffffff
658 
659 
660 #endif // _RX_FLOW_SEARCH_ENTRY_H_
661