xref: /wlan-driver/fw-api/hw/qca9574/rx_mpdu_details.h (revision 5113495b16420b49004c444715d2daae2066e7dc) 
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2021 The Linux Foundation. All rights reserved.
3*5113495bSYour Name  *
4*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for any
5*5113495bSYour Name  * purpose with or without fee is hereby granted, provided that the above
6*5113495bSYour Name  * copyright notice and this permission notice appear in all copies.
7*5113495bSYour Name  *
8*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*5113495bSYour Name  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*5113495bSYour Name  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*5113495bSYour Name  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*5113495bSYour Name  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*5113495bSYour Name  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*5113495bSYour Name  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*5113495bSYour Name  */
16*5113495bSYour Name 
17*5113495bSYour Name // $ATH_LICENSE_HW_HDR_C$
18*5113495bSYour Name //
19*5113495bSYour Name // DO NOT EDIT!  This file is automatically generated
20*5113495bSYour Name //               These definitions are tied to a particular hardware layout
21*5113495bSYour Name 
22*5113495bSYour Name 
23*5113495bSYour Name #ifndef _RX_MPDU_DETAILS_H_
24*5113495bSYour Name #define _RX_MPDU_DETAILS_H_
25*5113495bSYour Name #if !defined(__ASSEMBLER__)
26*5113495bSYour Name #endif
27*5113495bSYour Name 
28*5113495bSYour Name #include "buffer_addr_info.h"
29*5113495bSYour Name #include "rx_mpdu_desc_info.h"
30*5113495bSYour Name 
31*5113495bSYour Name // ################ START SUMMARY #################
32*5113495bSYour Name //
33*5113495bSYour Name //	Dword	Fields
34*5113495bSYour Name //	0-1	struct buffer_addr_info msdu_link_desc_addr_info;
35*5113495bSYour Name //	2-3	struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
36*5113495bSYour Name //
37*5113495bSYour Name // ################ END SUMMARY #################
38*5113495bSYour Name 
39*5113495bSYour Name #define NUM_OF_DWORDS_RX_MPDU_DETAILS 4
40*5113495bSYour Name 
41*5113495bSYour Name struct rx_mpdu_details {
42*5113495bSYour Name     struct            buffer_addr_info                       msdu_link_desc_addr_info;
43*5113495bSYour Name     struct            rx_mpdu_desc_info                       rx_mpdu_desc_info_details;
44*5113495bSYour Name };
45*5113495bSYour Name 
46*5113495bSYour Name /*
47*5113495bSYour Name 
48*5113495bSYour Name struct buffer_addr_info msdu_link_desc_addr_info
49*5113495bSYour Name 
50*5113495bSYour Name 			Consumer: REO/SW/FW
51*5113495bSYour Name 
52*5113495bSYour Name 			Producer: RXDMA
53*5113495bSYour Name 
54*5113495bSYour Name 
55*5113495bSYour Name 
56*5113495bSYour Name 			Details of the physical address of the MSDU link
57*5113495bSYour Name 			descriptor that contains pointers to MSDUs related to this
58*5113495bSYour Name 			MPDU
59*5113495bSYour Name 
60*5113495bSYour Name struct rx_mpdu_desc_info rx_mpdu_desc_info_details
61*5113495bSYour Name 
62*5113495bSYour Name 			Consumer: REO/SW/FW
63*5113495bSYour Name 
64*5113495bSYour Name 			Producer: RXDMA
65*5113495bSYour Name 
66*5113495bSYour Name 
67*5113495bSYour Name 
68*5113495bSYour Name 			General information related to the MPDU that should be
69*5113495bSYour Name */
70*5113495bSYour Name 
71*5113495bSYour Name 
72*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info msdu_link_desc_addr_info */
73*5113495bSYour Name 
74*5113495bSYour Name 
75*5113495bSYour Name /* Description		RX_MPDU_DETAILS_0_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
76*5113495bSYour Name 
77*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
78*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
79*5113495bSYour Name 
80*5113495bSYour Name 
81*5113495bSYour Name 
82*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
83*5113495bSYour Name 
84*5113495bSYour Name 			<legal all>
85*5113495bSYour Name */
86*5113495bSYour Name #define RX_MPDU_DETAILS_0_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
87*5113495bSYour Name #define RX_MPDU_DETAILS_0_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
88*5113495bSYour Name #define RX_MPDU_DETAILS_0_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
89*5113495bSYour Name 
90*5113495bSYour Name /* Description		RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
91*5113495bSYour Name 
92*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
93*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
94*5113495bSYour Name 
95*5113495bSYour Name 
96*5113495bSYour Name 
97*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
98*5113495bSYour Name 
99*5113495bSYour Name 			<legal all>
100*5113495bSYour Name */
101*5113495bSYour Name #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
102*5113495bSYour Name #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
103*5113495bSYour Name #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
104*5113495bSYour Name 
105*5113495bSYour Name /* Description		RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
106*5113495bSYour Name 
107*5113495bSYour Name 			Consumer: WBM
108*5113495bSYour Name 
109*5113495bSYour Name 			Producer: SW/FW
110*5113495bSYour Name 
111*5113495bSYour Name 
112*5113495bSYour Name 
113*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
114*5113495bSYour Name 
115*5113495bSYour Name 
116*5113495bSYour Name 
117*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
118*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
119*5113495bSYour Name 			pointed to shall be returned after the frame has been
120*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
121*5113495bSYour Name 
122*5113495bSYour Name 
123*5113495bSYour Name 
124*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
125*5113495bSYour Name 			to the WMB buffer idle list
126*5113495bSYour Name 
127*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
128*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
129*5113495bSYour Name 
130*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
131*5113495bSYour Name 
132*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
133*5113495bSYour Name 			ring 0
134*5113495bSYour Name 
135*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
136*5113495bSYour Name 			ring 1
137*5113495bSYour Name 
138*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
139*5113495bSYour Name 			ring 2
140*5113495bSYour Name 
141*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
142*5113495bSYour Name 			ring 3
143*5113495bSYour Name 
144*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
145*5113495bSYour Name 			ring 3
146*5113495bSYour Name 
147*5113495bSYour Name 
148*5113495bSYour Name 
149*5113495bSYour Name 			<legal all>
150*5113495bSYour Name */
151*5113495bSYour Name #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
152*5113495bSYour Name #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
153*5113495bSYour Name #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
154*5113495bSYour Name 
155*5113495bSYour Name /* Description		RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
156*5113495bSYour Name 
157*5113495bSYour Name 			Cookie field exclusively used by SW.
158*5113495bSYour Name 
159*5113495bSYour Name 
160*5113495bSYour Name 
161*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
162*5113495bSYour Name 
163*5113495bSYour Name 
164*5113495bSYour Name 
165*5113495bSYour Name 			HW ignores the contents, accept that it passes the
166*5113495bSYour Name 			programmed value on to other descriptors together with the
167*5113495bSYour Name 			physical address
168*5113495bSYour Name 
169*5113495bSYour Name 
170*5113495bSYour Name 
171*5113495bSYour Name 			Field can be used by SW to for example associate the
172*5113495bSYour Name 			buffers physical address with the virtual address
173*5113495bSYour Name 
174*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
175*5113495bSYour Name 			specification
176*5113495bSYour Name 
177*5113495bSYour Name 
178*5113495bSYour Name 
179*5113495bSYour Name 			NOTE:
180*5113495bSYour Name 
181*5113495bSYour Name 			The three most significant bits can have a special
182*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
183*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
184*5113495bSYour Name 
185*5113495bSYour Name 
186*5113495bSYour Name 
187*5113495bSYour Name 			In case of NON punctured transmission:
188*5113495bSYour Name 
189*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
190*5113495bSYour Name 
191*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
192*5113495bSYour Name 
193*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
194*5113495bSYour Name 
195*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
196*5113495bSYour Name 
197*5113495bSYour Name 
198*5113495bSYour Name 
199*5113495bSYour Name 			In case of punctured transmission:
200*5113495bSYour Name 
201*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
202*5113495bSYour Name 
203*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
204*5113495bSYour Name 
205*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
206*5113495bSYour Name 
207*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
208*5113495bSYour Name 
209*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
210*5113495bSYour Name 
211*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
212*5113495bSYour Name 
213*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
214*5113495bSYour Name 
215*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
216*5113495bSYour Name 
217*5113495bSYour Name 
218*5113495bSYour Name 
219*5113495bSYour Name 			Note: a punctured transmission is indicated by the
220*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
221*5113495bSYour Name 			TLV
222*5113495bSYour Name 
223*5113495bSYour Name 
224*5113495bSYour Name 
225*5113495bSYour Name 			<legal all>
226*5113495bSYour Name */
227*5113495bSYour Name #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
228*5113495bSYour Name #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
229*5113495bSYour Name #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
230*5113495bSYour Name 
231*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_desc_info rx_mpdu_desc_info_details */
232*5113495bSYour Name 
233*5113495bSYour Name 
234*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT
235*5113495bSYour Name 
236*5113495bSYour Name 			Consumer: REO/SW/FW
237*5113495bSYour Name 
238*5113495bSYour Name 			Producer: RXDMA
239*5113495bSYour Name 
240*5113495bSYour Name 
241*5113495bSYour Name 
242*5113495bSYour Name 			The number of MSDUs within the MPDU
243*5113495bSYour Name 
244*5113495bSYour Name 			<legal all>
245*5113495bSYour Name */
246*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
247*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB   0
248*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK  0x000000ff
249*5113495bSYour Name 
250*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER
251*5113495bSYour Name 
252*5113495bSYour Name 			Consumer: REO/SW/FW
253*5113495bSYour Name 
254*5113495bSYour Name 			Producer: RXDMA
255*5113495bSYour Name 
256*5113495bSYour Name 
257*5113495bSYour Name 
258*5113495bSYour Name 			The field can have two different meanings based on the
259*5113495bSYour Name 			setting of field 'BAR_frame':
260*5113495bSYour Name 
261*5113495bSYour Name 
262*5113495bSYour Name 
263*5113495bSYour Name 			'BAR_frame' is NOT set:
264*5113495bSYour Name 
265*5113495bSYour Name 			The MPDU sequence number of the received frame.
266*5113495bSYour Name 
267*5113495bSYour Name 
268*5113495bSYour Name 
269*5113495bSYour Name 			'BAR_frame' is set.
270*5113495bSYour Name 
271*5113495bSYour Name 			The MPDU Start sequence number from the BAR frame
272*5113495bSYour Name 
273*5113495bSYour Name 			<legal all>
274*5113495bSYour Name */
275*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_OFFSET 0x00000008
276*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_LSB 8
277*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_MASK 0x000fff00
278*5113495bSYour Name 
279*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG
280*5113495bSYour Name 
281*5113495bSYour Name 			Consumer: REO/SW/FW
282*5113495bSYour Name 
283*5113495bSYour Name 			Producer: RXDMA
284*5113495bSYour Name 
285*5113495bSYour Name 
286*5113495bSYour Name 
287*5113495bSYour Name 			When set, this MPDU is a fragment and REO should forward
288*5113495bSYour Name 			this fragment MPDU to the REO destination ring without any
289*5113495bSYour Name 			reorder checks, pn checks or bitmap update. This implies
290*5113495bSYour Name 			that REO is forwarding the pointer to the MSDU link
291*5113495bSYour Name 			descriptor. The destination ring is coming from a
292*5113495bSYour Name 			programmable register setting in REO
293*5113495bSYour Name 
294*5113495bSYour Name 
295*5113495bSYour Name 
296*5113495bSYour Name 			<legal all>
297*5113495bSYour Name */
298*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
299*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 20
300*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00100000
301*5113495bSYour Name 
302*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT
303*5113495bSYour Name 
304*5113495bSYour Name 			Consumer: REO/SW/FW
305*5113495bSYour Name 
306*5113495bSYour Name 			Producer: RXDMA
307*5113495bSYour Name 
308*5113495bSYour Name 
309*5113495bSYour Name 
310*5113495bSYour Name 			The retry bit setting from the MPDU header of the
311*5113495bSYour Name 			received frame
312*5113495bSYour Name 
313*5113495bSYour Name 			<legal all>
314*5113495bSYour Name */
315*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
316*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 21
317*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00200000
318*5113495bSYour Name 
319*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG
320*5113495bSYour Name 
321*5113495bSYour Name 			Consumer: REO/SW/FW
322*5113495bSYour Name 
323*5113495bSYour Name 			Producer: RXDMA
324*5113495bSYour Name 
325*5113495bSYour Name 
326*5113495bSYour Name 
327*5113495bSYour Name 			When set, the MPDU was received as part of an A-MPDU.
328*5113495bSYour Name 
329*5113495bSYour Name 			<legal all>
330*5113495bSYour Name */
331*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
332*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB   22
333*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK  0x00400000
334*5113495bSYour Name 
335*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME
336*5113495bSYour Name 
337*5113495bSYour Name 			Consumer: REO/SW/FW
338*5113495bSYour Name 
339*5113495bSYour Name 			Producer: RXDMA
340*5113495bSYour Name 
341*5113495bSYour Name 
342*5113495bSYour Name 
343*5113495bSYour Name 			When set, the received frame is a BAR frame. After
344*5113495bSYour Name 			processing, this frame shall be pushed to SW or deleted.
345*5113495bSYour Name 
346*5113495bSYour Name 			<legal all>
347*5113495bSYour Name */
348*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
349*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB    23
350*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK   0x00800000
351*5113495bSYour Name 
352*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO
353*5113495bSYour Name 
354*5113495bSYour Name 			Consumer: REO/SW/FW
355*5113495bSYour Name 
356*5113495bSYour Name 			Producer: RXDMA
357*5113495bSYour Name 
358*5113495bSYour Name 
359*5113495bSYour Name 
360*5113495bSYour Name 			Copied here by RXDMA from RX_MPDU_END
361*5113495bSYour Name 
362*5113495bSYour Name 			When not set, REO will Not perform a PN sequence number
363*5113495bSYour Name 			check
364*5113495bSYour Name */
365*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
366*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 24
367*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x01000000
368*5113495bSYour Name 
369*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID
370*5113495bSYour Name 
371*5113495bSYour Name 			When set, OLE found a valid SA entry for all MSDUs in
372*5113495bSYour Name 			this MPDU
373*5113495bSYour Name 
374*5113495bSYour Name 			<legal all>
375*5113495bSYour Name */
376*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000008
377*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB  25
378*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x02000000
379*5113495bSYour Name 
380*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
381*5113495bSYour Name 
382*5113495bSYour Name 			When set, at least 1 MSDU within the MPDU has an
383*5113495bSYour Name 			unsuccessful MAC source address search due to the expiration
384*5113495bSYour Name 			of the search timer.
385*5113495bSYour Name 
386*5113495bSYour Name 			<legal all>
387*5113495bSYour Name */
388*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000008
389*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 26
390*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x04000000
391*5113495bSYour Name 
392*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID
393*5113495bSYour Name 
394*5113495bSYour Name 			When set, OLE found a valid DA entry for all MSDUs in
395*5113495bSYour Name 			this MPDU
396*5113495bSYour Name 
397*5113495bSYour Name 			<legal all>
398*5113495bSYour Name */
399*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000008
400*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB  27
401*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x08000000
402*5113495bSYour Name 
403*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC
404*5113495bSYour Name 
405*5113495bSYour Name 			Field Only valid if da_is_valid is set
406*5113495bSYour Name 
407*5113495bSYour Name 
408*5113495bSYour Name 
409*5113495bSYour Name 			When set, at least one of the DA addresses is a
410*5113495bSYour Name 			Multicast or Broadcast address.
411*5113495bSYour Name 
412*5113495bSYour Name 			<legal all>
413*5113495bSYour Name */
414*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000008
415*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB   28
416*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK  0x10000000
417*5113495bSYour Name 
418*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
419*5113495bSYour Name 
420*5113495bSYour Name 			When set, at least 1 MSDU within the MPDU has an
421*5113495bSYour Name 			unsuccessful MAC destination address search due to the
422*5113495bSYour Name 			expiration of the search timer.
423*5113495bSYour Name 
424*5113495bSYour Name 			<legal all>
425*5113495bSYour Name */
426*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000008
427*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 29
428*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x20000000
429*5113495bSYour Name 
430*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU
431*5113495bSYour Name 
432*5113495bSYour Name 			Field only valid when first_msdu_in_mpdu_flag is set.
433*5113495bSYour Name 
434*5113495bSYour Name 
435*5113495bSYour Name 
436*5113495bSYour Name 			When set, the contents in the MSDU buffer contains a
437*5113495bSYour Name 			'RAW' MPDU. This 'RAW' MPDU might be spread out over
438*5113495bSYour Name 			multiple MSDU buffers.
439*5113495bSYour Name 
440*5113495bSYour Name 			<legal all>
441*5113495bSYour Name */
442*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET  0x00000008
443*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB     30
444*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK    0x40000000
445*5113495bSYour Name 
446*5113495bSYour Name /* Description		RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG
447*5113495bSYour Name 
448*5113495bSYour Name 			The More Fragment bit setting from the MPDU header of
449*5113495bSYour Name 			the received frame
450*5113495bSYour Name 
451*5113495bSYour Name 
452*5113495bSYour Name 
453*5113495bSYour Name 			<legal all>
454*5113495bSYour Name */
455*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
456*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 31
457*5113495bSYour Name #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x80000000
458*5113495bSYour Name 
459*5113495bSYour Name /* Description		RX_MPDU_DETAILS_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA
460*5113495bSYour Name 
461*5113495bSYour Name 			Meta data that SW has programmed in the Peer table entry
462*5113495bSYour Name 			of the transmitting STA.
463*5113495bSYour Name 
464*5113495bSYour Name 			<legal all>
465*5113495bSYour Name */
466*5113495bSYour Name #define RX_MPDU_DETAILS_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
467*5113495bSYour Name #define RX_MPDU_DETAILS_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
468*5113495bSYour Name #define RX_MPDU_DETAILS_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
469*5113495bSYour Name 
470*5113495bSYour Name 
471*5113495bSYour Name #endif // _RX_MPDU_DETAILS_H_
472