1 /* 2 * Copyright (c) 2021 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 // $ATH_LICENSE_HW_HDR_C$ 18 // 19 // DO NOT EDIT! This file is automatically generated 20 // These definitions are tied to a particular hardware layout 21 22 23 #ifndef _RX_PPDU_END_USER_STATS_H_ 24 #define _RX_PPDU_END_USER_STATS_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 #include "rx_rxpcu_classification_overview.h" 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0 struct rx_rxpcu_classification_overview rxpcu_classification_details; 34 // 1 sta_full_aid[12:0], mcs[16:13], nss[19:17], ofdma_info_valid[20], dl_ofdma_ru_start_index[27:21], reserved_1a[31:28] 35 // 2 dl_ofdma_ru_width[6:0], reserved_2a[7], user_receive_quality[15:8], mpdu_cnt_fcs_err[25:16], wbm2rxdma_buf_source_used[26], fw2rxdma_buf_source_used[27], sw2rxdma_buf_source_used[28], reserved_2b[31:29] 36 // 3 mpdu_cnt_fcs_ok[8:0], frame_control_info_valid[9], qos_control_info_valid[10], ht_control_info_valid[11], data_sequence_control_info_valid[12], ht_control_info_null_valid[13], reserved_3a[15:14], rxdma2reo_ring_used[16], rxdma2fw_ring_used[17], rxdma2sw_ring_used[18], rxdma_release_ring_used[19], ht_control_field_pkt_type[23:20], reserved_3b[31:24] 37 // 4 ast_index[15:0], frame_control_field[31:16] 38 // 5 first_data_seq_ctrl[15:0], qos_control_field[31:16] 39 // 6 ht_control_field[31:0] 40 // 7 fcs_ok_bitmap_31_0[31:0] 41 // 8 fcs_ok_bitmap_63_32[31:0] 42 // 9 udp_msdu_count[15:0], tcp_msdu_count[31:16] 43 // 10 other_msdu_count[15:0], tcp_ack_msdu_count[31:16] 44 // 11 sw_response_reference_ptr[31:0] 45 // 12 received_qos_data_tid_bitmap[15:0], received_qos_data_tid_eosp_bitmap[31:16] 46 // 13 qosctrl_15_8_tid0[7:0], qosctrl_15_8_tid1[15:8], qosctrl_15_8_tid2[23:16], qosctrl_15_8_tid3[31:24] 47 // 14 qosctrl_15_8_tid4[7:0], qosctrl_15_8_tid5[15:8], qosctrl_15_8_tid6[23:16], qosctrl_15_8_tid7[31:24] 48 // 15 qosctrl_15_8_tid8[7:0], qosctrl_15_8_tid9[15:8], qosctrl_15_8_tid10[23:16], qosctrl_15_8_tid11[31:24] 49 // 16 qosctrl_15_8_tid12[7:0], qosctrl_15_8_tid13[15:8], qosctrl_15_8_tid14[23:16], qosctrl_15_8_tid15[31:24] 50 // 17 mpdu_ok_byte_count[24:0], ampdu_delim_ok_count_6_0[31:25] 51 // 18 ampdu_delim_err_count[24:0], ampdu_delim_ok_count_13_7[31:25] 52 // 19 mpdu_err_byte_count[24:0], ampdu_delim_ok_count_20_14[31:25] 53 // 20 non_consecutive_delimiter_err[15:0], reserved_20a[31:16] 54 // 21 ht_control_null_field[31:0] 55 // 22 sw_response_reference_ptr_ext[31:0] 56 // 57 // ################ END SUMMARY ################# 58 59 #define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS 23 60 61 struct rx_ppdu_end_user_stats { 62 struct rx_rxpcu_classification_overview rxpcu_classification_details; 63 uint32_t sta_full_aid : 13, //[12:0] 64 mcs : 4, //[16:13] 65 nss : 3, //[19:17] 66 ofdma_info_valid : 1, //[20] 67 dl_ofdma_ru_start_index : 7, //[27:21] 68 reserved_1a : 4; //[31:28] 69 uint32_t dl_ofdma_ru_width : 7, //[6:0] 70 reserved_2a : 1, //[7] 71 user_receive_quality : 8, //[15:8] 72 mpdu_cnt_fcs_err : 10, //[25:16] 73 wbm2rxdma_buf_source_used : 1, //[26] 74 fw2rxdma_buf_source_used : 1, //[27] 75 sw2rxdma_buf_source_used : 1, //[28] 76 reserved_2b : 3; //[31:29] 77 uint32_t mpdu_cnt_fcs_ok : 9, //[8:0] 78 frame_control_info_valid : 1, //[9] 79 qos_control_info_valid : 1, //[10] 80 ht_control_info_valid : 1, //[11] 81 data_sequence_control_info_valid: 1, //[12] 82 ht_control_info_null_valid : 1, //[13] 83 reserved_3a : 2, //[15:14] 84 rxdma2reo_ring_used : 1, //[16] 85 rxdma2fw_ring_used : 1, //[17] 86 rxdma2sw_ring_used : 1, //[18] 87 rxdma_release_ring_used : 1, //[19] 88 ht_control_field_pkt_type : 4, //[23:20] 89 reserved_3b : 8; //[31:24] 90 uint32_t ast_index : 16, //[15:0] 91 frame_control_field : 16; //[31:16] 92 uint32_t first_data_seq_ctrl : 16, //[15:0] 93 qos_control_field : 16; //[31:16] 94 uint32_t ht_control_field : 32; //[31:0] 95 uint32_t fcs_ok_bitmap_31_0 : 32; //[31:0] 96 uint32_t fcs_ok_bitmap_63_32 : 32; //[31:0] 97 uint32_t udp_msdu_count : 16, //[15:0] 98 tcp_msdu_count : 16; //[31:16] 99 uint32_t other_msdu_count : 16, //[15:0] 100 tcp_ack_msdu_count : 16; //[31:16] 101 uint32_t sw_response_reference_ptr : 32; //[31:0] 102 uint32_t received_qos_data_tid_bitmap : 16, //[15:0] 103 received_qos_data_tid_eosp_bitmap: 16; //[31:16] 104 uint32_t qosctrl_15_8_tid0 : 8, //[7:0] 105 qosctrl_15_8_tid1 : 8, //[15:8] 106 qosctrl_15_8_tid2 : 8, //[23:16] 107 qosctrl_15_8_tid3 : 8; //[31:24] 108 uint32_t qosctrl_15_8_tid4 : 8, //[7:0] 109 qosctrl_15_8_tid5 : 8, //[15:8] 110 qosctrl_15_8_tid6 : 8, //[23:16] 111 qosctrl_15_8_tid7 : 8; //[31:24] 112 uint32_t qosctrl_15_8_tid8 : 8, //[7:0] 113 qosctrl_15_8_tid9 : 8, //[15:8] 114 qosctrl_15_8_tid10 : 8, //[23:16] 115 qosctrl_15_8_tid11 : 8; //[31:24] 116 uint32_t qosctrl_15_8_tid12 : 8, //[7:0] 117 qosctrl_15_8_tid13 : 8, //[15:8] 118 qosctrl_15_8_tid14 : 8, //[23:16] 119 qosctrl_15_8_tid15 : 8; //[31:24] 120 uint32_t mpdu_ok_byte_count : 25, //[24:0] 121 ampdu_delim_ok_count_6_0 : 7; //[31:25] 122 uint32_t ampdu_delim_err_count : 25, //[24:0] 123 ampdu_delim_ok_count_13_7 : 7; //[31:25] 124 uint32_t mpdu_err_byte_count : 25, //[24:0] 125 ampdu_delim_ok_count_20_14 : 7; //[31:25] 126 uint32_t non_consecutive_delimiter_err : 16, //[15:0] 127 reserved_20a : 16; //[31:16] 128 uint32_t ht_control_null_field : 32; //[31:0] 129 uint32_t sw_response_reference_ptr_ext : 32; //[31:0] 130 }; 131 132 /* 133 134 struct rx_rxpcu_classification_overview rxpcu_classification_details 135 136 Details related to what RXPCU classification types of 137 MPDUs have been received 138 139 sta_full_aid 140 141 Consumer: FW 142 143 Producer: RXPCU 144 145 146 147 The full AID of this station. 148 149 150 151 <legal all> 152 153 mcs 154 155 MCS of the received frame 156 157 158 159 For details, refer to MCS_TYPE description 160 161 Note: This is rate in case of 11a/11b 162 163 164 165 <legal all> 166 167 nss 168 169 Number of spatial streams. 170 171 172 173 NOTE: RXPCU derives this from the 'Mimo_ss_bitmap' 174 175 176 177 <enum 0 1_spatial_stream>Single spatial stream 178 179 <enum 1 2_spatial_streams>2 spatial streams 180 181 <enum 2 3_spatial_streams>3 spatial streams 182 183 <enum 3 4_spatial_streams>4 spatial streams 184 185 <enum 4 5_spatial_streams>5 spatial streams 186 187 <enum 5 6_spatial_streams>6 spatial streams 188 189 <enum 6 7_spatial_streams>7 spatial streams 190 191 <enum 7 8_spatial_streams>8 spatial streams 192 193 ofdma_info_valid 194 195 When set, ofdma RU related info in the following fields 196 is valid 197 198 <legal all> 199 200 dl_ofdma_ru_start_index 201 202 Field only valid when Ofdma_info_valid is set 203 204 205 206 RU index number to which User is assigned 207 208 RU numbering is over the entire BW, starting from 0 209 210 <legal 0-73> 211 212 reserved_1a 213 214 <legal 0> 215 216 dl_ofdma_ru_width 217 218 The size of the RU for this user. 219 220 In units of 1 (26 tone) RU 221 222 <legal 1-74> 223 224 reserved_2a 225 226 <legal 0> 227 228 user_receive_quality 229 230 RSSI / EVM for this user ??? 231 232 233 234 Details TBD 235 236 <legal all> 237 238 mpdu_cnt_fcs_err 239 240 The number of MPDUs received from this STA in this PPDU 241 with FCS errors 242 243 <legal all> 244 245 wbm2rxdma_buf_source_used 246 247 Field filled in by RXDMA 248 249 250 251 When set, RXDMA has used the wbm2rxdma_buf ring as 252 source for at least one of the frames in this PPDU. 253 254 fw2rxdma_buf_source_used 255 256 Field filled in by RXDMA 257 258 259 260 When set, RXDMA has used the fw2rxdma_buf ring as source 261 for at least one of the frames in this PPDU. 262 263 sw2rxdma_buf_source_used 264 265 Field filled in by RXDMA 266 267 268 269 When set, RXDMA has used the sw2rxdma_buf ring as source 270 for at least one of the frames in this PPDU. 271 272 reserved_2b 273 274 <legal 0> 275 276 mpdu_cnt_fcs_ok 277 278 The number of MPDUs received from this STA in this PPDU 279 with correct FCS 280 281 <legal all> 282 283 frame_control_info_valid 284 285 When set, the frame_control_info field contains valid 286 information 287 288 <legal all> 289 290 qos_control_info_valid 291 292 When set, the QoS_control_info field contains valid 293 information 294 295 <legal all> 296 297 ht_control_info_valid 298 299 When set, the HT_control_field contains valid 300 information 301 302 <legal all> 303 304 data_sequence_control_info_valid 305 306 When set, the First_data_seq_ctrl field contains valid 307 information 308 309 <legal all> 310 311 ht_control_info_null_valid 312 313 When set, the HT_control_NULL_field contains valid 314 information 315 316 <legal all> 317 318 reserved_3a 319 320 <legal 0> 321 322 rxdma2reo_ring_used 323 324 Field filled in by RXDMA 325 326 327 328 Set when at least one frame during this PPDU got pushed 329 to this ring by RXDMA 330 331 rxdma2fw_ring_used 332 333 Field filled in by RXDMA 334 335 336 337 Set when at least one frame during this PPDU got pushed 338 to this ring by RXDMA 339 340 rxdma2sw_ring_used 341 342 Field filled in by RXDMA 343 344 345 346 Set when at least one frame during this PPDU got pushed 347 to this ring by RXDMA 348 349 rxdma_release_ring_used 350 351 Field filled in by RXDMA 352 353 354 355 Set when at least one frame during this PPDU got pushed 356 to this ring by RXDMA 357 358 ht_control_field_pkt_type 359 360 Field only valid when HT_control_info_valid or 361 HT_control_info_NULL_valid is set. 362 363 364 365 Indicates what the PHY receive type was for receiving 366 this frame. Can help determine if the HT_CONTROL field shall 367 be interpreted as HT/VHT or HE. 368 369 370 371 NOTE: later on in the 11ax IEEE spec a bit within the HT 372 control field was introduced that explicitly indicated how 373 to interpret the HT control field.... As HT, VHT, or HE. 374 375 376 377 <enum 0 dot11a>802.11a PPDU type 378 379 <enum 1 dot11b>802.11b PPDU type 380 381 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 382 383 <enum 3 dot11ac>802.11ac PPDU type 384 385 <enum 4 dot11ax>802.11ax PPDU type 386 387 reserved_3b 388 389 <legal 0> 390 391 ast_index 392 393 This field indicates the index of the AST entry 394 corresponding to this MPDU. It is provided by the GSE module 395 instantiated in RXPCU. 396 397 A value of 0xFFFF indicates an invalid AST index, 398 meaning that No AST entry was found or NO AST search was 399 performed 400 401 <legal all> 402 403 frame_control_field 404 405 Field only valid when Frame_control_info_valid is set. 406 407 408 409 Last successfully received Frame_control field of data 410 frame (excluding Data NULL/ QoS Null) for this user 411 412 Mainly used to track the PM state of the transmitted 413 device 414 415 416 417 NOTE: only data frame info is needed, as control and 418 management frames are already routed to the FW. 419 420 <legal all> 421 422 first_data_seq_ctrl 423 424 Field only valid when Data_sequence_control_info_valid 425 is set. 426 427 428 429 Sequence control field of the first data frame 430 (excluding Data NULL or QoS Data null) received for this 431 user with correct FCS 432 433 434 435 NOTE: only data frame info is needed, as control and 436 management frames are already routed to the FW. 437 438 <legal all> 439 440 qos_control_field 441 442 Field only valid when QoS_control_info_valid is set. 443 444 445 446 Last successfully received QoS_control field of data 447 frame (excluding Data NULL/ QoS Null) for this user 448 449 450 451 Note that in case of multi TID, this field can only 452 reflect the last properly received MPDU, and thus can not 453 indicate all potentially different TIDs that had been 454 received earlier. 455 456 457 458 There are however per TID fields, that will contain 459 among other things all buffer status info: See 460 461 QoSCtrl_15_8_tid??? 462 463 <legal all> 464 465 ht_control_field 466 467 Field only valid when HT_control_info_valid is set. 468 469 470 471 Last successfully received 472 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 473 excluding QoS Null frames for this user. 474 475 476 477 NOTE: HT control fields from QoS Null frames are 478 captured in field HT_control_NULL_field 479 480 <legal all> 481 482 fcs_ok_bitmap_31_0 483 484 Bitmap indicates in order of received MPDUs, which MPDUs 485 had an passing FCS or had an error. 486 487 1: FCS OK 488 489 0: FCS error 490 491 <legal all> 492 493 fcs_ok_bitmap_63_32 494 495 Bitmap indicates in order of received MPDUs, which MPDUs 496 had an passing FCS or had an error. 497 498 1: FCS OK 499 500 0: FCS error 501 502 503 504 NOTE: for users 0, 1, 2 and 3, additional bitmap info 505 (up to 256 bitmap window) is provided in 506 RX_PPDU_END_USER_STATS_EXT TLV 507 508 <legal all> 509 510 udp_msdu_count 511 512 Field filled in by RX OLE 513 514 Set to 0 by RXPCU 515 516 517 518 The number of MSDUs that are part of MPDUs without FCS 519 error, that contain UDP frames. 520 521 <legal all> 522 523 tcp_msdu_count 524 525 Field filled in by RX OLE 526 527 Set to 0 by RXPCU 528 529 530 531 The number of MSDUs that are part of MPDUs without FCS 532 error, that contain TCP frames. 533 534 535 536 (Note: This does NOT include TCP-ACK) 537 538 <legal all> 539 540 other_msdu_count 541 542 Field filled in by RX OLE 543 544 Set to 0 by RXPCU 545 546 547 548 The number of MSDUs that are part of MPDUs without FCS 549 error, that contain neither UDP or TCP frames. 550 551 552 553 Includes Management and control frames. 554 555 556 557 <legal all> 558 559 tcp_ack_msdu_count 560 561 Field filled in by RX OLE 562 563 Set to 0 by RXPCU 564 565 566 567 The number of MSDUs that are part of MPDUs without FCS 568 error, that contain TCP ack frames. 569 570 <legal all> 571 572 sw_response_reference_ptr 573 574 Pointer that SW uses to refer back to an expected 575 response reception. Used for Rate adaptation purposes. 576 577 When a reception occurrs that is not tied to an expected 578 response, this field is set to 0x0 579 580 581 582 Note: further on in this TLV there is also the field: 583 Sw_response_reference_ptr 584 585 <legal all> 586 587 received_qos_data_tid_bitmap 588 589 Whenever a frame is received that contains a QoS control 590 field (that includes QoS Data and/or QoS Null), the bit in 591 this field that corresponds to the received TID shall be 592 set. 593 594 ...Bitmap[0] = TID0 595 596 ...Bitmap[1] = TID1 597 598 Etc. 599 600 <legal all> 601 602 received_qos_data_tid_eosp_bitmap 603 604 Field initialized to 0 605 606 For every QoS Data frame that is correctly received, the 607 EOSP bit of that frame is copied over into the corresponding 608 TID related field. 609 610 Note that this implies that the bits here represent the 611 EOSP bit status for each TID of the last MPDU received for 612 that TID. 613 614 615 616 received TID shall be set. 617 618 ...eosp_bitmap[0] = eosp of TID0 619 620 ...eosp_bitmap[1] = eosp of TID1 621 622 Etc. 623 624 <legal all> 625 626 qosctrl_15_8_tid0 627 628 Field only valid when Received_qos_data_tid_bitmap[0] is 629 set 630 631 632 633 QoS control field bits 15-8 of the last properly 634 received MPDU with a QoS control field embedded, with TID 635 == 0 636 637 qosctrl_15_8_tid1 638 639 Field only valid when Received_qos_data_tid_bitmap[1] is 640 set 641 642 643 644 QoS control field bits 15-8 of the last properly 645 received MPDU with a QoS control field embedded, with TID 646 == 1 647 648 qosctrl_15_8_tid2 649 650 Field only valid when Received_qos_data_tid_bitmap[2] is 651 set 652 653 654 655 QoS control field bits 15-8 of the last properly 656 received MPDU with a QoS control field embedded, with TID 657 == 2 658 659 qosctrl_15_8_tid3 660 661 Field only valid when Received_qos_data_tid_bitmap[3] is 662 set 663 664 665 666 QoS control field bits 15-8 of the last properly 667 received MPDU with a QoS control field embedded, with TID 668 == 3 669 670 qosctrl_15_8_tid4 671 672 Field only valid when Received_qos_data_tid_bitmap[4] is 673 set 674 675 676 677 QoS control field bits 15-8 of the last properly 678 received MPDU with a QoS control field embedded, with TID 679 == 4 680 681 qosctrl_15_8_tid5 682 683 Field only valid when Received_qos_data_tid_bitmap[5] is 684 set 685 686 687 688 QoS control field bits 15-8 of the last properly 689 received MPDU with a QoS control field embedded, with TID 690 == 5 691 692 qosctrl_15_8_tid6 693 694 Field only valid when Received_qos_data_tid_bitmap[6] is 695 set 696 697 698 699 QoS control field bits 15-8 of the last properly 700 received MPDU with a QoS control field embedded, with TID 701 == 6 702 703 qosctrl_15_8_tid7 704 705 Field only valid when Received_qos_data_tid_bitmap[7] is 706 set 707 708 709 710 QoS control field bits 15-8 of the last properly 711 received MPDU with a QoS control field embedded, with TID 712 == 7 713 714 qosctrl_15_8_tid8 715 716 Field only valid when Received_qos_data_tid_bitmap[8] is 717 set 718 719 720 721 QoS control field bits 15-8 of the last properly 722 received MPDU with a QoS control field embedded, with TID 723 == 8 724 725 qosctrl_15_8_tid9 726 727 Field only valid when Received_qos_data_tid_bitmap[9] is 728 set 729 730 731 732 QoS control field bits 15-8 of the last properly 733 received MPDU with a QoS control field embedded, with TID 734 == 9 735 736 qosctrl_15_8_tid10 737 738 Field only valid when Received_qos_data_tid_bitmap[10] 739 is set 740 741 742 743 QoS control field bits 15-8 of the last properly 744 received MPDU with a QoS control field embedded, with TID 745 == 10 746 747 qosctrl_15_8_tid11 748 749 Field only valid when Received_qos_data_tid_bitmap[11] 750 is set 751 752 753 754 QoS control field bits 15-8 of the last properly 755 received MPDU with a QoS control field embedded, with TID 756 == 11 757 758 qosctrl_15_8_tid12 759 760 Field only valid when Received_qos_data_tid_bitmap[12] 761 is set 762 763 764 765 QoS control field bits 15-8 of the last properly 766 received MPDU with a QoS control field embedded, with TID 767 == 12 768 769 qosctrl_15_8_tid13 770 771 Field only valid when Received_qos_data_tid_bitmap[13] 772 is set 773 774 775 776 QoS control field bits 15-8 of the last properly 777 received MPDU with a QoS control field embedded, with TID 778 == 13 779 780 qosctrl_15_8_tid14 781 782 Field only valid when Received_qos_data_tid_bitmap[14] 783 is set 784 785 786 787 QoS control field bits 15-8 of the last properly 788 received MPDU with a QoS control field embedded, with TID 789 == 14 790 791 qosctrl_15_8_tid15 792 793 Field only valid when Received_qos_data_tid_bitmap[15] 794 is set 795 796 797 798 QoS control field bits 15-8 of the last properly 799 received MPDU with a QoS control field embedded, with TID 800 == 15 801 802 mpdu_ok_byte_count 803 804 The number of bytes received within an MPDU for this 805 user with correct FCS. This includes the FCS field 806 807 808 809 NOTE: 810 811 The sum of the four fields..... 812 813 Mpdu_ok_byte_count + 814 815 mpdu_err_byte_count + 816 817 818 .....is the total number of bytes that were received for 819 this user from the PHY. 820 821 822 823 <legal all> 824 825 ampdu_delim_ok_count_6_0 826 827 Number of AMPDU delimiter received with correct 828 structure 829 830 LSB 7 bits from this counter 831 832 833 834 Note that this is a delimiter count and not byte count. 835 To get to the number of bytes occupied by these delimiters, 836 multiply this number by 4 837 838 839 840 <legal all> 841 842 ampdu_delim_err_count 843 844 The number of MPDU delimiter errors counted for this 845 user. 846 847 848 849 Note that this is a delimiter count and not byte count. 850 To get to the number of bytes occupied by these delimiters, 851 multiply this number by 4 852 853 <legal all> 854 855 ampdu_delim_ok_count_13_7 856 857 Number of AMPDU delimiters received with correct 858 structure 859 860 Bits 13-7 from this counter 861 862 863 864 Note that this is a delimiter count and not byte count. 865 To get to the number of bytes occupied by these delimiters, 866 multiply this number by 4 867 868 <legal all> 869 870 mpdu_err_byte_count 871 872 The number of bytes belonging to MPDUs with an FCS 873 error. This includes the FCS field. 874 875 876 877 <legal all> 878 879 ampdu_delim_ok_count_20_14 880 881 Number of AMPDU delimiters received with correct 882 structure 883 884 Bits 20-14 from this counter 885 886 887 888 Note that this is a delimiter count and not byte count. 889 To get to the number of bytes occupied by these delimiters, 890 multiply this number by 4 891 892 893 894 <legal all> 895 896 non_consecutive_delimiter_err 897 898 The number of times an MPDU delimiter error is detected 899 that is not immediately preceded by another MPDU delimiter 900 also with FCS error. 901 902 903 904 The counter saturates at 0xFFFF 905 906 907 908 <legal all> 909 910 reserved_20a 911 912 <legal 0> 913 914 ht_control_null_field 915 916 917 918 919 Last successfully received 920 HT_CONTROL/VHT_CONTROL/HE_CONTROL field from QoS Null frame 921 for this user. 922 923 <legal all> 924 925 sw_response_reference_ptr_ext 926 927 Extended Pointer that SW uses to refer back to an 928 expected response reception. Used for Rate adaptation 929 purposes. 930 931 When a reception occurrs that is not tied to an expected 932 response, this field is set to 0x0 933 934 935 936 Note: earlier on in this TLV there is also the field: 937 Sw_response_reference_ptr 938 939 <legal all> 940 */ 941 942 943 /* EXTERNAL REFERENCE : struct rx_rxpcu_classification_overview rxpcu_classification_details */ 944 945 946 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS 947 948 When set, at least one Filter Pass MPDU has been 949 received. FCS might or might not have been passing. 950 951 952 953 For MU UL, in TLVs RX_PPDU_END and 954 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 955 users. 956 957 <legal all> 958 */ 959 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_OFFSET 0x00000000 960 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_LSB 0 961 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_MASK 0x00000001 962 963 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK 964 965 When set, at least one Filter Pass MPDU has been 966 received that has a correct FCS. 967 968 969 970 For MU UL, in TLVs RX_PPDU_END and 971 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 972 users. 973 974 975 976 <legal all> 977 */ 978 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000 979 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_LSB 1 980 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002 981 982 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS 983 984 When set, at least one Monitor Direct MPDU has been 985 received. FCS might or might not have been passing 986 987 988 989 For MU UL, in TLVs RX_PPDU_END and 990 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 991 users. 992 993 <legal all> 994 */ 995 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000 996 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_LSB 2 997 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_MASK 0x00000004 998 999 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK 1000 1001 When set, at least one Monitor Direct MPDU has been 1002 received that has a correct FCS. 1003 1004 1005 1006 For MU UL, in TLVs RX_PPDU_END and 1007 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 1008 users. 1009 1010 1011 1012 <legal all> 1013 */ 1014 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000 1015 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3 1016 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008 1017 1018 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS 1019 1020 When set, at least one Monitor Direct MPDU has been 1021 received. FCS might or might not have been passing. 1022 1023 1024 1025 For MU UL, in TLVs RX_PPDU_END and 1026 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 1027 users. 1028 1029 <legal all> 1030 */ 1031 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_OFFSET 0x00000000 1032 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_LSB 4 1033 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_MASK 0x00000010 1034 1035 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK 1036 1037 When set, at least one Monitor Direct MPDU has been 1038 received that has a correct FCS. 1039 1040 1041 1042 For MU UL, in TLVs RX_PPDU_END and 1043 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 1044 users. 1045 1046 <legal all> 1047 */ 1048 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000 1049 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5 1050 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020 1051 1052 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED 1053 1054 When set, PPDU reception was aborted by the PHY 1055 1056 <legal all> 1057 */ 1058 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_OFFSET 0x00000000 1059 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_LSB 6 1060 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_MASK 0x00000040 1061 1062 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0 1063 1064 <legal 0> 1065 */ 1066 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_OFFSET 0x00000000 1067 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_LSB 7 1068 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_MASK 0x0000ff80 1069 1070 /* Description RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID 1071 1072 A ppdu counter value that PHY increments for every PPDU 1073 received. The counter value wraps around 1074 1075 <legal all> 1076 */ 1077 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_OFFSET 0x00000000 1078 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_LSB 16 1079 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_MASK 0xffff0000 1080 1081 /* Description RX_PPDU_END_USER_STATS_1_STA_FULL_AID 1082 1083 Consumer: FW 1084 1085 Producer: RXPCU 1086 1087 1088 1089 The full AID of this station. 1090 1091 1092 1093 <legal all> 1094 */ 1095 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_OFFSET 0x00000004 1096 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_LSB 0 1097 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_MASK 0x00001fff 1098 1099 /* Description RX_PPDU_END_USER_STATS_1_MCS 1100 1101 MCS of the received frame 1102 1103 1104 1105 For details, refer to MCS_TYPE description 1106 1107 Note: This is rate in case of 11a/11b 1108 1109 1110 1111 <legal all> 1112 */ 1113 #define RX_PPDU_END_USER_STATS_1_MCS_OFFSET 0x00000004 1114 #define RX_PPDU_END_USER_STATS_1_MCS_LSB 13 1115 #define RX_PPDU_END_USER_STATS_1_MCS_MASK 0x0001e000 1116 1117 /* Description RX_PPDU_END_USER_STATS_1_NSS 1118 1119 Number of spatial streams. 1120 1121 1122 1123 NOTE: RXPCU derives this from the 'Mimo_ss_bitmap' 1124 1125 1126 1127 <enum 0 1_spatial_stream>Single spatial stream 1128 1129 <enum 1 2_spatial_streams>2 spatial streams 1130 1131 <enum 2 3_spatial_streams>3 spatial streams 1132 1133 <enum 3 4_spatial_streams>4 spatial streams 1134 1135 <enum 4 5_spatial_streams>5 spatial streams 1136 1137 <enum 5 6_spatial_streams>6 spatial streams 1138 1139 <enum 6 7_spatial_streams>7 spatial streams 1140 1141 <enum 7 8_spatial_streams>8 spatial streams 1142 */ 1143 #define RX_PPDU_END_USER_STATS_1_NSS_OFFSET 0x00000004 1144 #define RX_PPDU_END_USER_STATS_1_NSS_LSB 17 1145 #define RX_PPDU_END_USER_STATS_1_NSS_MASK 0x000e0000 1146 1147 /* Description RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID 1148 1149 When set, ofdma RU related info in the following fields 1150 is valid 1151 1152 <legal all> 1153 */ 1154 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_OFFSET 0x00000004 1155 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_LSB 20 1156 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_MASK 0x00100000 1157 1158 /* Description RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX 1159 1160 Field only valid when Ofdma_info_valid is set 1161 1162 1163 1164 RU index number to which User is assigned 1165 1166 RU numbering is over the entire BW, starting from 0 1167 1168 <legal 0-73> 1169 */ 1170 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_OFFSET 0x00000004 1171 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_LSB 21 1172 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_MASK 0x0fe00000 1173 1174 /* Description RX_PPDU_END_USER_STATS_1_RESERVED_1A 1175 1176 <legal 0> 1177 */ 1178 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_OFFSET 0x00000004 1179 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_LSB 28 1180 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_MASK 0xf0000000 1181 1182 /* Description RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH 1183 1184 The size of the RU for this user. 1185 1186 In units of 1 (26 tone) RU 1187 1188 <legal 1-74> 1189 */ 1190 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_OFFSET 0x00000008 1191 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_LSB 0 1192 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_MASK 0x0000007f 1193 1194 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2A 1195 1196 <legal 0> 1197 */ 1198 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_OFFSET 0x00000008 1199 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_LSB 7 1200 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_MASK 0x00000080 1201 1202 /* Description RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY 1203 1204 RSSI / EVM for this user ??? 1205 1206 1207 1208 Details TBD 1209 1210 <legal all> 1211 */ 1212 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_OFFSET 0x00000008 1213 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_LSB 8 1214 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_MASK 0x0000ff00 1215 1216 /* Description RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR 1217 1218 The number of MPDUs received from this STA in this PPDU 1219 with FCS errors 1220 1221 <legal all> 1222 */ 1223 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_OFFSET 0x00000008 1224 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_LSB 16 1225 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_MASK 0x03ff0000 1226 1227 /* Description RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED 1228 1229 Field filled in by RXDMA 1230 1231 1232 1233 When set, RXDMA has used the wbm2rxdma_buf ring as 1234 source for at least one of the frames in this PPDU. 1235 */ 1236 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1237 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_LSB 26 1238 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_MASK 0x04000000 1239 1240 /* Description RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED 1241 1242 Field filled in by RXDMA 1243 1244 1245 1246 When set, RXDMA has used the fw2rxdma_buf ring as source 1247 for at least one of the frames in this PPDU. 1248 */ 1249 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1250 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_LSB 27 1251 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_MASK 0x08000000 1252 1253 /* Description RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED 1254 1255 Field filled in by RXDMA 1256 1257 1258 1259 When set, RXDMA has used the sw2rxdma_buf ring as source 1260 for at least one of the frames in this PPDU. 1261 */ 1262 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1263 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_LSB 28 1264 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_MASK 0x10000000 1265 1266 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2B 1267 1268 <legal 0> 1269 */ 1270 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_OFFSET 0x00000008 1271 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_LSB 29 1272 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_MASK 0xe0000000 1273 1274 /* Description RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK 1275 1276 The number of MPDUs received from this STA in this PPDU 1277 with correct FCS 1278 1279 <legal all> 1280 */ 1281 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_OFFSET 0x0000000c 1282 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_LSB 0 1283 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_MASK 0x000001ff 1284 1285 /* Description RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID 1286 1287 When set, the frame_control_info field contains valid 1288 information 1289 1290 <legal all> 1291 */ 1292 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_OFFSET 0x0000000c 1293 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_LSB 9 1294 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_MASK 0x00000200 1295 1296 /* Description RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID 1297 1298 When set, the QoS_control_info field contains valid 1299 information 1300 1301 <legal all> 1302 */ 1303 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_OFFSET 0x0000000c 1304 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_LSB 10 1305 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_MASK 0x00000400 1306 1307 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID 1308 1309 When set, the HT_control_field contains valid 1310 information 1311 1312 <legal all> 1313 */ 1314 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_OFFSET 0x0000000c 1315 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_LSB 11 1316 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_MASK 0x00000800 1317 1318 /* Description RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID 1319 1320 When set, the First_data_seq_ctrl field contains valid 1321 information 1322 1323 <legal all> 1324 */ 1325 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_OFFSET 0x0000000c 1326 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_LSB 12 1327 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_MASK 0x00001000 1328 1329 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID 1330 1331 When set, the HT_control_NULL_field contains valid 1332 information 1333 1334 <legal all> 1335 */ 1336 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_OFFSET 0x0000000c 1337 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_LSB 13 1338 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_MASK 0x00002000 1339 1340 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3A 1341 1342 <legal 0> 1343 */ 1344 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_OFFSET 0x0000000c 1345 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_LSB 14 1346 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_MASK 0x0000c000 1347 1348 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED 1349 1350 Field filled in by RXDMA 1351 1352 1353 1354 Set when at least one frame during this PPDU got pushed 1355 to this ring by RXDMA 1356 */ 1357 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_OFFSET 0x0000000c 1358 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_LSB 16 1359 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_MASK 0x00010000 1360 1361 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED 1362 1363 Field filled in by RXDMA 1364 1365 1366 1367 Set when at least one frame during this PPDU got pushed 1368 to this ring by RXDMA 1369 */ 1370 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_OFFSET 0x0000000c 1371 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_LSB 17 1372 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_MASK 0x00020000 1373 1374 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED 1375 1376 Field filled in by RXDMA 1377 1378 1379 1380 Set when at least one frame during this PPDU got pushed 1381 to this ring by RXDMA 1382 */ 1383 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_OFFSET 0x0000000c 1384 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_LSB 18 1385 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_MASK 0x00040000 1386 1387 /* Description RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED 1388 1389 Field filled in by RXDMA 1390 1391 1392 1393 Set when at least one frame during this PPDU got pushed 1394 to this ring by RXDMA 1395 */ 1396 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_OFFSET 0x0000000c 1397 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_LSB 19 1398 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_MASK 0x00080000 1399 1400 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE 1401 1402 Field only valid when HT_control_info_valid or 1403 HT_control_info_NULL_valid is set. 1404 1405 1406 1407 Indicates what the PHY receive type was for receiving 1408 this frame. Can help determine if the HT_CONTROL field shall 1409 be interpreted as HT/VHT or HE. 1410 1411 1412 1413 NOTE: later on in the 11ax IEEE spec a bit within the HT 1414 control field was introduced that explicitly indicated how 1415 to interpret the HT control field.... As HT, VHT, or HE. 1416 1417 1418 1419 <enum 0 dot11a>802.11a PPDU type 1420 1421 <enum 1 dot11b>802.11b PPDU type 1422 1423 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 1424 1425 <enum 3 dot11ac>802.11ac PPDU type 1426 1427 <enum 4 dot11ax>802.11ax PPDU type 1428 */ 1429 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_OFFSET 0x0000000c 1430 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_LSB 20 1431 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_MASK 0x00f00000 1432 1433 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3B 1434 1435 <legal 0> 1436 */ 1437 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_OFFSET 0x0000000c 1438 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_LSB 24 1439 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_MASK 0xff000000 1440 1441 /* Description RX_PPDU_END_USER_STATS_4_AST_INDEX 1442 1443 This field indicates the index of the AST entry 1444 corresponding to this MPDU. It is provided by the GSE module 1445 instantiated in RXPCU. 1446 1447 A value of 0xFFFF indicates an invalid AST index, 1448 meaning that No AST entry was found or NO AST search was 1449 performed 1450 1451 <legal all> 1452 */ 1453 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_OFFSET 0x00000010 1454 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_LSB 0 1455 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_MASK 0x0000ffff 1456 1457 /* Description RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD 1458 1459 Field only valid when Frame_control_info_valid is set. 1460 1461 1462 1463 Last successfully received Frame_control field of data 1464 frame (excluding Data NULL/ QoS Null) for this user 1465 1466 Mainly used to track the PM state of the transmitted 1467 device 1468 1469 1470 1471 NOTE: only data frame info is needed, as control and 1472 management frames are already routed to the FW. 1473 1474 <legal all> 1475 */ 1476 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_OFFSET 0x00000010 1477 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_LSB 16 1478 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_MASK 0xffff0000 1479 1480 /* Description RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL 1481 1482 Field only valid when Data_sequence_control_info_valid 1483 is set. 1484 1485 1486 1487 Sequence control field of the first data frame 1488 (excluding Data NULL or QoS Data null) received for this 1489 user with correct FCS 1490 1491 1492 1493 NOTE: only data frame info is needed, as control and 1494 management frames are already routed to the FW. 1495 1496 <legal all> 1497 */ 1498 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_OFFSET 0x00000014 1499 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_LSB 0 1500 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_MASK 0x0000ffff 1501 1502 /* Description RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD 1503 1504 Field only valid when QoS_control_info_valid is set. 1505 1506 1507 1508 Last successfully received QoS_control field of data 1509 frame (excluding Data NULL/ QoS Null) for this user 1510 1511 1512 1513 Note that in case of multi TID, this field can only 1514 reflect the last properly received MPDU, and thus can not 1515 indicate all potentially different TIDs that had been 1516 received earlier. 1517 1518 1519 1520 There are however per TID fields, that will contain 1521 among other things all buffer status info: See 1522 1523 QoSCtrl_15_8_tid??? 1524 1525 <legal all> 1526 */ 1527 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_OFFSET 0x00000014 1528 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_LSB 16 1529 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_MASK 0xffff0000 1530 1531 /* Description RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD 1532 1533 Field only valid when HT_control_info_valid is set. 1534 1535 1536 1537 Last successfully received 1538 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 1539 excluding QoS Null frames for this user. 1540 1541 1542 1543 NOTE: HT control fields from QoS Null frames are 1544 captured in field HT_control_NULL_field 1545 1546 <legal all> 1547 */ 1548 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_OFFSET 0x00000018 1549 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_LSB 0 1550 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_MASK 0xffffffff 1551 1552 /* Description RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0 1553 1554 Bitmap indicates in order of received MPDUs, which MPDUs 1555 had an passing FCS or had an error. 1556 1557 1: FCS OK 1558 1559 0: FCS error 1560 1561 <legal all> 1562 */ 1563 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_OFFSET 0x0000001c 1564 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_LSB 0 1565 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_MASK 0xffffffff 1566 1567 /* Description RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32 1568 1569 Bitmap indicates in order of received MPDUs, which MPDUs 1570 had an passing FCS or had an error. 1571 1572 1: FCS OK 1573 1574 0: FCS error 1575 1576 1577 1578 NOTE: for users 0, 1, 2 and 3, additional bitmap info 1579 (up to 256 bitmap window) is provided in 1580 RX_PPDU_END_USER_STATS_EXT TLV 1581 1582 <legal all> 1583 */ 1584 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_OFFSET 0x00000020 1585 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_LSB 0 1586 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_MASK 0xffffffff 1587 1588 /* Description RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT 1589 1590 Field filled in by RX OLE 1591 1592 Set to 0 by RXPCU 1593 1594 1595 1596 The number of MSDUs that are part of MPDUs without FCS 1597 error, that contain UDP frames. 1598 1599 <legal all> 1600 */ 1601 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_OFFSET 0x00000024 1602 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_LSB 0 1603 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_MASK 0x0000ffff 1604 1605 /* Description RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT 1606 1607 Field filled in by RX OLE 1608 1609 Set to 0 by RXPCU 1610 1611 1612 1613 The number of MSDUs that are part of MPDUs without FCS 1614 error, that contain TCP frames. 1615 1616 1617 1618 (Note: This does NOT include TCP-ACK) 1619 1620 <legal all> 1621 */ 1622 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_OFFSET 0x00000024 1623 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_LSB 16 1624 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_MASK 0xffff0000 1625 1626 /* Description RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT 1627 1628 Field filled in by RX OLE 1629 1630 Set to 0 by RXPCU 1631 1632 1633 1634 The number of MSDUs that are part of MPDUs without FCS 1635 error, that contain neither UDP or TCP frames. 1636 1637 1638 1639 Includes Management and control frames. 1640 1641 1642 1643 <legal all> 1644 */ 1645 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_OFFSET 0x00000028 1646 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_LSB 0 1647 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_MASK 0x0000ffff 1648 1649 /* Description RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT 1650 1651 Field filled in by RX OLE 1652 1653 Set to 0 by RXPCU 1654 1655 1656 1657 The number of MSDUs that are part of MPDUs without FCS 1658 error, that contain TCP ack frames. 1659 1660 <legal all> 1661 */ 1662 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_OFFSET 0x00000028 1663 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_LSB 16 1664 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_MASK 0xffff0000 1665 1666 /* Description RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR 1667 1668 Pointer that SW uses to refer back to an expected 1669 response reception. Used for Rate adaptation purposes. 1670 1671 When a reception occurrs that is not tied to an expected 1672 response, this field is set to 0x0 1673 1674 1675 1676 Note: further on in this TLV there is also the field: 1677 Sw_response_reference_ptr 1678 1679 <legal all> 1680 */ 1681 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_OFFSET 0x0000002c 1682 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_LSB 0 1683 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_MASK 0xffffffff 1684 1685 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP 1686 1687 Whenever a frame is received that contains a QoS control 1688 field (that includes QoS Data and/or QoS Null), the bit in 1689 this field that corresponds to the received TID shall be 1690 set. 1691 1692 ...Bitmap[0] = TID0 1693 1694 ...Bitmap[1] = TID1 1695 1696 Etc. 1697 1698 <legal all> 1699 */ 1700 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_OFFSET 0x00000030 1701 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_LSB 0 1702 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_MASK 0x0000ffff 1703 1704 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP 1705 1706 Field initialized to 0 1707 1708 For every QoS Data frame that is correctly received, the 1709 EOSP bit of that frame is copied over into the corresponding 1710 TID related field. 1711 1712 Note that this implies that the bits here represent the 1713 EOSP bit status for each TID of the last MPDU received for 1714 that TID. 1715 1716 1717 1718 received TID shall be set. 1719 1720 ...eosp_bitmap[0] = eosp of TID0 1721 1722 ...eosp_bitmap[1] = eosp of TID1 1723 1724 Etc. 1725 1726 <legal all> 1727 */ 1728 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_OFFSET 0x00000030 1729 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_LSB 16 1730 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_MASK 0xffff0000 1731 1732 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0 1733 1734 Field only valid when Received_qos_data_tid_bitmap[0] is 1735 set 1736 1737 1738 1739 QoS control field bits 15-8 of the last properly 1740 received MPDU with a QoS control field embedded, with TID 1741 == 0 1742 */ 1743 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_OFFSET 0x00000034 1744 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_LSB 0 1745 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_MASK 0x000000ff 1746 1747 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1 1748 1749 Field only valid when Received_qos_data_tid_bitmap[1] is 1750 set 1751 1752 1753 1754 QoS control field bits 15-8 of the last properly 1755 received MPDU with a QoS control field embedded, with TID 1756 == 1 1757 */ 1758 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_OFFSET 0x00000034 1759 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_LSB 8 1760 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_MASK 0x0000ff00 1761 1762 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2 1763 1764 Field only valid when Received_qos_data_tid_bitmap[2] is 1765 set 1766 1767 1768 1769 QoS control field bits 15-8 of the last properly 1770 received MPDU with a QoS control field embedded, with TID 1771 == 2 1772 */ 1773 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_OFFSET 0x00000034 1774 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_LSB 16 1775 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_MASK 0x00ff0000 1776 1777 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3 1778 1779 Field only valid when Received_qos_data_tid_bitmap[3] is 1780 set 1781 1782 1783 1784 QoS control field bits 15-8 of the last properly 1785 received MPDU with a QoS control field embedded, with TID 1786 == 3 1787 */ 1788 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_OFFSET 0x00000034 1789 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_LSB 24 1790 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_MASK 0xff000000 1791 1792 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4 1793 1794 Field only valid when Received_qos_data_tid_bitmap[4] is 1795 set 1796 1797 1798 1799 QoS control field bits 15-8 of the last properly 1800 received MPDU with a QoS control field embedded, with TID 1801 == 4 1802 */ 1803 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_OFFSET 0x00000038 1804 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_LSB 0 1805 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_MASK 0x000000ff 1806 1807 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5 1808 1809 Field only valid when Received_qos_data_tid_bitmap[5] is 1810 set 1811 1812 1813 1814 QoS control field bits 15-8 of the last properly 1815 received MPDU with a QoS control field embedded, with TID 1816 == 5 1817 */ 1818 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_OFFSET 0x00000038 1819 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_LSB 8 1820 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_MASK 0x0000ff00 1821 1822 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6 1823 1824 Field only valid when Received_qos_data_tid_bitmap[6] is 1825 set 1826 1827 1828 1829 QoS control field bits 15-8 of the last properly 1830 received MPDU with a QoS control field embedded, with TID 1831 == 6 1832 */ 1833 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_OFFSET 0x00000038 1834 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_LSB 16 1835 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_MASK 0x00ff0000 1836 1837 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7 1838 1839 Field only valid when Received_qos_data_tid_bitmap[7] is 1840 set 1841 1842 1843 1844 QoS control field bits 15-8 of the last properly 1845 received MPDU with a QoS control field embedded, with TID 1846 == 7 1847 */ 1848 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_OFFSET 0x00000038 1849 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_LSB 24 1850 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_MASK 0xff000000 1851 1852 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8 1853 1854 Field only valid when Received_qos_data_tid_bitmap[8] is 1855 set 1856 1857 1858 1859 QoS control field bits 15-8 of the last properly 1860 received MPDU with a QoS control field embedded, with TID 1861 == 8 1862 */ 1863 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_OFFSET 0x0000003c 1864 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_LSB 0 1865 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_MASK 0x000000ff 1866 1867 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9 1868 1869 Field only valid when Received_qos_data_tid_bitmap[9] is 1870 set 1871 1872 1873 1874 QoS control field bits 15-8 of the last properly 1875 received MPDU with a QoS control field embedded, with TID 1876 == 9 1877 */ 1878 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_OFFSET 0x0000003c 1879 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_LSB 8 1880 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_MASK 0x0000ff00 1881 1882 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10 1883 1884 Field only valid when Received_qos_data_tid_bitmap[10] 1885 is set 1886 1887 1888 1889 QoS control field bits 15-8 of the last properly 1890 received MPDU with a QoS control field embedded, with TID 1891 == 10 1892 */ 1893 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_OFFSET 0x0000003c 1894 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_LSB 16 1895 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_MASK 0x00ff0000 1896 1897 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11 1898 1899 Field only valid when Received_qos_data_tid_bitmap[11] 1900 is set 1901 1902 1903 1904 QoS control field bits 15-8 of the last properly 1905 received MPDU with a QoS control field embedded, with TID 1906 == 11 1907 */ 1908 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_OFFSET 0x0000003c 1909 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_LSB 24 1910 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_MASK 0xff000000 1911 1912 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12 1913 1914 Field only valid when Received_qos_data_tid_bitmap[12] 1915 is set 1916 1917 1918 1919 QoS control field bits 15-8 of the last properly 1920 received MPDU with a QoS control field embedded, with TID 1921 == 12 1922 */ 1923 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_OFFSET 0x00000040 1924 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_LSB 0 1925 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_MASK 0x000000ff 1926 1927 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13 1928 1929 Field only valid when Received_qos_data_tid_bitmap[13] 1930 is set 1931 1932 1933 1934 QoS control field bits 15-8 of the last properly 1935 received MPDU with a QoS control field embedded, with TID 1936 == 13 1937 */ 1938 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_OFFSET 0x00000040 1939 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_LSB 8 1940 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_MASK 0x0000ff00 1941 1942 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14 1943 1944 Field only valid when Received_qos_data_tid_bitmap[14] 1945 is set 1946 1947 1948 1949 QoS control field bits 15-8 of the last properly 1950 received MPDU with a QoS control field embedded, with TID 1951 == 14 1952 */ 1953 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_OFFSET 0x00000040 1954 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_LSB 16 1955 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_MASK 0x00ff0000 1956 1957 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15 1958 1959 Field only valid when Received_qos_data_tid_bitmap[15] 1960 is set 1961 1962 1963 1964 QoS control field bits 15-8 of the last properly 1965 received MPDU with a QoS control field embedded, with TID 1966 == 15 1967 */ 1968 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_OFFSET 0x00000040 1969 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_LSB 24 1970 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_MASK 0xff000000 1971 1972 /* Description RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT 1973 1974 The number of bytes received within an MPDU for this 1975 user with correct FCS. This includes the FCS field 1976 1977 1978 1979 NOTE: 1980 1981 The sum of the four fields..... 1982 1983 Mpdu_ok_byte_count + 1984 1985 mpdu_err_byte_count + 1986 1987 1988 .....is the total number of bytes that were received for 1989 this user from the PHY. 1990 1991 1992 1993 <legal all> 1994 */ 1995 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_OFFSET 0x00000044 1996 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_LSB 0 1997 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_MASK 0x01ffffff 1998 1999 /* Description RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0 2000 2001 Number of AMPDU delimiter received with correct 2002 structure 2003 2004 LSB 7 bits from this counter 2005 2006 2007 2008 Note that this is a delimiter count and not byte count. 2009 To get to the number of bytes occupied by these delimiters, 2010 multiply this number by 4 2011 2012 2013 2014 <legal all> 2015 */ 2016 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_OFFSET 0x00000044 2017 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_LSB 25 2018 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_MASK 0xfe000000 2019 2020 /* Description RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT 2021 2022 The number of MPDU delimiter errors counted for this 2023 user. 2024 2025 2026 2027 Note that this is a delimiter count and not byte count. 2028 To get to the number of bytes occupied by these delimiters, 2029 multiply this number by 4 2030 2031 <legal all> 2032 */ 2033 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_OFFSET 0x00000048 2034 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_LSB 0 2035 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_MASK 0x01ffffff 2036 2037 /* Description RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7 2038 2039 Number of AMPDU delimiters received with correct 2040 structure 2041 2042 Bits 13-7 from this counter 2043 2044 2045 2046 Note that this is a delimiter count and not byte count. 2047 To get to the number of bytes occupied by these delimiters, 2048 multiply this number by 4 2049 2050 <legal all> 2051 */ 2052 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_OFFSET 0x00000048 2053 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_LSB 25 2054 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_MASK 0xfe000000 2055 2056 /* Description RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT 2057 2058 The number of bytes belonging to MPDUs with an FCS 2059 error. This includes the FCS field. 2060 2061 2062 2063 <legal all> 2064 */ 2065 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_OFFSET 0x0000004c 2066 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_LSB 0 2067 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_MASK 0x01ffffff 2068 2069 /* Description RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14 2070 2071 Number of AMPDU delimiters received with correct 2072 structure 2073 2074 Bits 20-14 from this counter 2075 2076 2077 2078 Note that this is a delimiter count and not byte count. 2079 To get to the number of bytes occupied by these delimiters, 2080 multiply this number by 4 2081 2082 2083 2084 <legal all> 2085 */ 2086 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_OFFSET 0x0000004c 2087 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_LSB 25 2088 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_MASK 0xfe000000 2089 2090 /* Description RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR 2091 2092 The number of times an MPDU delimiter error is detected 2093 that is not immediately preceded by another MPDU delimiter 2094 also with FCS error. 2095 2096 2097 2098 The counter saturates at 0xFFFF 2099 2100 2101 2102 <legal all> 2103 */ 2104 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_OFFSET 0x00000050 2105 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_LSB 0 2106 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_MASK 0x0000ffff 2107 2108 /* Description RX_PPDU_END_USER_STATS_20_RESERVED_20A 2109 2110 <legal 0> 2111 */ 2112 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_OFFSET 0x00000050 2113 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_LSB 16 2114 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_MASK 0xffff0000 2115 2116 /* Description RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD 2117 2118 2119 2120 2121 Last successfully received 2122 HT_CONTROL/VHT_CONTROL/HE_CONTROL field from QoS Null frame 2123 for this user. 2124 2125 <legal all> 2126 */ 2127 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_OFFSET 0x00000054 2128 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_LSB 0 2129 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_MASK 0xffffffff 2130 2131 /* Description RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT 2132 2133 Extended Pointer that SW uses to refer back to an 2134 expected response reception. Used for Rate adaptation 2135 purposes. 2136 2137 When a reception occurrs that is not tied to an expected 2138 response, this field is set to 0x0 2139 2140 2141 2142 Note: earlier on in this TLV there is also the field: 2143 Sw_response_reference_ptr 2144 2145 <legal all> 2146 */ 2147 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_OFFSET 0x00000058 2148 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_LSB 0 2149 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_MASK 0xffffffff 2150 2151 2152 #endif // _RX_PPDU_END_USER_STATS_H_ 2153