1 /* 2 * Copyright (c) 2021 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 // $ATH_LICENSE_HW_HDR_C$ 18 // 19 // DO NOT EDIT! This file is automatically generated 20 // These definitions are tied to a particular hardware layout 21 22 23 #ifndef _RX_PPDU_END_USER_STATS_EXT_H_ 24 #define _RX_PPDU_END_USER_STATS_EXT_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 #include "rx_rxpcu_classification_overview.h" 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0 struct rx_rxpcu_classification_overview rxpcu_classification_details; 34 // 1 fcs_ok_bitmap_95_64[31:0] 35 // 2 fcs_ok_bitmap_127_96[31:0] 36 // 3 fcs_ok_bitmap_159_128[31:0] 37 // 4 fcs_ok_bitmap_191_160[31:0] 38 // 5 fcs_ok_bitmap_223_192[31:0] 39 // 6 fcs_ok_bitmap_255_224[31:0] 40 // 41 // ################ END SUMMARY ################# 42 43 #define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS_EXT 7 44 45 struct rx_ppdu_end_user_stats_ext { 46 struct rx_rxpcu_classification_overview rxpcu_classification_details; 47 uint32_t fcs_ok_bitmap_95_64 : 32; //[31:0] 48 uint32_t fcs_ok_bitmap_127_96 : 32; //[31:0] 49 uint32_t fcs_ok_bitmap_159_128 : 32; //[31:0] 50 uint32_t fcs_ok_bitmap_191_160 : 32; //[31:0] 51 uint32_t fcs_ok_bitmap_223_192 : 32; //[31:0] 52 uint32_t fcs_ok_bitmap_255_224 : 32; //[31:0] 53 }; 54 55 /* 56 57 struct rx_rxpcu_classification_overview rxpcu_classification_details 58 59 Details related to what RXPCU classification types of 60 MPDUs have been received 61 62 fcs_ok_bitmap_95_64 63 64 Bitmap indicates in order of received MPDUs, which MPDUs 65 had an passing FCS or had an error. 66 67 1: FCS OK 68 69 0: FCS error 70 71 <legal all> 72 73 fcs_ok_bitmap_127_96 74 75 Bitmap indicates in order of received MPDUs, which MPDUs 76 had an passing FCS or had an error. 77 78 1: FCS OK 79 80 0: FCS error 81 82 <legal all> 83 84 fcs_ok_bitmap_159_128 85 86 Bitmap indicates in order of received MPDUs, which MPDUs 87 had an passing FCS or had an error. 88 89 1: FCS OK 90 91 0: FCS error 92 93 <legal all> 94 95 fcs_ok_bitmap_191_160 96 97 Bitmap indicates in order of received MPDUs, which MPDUs 98 had an passing FCS or had an error. 99 100 1: FCS OK 101 102 0: FCS error 103 104 <legal all> 105 106 fcs_ok_bitmap_223_192 107 108 Bitmap indicates in order of received MPDUs, which MPDUs 109 had an passing FCS or had an error. 110 111 1: FCS OK 112 113 0: FCS error 114 115 <legal all> 116 117 fcs_ok_bitmap_255_224 118 119 Bitmap indicates in order of received MPDUs, which MPDUs 120 had an passing FCS or had an error. 121 122 1: FCS OK 123 124 0: FCS error 125 126 <legal all> 127 */ 128 129 130 /* EXTERNAL REFERENCE : struct rx_rxpcu_classification_overview rxpcu_classification_details */ 131 132 133 /* Description RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS 134 135 When set, at least one Filter Pass MPDU has been 136 received. FCS might or might not have been passing. 137 138 139 140 For MU UL, in TLVs RX_PPDU_END and 141 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 142 users. 143 144 <legal all> 145 */ 146 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_OFFSET 0x00000000 147 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_LSB 0 148 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_MASK 0x00000001 149 150 /* Description RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK 151 152 When set, at least one Filter Pass MPDU has been 153 received that has a correct FCS. 154 155 156 157 For MU UL, in TLVs RX_PPDU_END and 158 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 159 users. 160 161 162 163 <legal all> 164 */ 165 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000 166 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_LSB 1 167 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002 168 169 /* Description RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS 170 171 When set, at least one Monitor Direct MPDU has been 172 received. FCS might or might not have been passing 173 174 175 176 For MU UL, in TLVs RX_PPDU_END and 177 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 178 users. 179 180 <legal all> 181 */ 182 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000 183 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_LSB 2 184 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_MASK 0x00000004 185 186 /* Description RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK 187 188 When set, at least one Monitor Direct MPDU has been 189 received that has a correct FCS. 190 191 192 193 For MU UL, in TLVs RX_PPDU_END and 194 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 195 users. 196 197 198 199 <legal all> 200 */ 201 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000 202 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3 203 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008 204 205 /* Description RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS 206 207 When set, at least one Monitor Direct MPDU has been 208 received. FCS might or might not have been passing. 209 210 211 212 For MU UL, in TLVs RX_PPDU_END and 213 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 214 users. 215 216 <legal all> 217 */ 218 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_OFFSET 0x00000000 219 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_LSB 4 220 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_MASK 0x00000010 221 222 /* Description RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK 223 224 When set, at least one Monitor Direct MPDU has been 225 received that has a correct FCS. 226 227 228 229 For MU UL, in TLVs RX_PPDU_END and 230 RX_PPDU_END_STATUS_DONE, this field is the OR of all the 231 users. 232 233 <legal all> 234 */ 235 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000 236 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5 237 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020 238 239 /* Description RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED 240 241 When set, PPDU reception was aborted by the PHY 242 243 <legal all> 244 */ 245 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_OFFSET 0x00000000 246 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_LSB 6 247 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_MASK 0x00000040 248 249 /* Description RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0 250 251 <legal 0> 252 */ 253 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_OFFSET 0x00000000 254 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_LSB 7 255 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_MASK 0x0000ff80 256 257 /* Description RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID 258 259 A ppdu counter value that PHY increments for every PPDU 260 received. The counter value wraps around 261 262 <legal all> 263 */ 264 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_OFFSET 0x00000000 265 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_LSB 16 266 #define RX_PPDU_END_USER_STATS_EXT_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_MASK 0xffff0000 267 268 /* Description RX_PPDU_END_USER_STATS_EXT_1_FCS_OK_BITMAP_95_64 269 270 Bitmap indicates in order of received MPDUs, which MPDUs 271 had an passing FCS or had an error. 272 273 1: FCS OK 274 275 0: FCS error 276 277 <legal all> 278 */ 279 #define RX_PPDU_END_USER_STATS_EXT_1_FCS_OK_BITMAP_95_64_OFFSET 0x00000004 280 #define RX_PPDU_END_USER_STATS_EXT_1_FCS_OK_BITMAP_95_64_LSB 0 281 #define RX_PPDU_END_USER_STATS_EXT_1_FCS_OK_BITMAP_95_64_MASK 0xffffffff 282 283 /* Description RX_PPDU_END_USER_STATS_EXT_2_FCS_OK_BITMAP_127_96 284 285 Bitmap indicates in order of received MPDUs, which MPDUs 286 had an passing FCS or had an error. 287 288 1: FCS OK 289 290 0: FCS error 291 292 <legal all> 293 */ 294 #define RX_PPDU_END_USER_STATS_EXT_2_FCS_OK_BITMAP_127_96_OFFSET 0x00000008 295 #define RX_PPDU_END_USER_STATS_EXT_2_FCS_OK_BITMAP_127_96_LSB 0 296 #define RX_PPDU_END_USER_STATS_EXT_2_FCS_OK_BITMAP_127_96_MASK 0xffffffff 297 298 /* Description RX_PPDU_END_USER_STATS_EXT_3_FCS_OK_BITMAP_159_128 299 300 Bitmap indicates in order of received MPDUs, which MPDUs 301 had an passing FCS or had an error. 302 303 1: FCS OK 304 305 0: FCS error 306 307 <legal all> 308 */ 309 #define RX_PPDU_END_USER_STATS_EXT_3_FCS_OK_BITMAP_159_128_OFFSET 0x0000000c 310 #define RX_PPDU_END_USER_STATS_EXT_3_FCS_OK_BITMAP_159_128_LSB 0 311 #define RX_PPDU_END_USER_STATS_EXT_3_FCS_OK_BITMAP_159_128_MASK 0xffffffff 312 313 /* Description RX_PPDU_END_USER_STATS_EXT_4_FCS_OK_BITMAP_191_160 314 315 Bitmap indicates in order of received MPDUs, which MPDUs 316 had an passing FCS or had an error. 317 318 1: FCS OK 319 320 0: FCS error 321 322 <legal all> 323 */ 324 #define RX_PPDU_END_USER_STATS_EXT_4_FCS_OK_BITMAP_191_160_OFFSET 0x00000010 325 #define RX_PPDU_END_USER_STATS_EXT_4_FCS_OK_BITMAP_191_160_LSB 0 326 #define RX_PPDU_END_USER_STATS_EXT_4_FCS_OK_BITMAP_191_160_MASK 0xffffffff 327 328 /* Description RX_PPDU_END_USER_STATS_EXT_5_FCS_OK_BITMAP_223_192 329 330 Bitmap indicates in order of received MPDUs, which MPDUs 331 had an passing FCS or had an error. 332 333 1: FCS OK 334 335 0: FCS error 336 337 <legal all> 338 */ 339 #define RX_PPDU_END_USER_STATS_EXT_5_FCS_OK_BITMAP_223_192_OFFSET 0x00000014 340 #define RX_PPDU_END_USER_STATS_EXT_5_FCS_OK_BITMAP_223_192_LSB 0 341 #define RX_PPDU_END_USER_STATS_EXT_5_FCS_OK_BITMAP_223_192_MASK 0xffffffff 342 343 /* Description RX_PPDU_END_USER_STATS_EXT_6_FCS_OK_BITMAP_255_224 344 345 Bitmap indicates in order of received MPDUs, which MPDUs 346 had an passing FCS or had an error. 347 348 1: FCS OK 349 350 0: FCS error 351 352 <legal all> 353 */ 354 #define RX_PPDU_END_USER_STATS_EXT_6_FCS_OK_BITMAP_255_224_OFFSET 0x00000018 355 #define RX_PPDU_END_USER_STATS_EXT_6_FCS_OK_BITMAP_255_224_LSB 0 356 #define RX_PPDU_END_USER_STATS_EXT_6_FCS_OK_BITMAP_255_224_MASK 0xffffffff 357 358 359 #endif // _RX_PPDU_END_USER_STATS_EXT_H_ 360