1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name #ifndef _REO_FLUSH_CACHE_H_ 19*5113495bSYour Name #define _REO_FLUSH_CACHE_H_ 20*5113495bSYour Name 21*5113495bSYour Name #include "uniform_reo_cmd_header.h" 22*5113495bSYour Name #define NUM_OF_DWORDS_REO_FLUSH_CACHE 9 23*5113495bSYour Name 24*5113495bSYour Name struct reo_flush_cache { 25*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 26*5113495bSYour Name struct uniform_reo_cmd_header cmd_header; 27*5113495bSYour Name uint32_t flush_addr_31_0 : 32; 28*5113495bSYour Name uint32_t flush_addr_39_32 : 8, 29*5113495bSYour Name forward_all_mpdus_in_queue : 1, 30*5113495bSYour Name release_cache_block_index : 1, 31*5113495bSYour Name cache_block_resource_index : 2, 32*5113495bSYour Name flush_without_invalidate : 1, 33*5113495bSYour Name block_cache_usage_after_flush : 1, 34*5113495bSYour Name flush_entire_cache : 1, 35*5113495bSYour Name flush_queue_1k_desc : 1, 36*5113495bSYour Name reserved_2b : 16; 37*5113495bSYour Name uint32_t reserved_3a : 32; 38*5113495bSYour Name uint32_t reserved_4a : 32; 39*5113495bSYour Name uint32_t reserved_5a : 32; 40*5113495bSYour Name uint32_t reserved_6a : 32; 41*5113495bSYour Name uint32_t reserved_7a : 32; 42*5113495bSYour Name uint32_t reserved_8a : 32; 43*5113495bSYour Name #else 44*5113495bSYour Name struct uniform_reo_cmd_header cmd_header; 45*5113495bSYour Name uint32_t flush_addr_31_0 : 32; 46*5113495bSYour Name uint32_t reserved_2b : 16, 47*5113495bSYour Name flush_queue_1k_desc : 1, 48*5113495bSYour Name flush_entire_cache : 1, 49*5113495bSYour Name block_cache_usage_after_flush : 1, 50*5113495bSYour Name flush_without_invalidate : 1, 51*5113495bSYour Name cache_block_resource_index : 2, 52*5113495bSYour Name release_cache_block_index : 1, 53*5113495bSYour Name forward_all_mpdus_in_queue : 1, 54*5113495bSYour Name flush_addr_39_32 : 8; 55*5113495bSYour Name uint32_t reserved_3a : 32; 56*5113495bSYour Name uint32_t reserved_4a : 32; 57*5113495bSYour Name uint32_t reserved_5a : 32; 58*5113495bSYour Name uint32_t reserved_6a : 32; 59*5113495bSYour Name uint32_t reserved_7a : 32; 60*5113495bSYour Name uint32_t reserved_8a : 32; 61*5113495bSYour Name #endif 62*5113495bSYour Name }; 63*5113495bSYour Name 64*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x00000000 65*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_REO_CMD_NUMBER_LSB 0 66*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_REO_CMD_NUMBER_MSB 15 67*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_REO_CMD_NUMBER_MASK 0x0000ffff 68*5113495bSYour Name 69*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET 0x00000000 70*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_LSB 16 71*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_MSB 16 72*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_MASK 0x00010000 73*5113495bSYour Name 74*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_RESERVED_0A_OFFSET 0x00000000 75*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_RESERVED_0A_LSB 17 76*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_RESERVED_0A_MSB 31 77*5113495bSYour Name #define REO_FLUSH_CACHE_CMD_HEADER_RESERVED_0A_MASK 0xfffe0000 78*5113495bSYour Name 79*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ADDR_31_0_OFFSET 0x00000004 80*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ADDR_31_0_LSB 0 81*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ADDR_31_0_MSB 31 82*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ADDR_31_0_MASK 0xffffffff 83*5113495bSYour Name 84*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ADDR_39_32_OFFSET 0x00000008 85*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ADDR_39_32_LSB 0 86*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ADDR_39_32_MSB 7 87*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ADDR_39_32_MASK 0x000000ff 88*5113495bSYour Name 89*5113495bSYour Name #define REO_FLUSH_CACHE_FORWARD_ALL_MPDUS_IN_QUEUE_OFFSET 0x00000008 90*5113495bSYour Name #define REO_FLUSH_CACHE_FORWARD_ALL_MPDUS_IN_QUEUE_LSB 8 91*5113495bSYour Name #define REO_FLUSH_CACHE_FORWARD_ALL_MPDUS_IN_QUEUE_MSB 8 92*5113495bSYour Name #define REO_FLUSH_CACHE_FORWARD_ALL_MPDUS_IN_QUEUE_MASK 0x00000100 93*5113495bSYour Name 94*5113495bSYour Name #define REO_FLUSH_CACHE_RELEASE_CACHE_BLOCK_INDEX_OFFSET 0x00000008 95*5113495bSYour Name #define REO_FLUSH_CACHE_RELEASE_CACHE_BLOCK_INDEX_LSB 9 96*5113495bSYour Name #define REO_FLUSH_CACHE_RELEASE_CACHE_BLOCK_INDEX_MSB 9 97*5113495bSYour Name #define REO_FLUSH_CACHE_RELEASE_CACHE_BLOCK_INDEX_MASK 0x00000200 98*5113495bSYour Name 99*5113495bSYour Name #define REO_FLUSH_CACHE_CACHE_BLOCK_RESOURCE_INDEX_OFFSET 0x00000008 100*5113495bSYour Name #define REO_FLUSH_CACHE_CACHE_BLOCK_RESOURCE_INDEX_LSB 10 101*5113495bSYour Name #define REO_FLUSH_CACHE_CACHE_BLOCK_RESOURCE_INDEX_MSB 11 102*5113495bSYour Name #define REO_FLUSH_CACHE_CACHE_BLOCK_RESOURCE_INDEX_MASK 0x00000c00 103*5113495bSYour Name 104*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_WITHOUT_INVALIDATE_OFFSET 0x00000008 105*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_WITHOUT_INVALIDATE_LSB 12 106*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_WITHOUT_INVALIDATE_MSB 12 107*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_WITHOUT_INVALIDATE_MASK 0x00001000 108*5113495bSYour Name 109*5113495bSYour Name #define REO_FLUSH_CACHE_BLOCK_CACHE_USAGE_AFTER_FLUSH_OFFSET 0x00000008 110*5113495bSYour Name #define REO_FLUSH_CACHE_BLOCK_CACHE_USAGE_AFTER_FLUSH_LSB 13 111*5113495bSYour Name #define REO_FLUSH_CACHE_BLOCK_CACHE_USAGE_AFTER_FLUSH_MSB 13 112*5113495bSYour Name #define REO_FLUSH_CACHE_BLOCK_CACHE_USAGE_AFTER_FLUSH_MASK 0x00002000 113*5113495bSYour Name 114*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ENTIRE_CACHE_OFFSET 0x00000008 115*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ENTIRE_CACHE_LSB 14 116*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ENTIRE_CACHE_MSB 14 117*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_ENTIRE_CACHE_MASK 0x00004000 118*5113495bSYour Name 119*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_QUEUE_1K_DESC_OFFSET 0x00000008 120*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_QUEUE_1K_DESC_LSB 15 121*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_QUEUE_1K_DESC_MSB 15 122*5113495bSYour Name #define REO_FLUSH_CACHE_FLUSH_QUEUE_1K_DESC_MASK 0x00008000 123*5113495bSYour Name 124*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_2B_OFFSET 0x00000008 125*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_2B_LSB 16 126*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_2B_MSB 31 127*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_2B_MASK 0xffff0000 128*5113495bSYour Name 129*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_3A_OFFSET 0x0000000c 130*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_3A_LSB 0 131*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_3A_MSB 31 132*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_3A_MASK 0xffffffff 133*5113495bSYour Name 134*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_4A_OFFSET 0x00000010 135*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_4A_LSB 0 136*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_4A_MSB 31 137*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_4A_MASK 0xffffffff 138*5113495bSYour Name 139*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_5A_OFFSET 0x00000014 140*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_5A_LSB 0 141*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_5A_MSB 31 142*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_5A_MASK 0xffffffff 143*5113495bSYour Name 144*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_6A_OFFSET 0x00000018 145*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_6A_LSB 0 146*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_6A_MSB 31 147*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_6A_MASK 0xffffffff 148*5113495bSYour Name 149*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_7A_OFFSET 0x0000001c 150*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_7A_LSB 0 151*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_7A_MSB 31 152*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_7A_MASK 0xffffffff 153*5113495bSYour Name 154*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_8A_OFFSET 0x00000020 155*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_8A_LSB 0 156*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_8A_MSB 31 157*5113495bSYour Name #define REO_FLUSH_CACHE_RESERVED_8A_MASK 0xffffffff 158*5113495bSYour Name 159*5113495bSYour Name #endif 160