1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef _UNIFORM_DESCRIPTOR_HEADER_H_ 18*5113495bSYour Name #define _UNIFORM_DESCRIPTOR_HEADER_H_ 19*5113495bSYour Name 20*5113495bSYour Name #define NUM_OF_DWORDS_UNIFORM_DESCRIPTOR_HEADER 1 21*5113495bSYour Name 22*5113495bSYour Name struct uniform_descriptor_header { 23*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 24*5113495bSYour Name uint32_t owner : 4, 25*5113495bSYour Name buffer_type : 4, 26*5113495bSYour Name tx_mpdu_queue_number : 20, 27*5113495bSYour Name reserved_0a : 4; 28*5113495bSYour Name #else 29*5113495bSYour Name uint32_t reserved_0a : 4, 30*5113495bSYour Name tx_mpdu_queue_number : 20, 31*5113495bSYour Name buffer_type : 4, 32*5113495bSYour Name owner : 4; 33*5113495bSYour Name #endif 34*5113495bSYour Name }; 35*5113495bSYour Name 36*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_OWNER_OFFSET 0x00000000 37*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_OWNER_LSB 0 38*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_OWNER_MSB 3 39*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_OWNER_MASK 0x0000000f 40*5113495bSYour Name 41*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_OFFSET 0x00000000 42*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_LSB 4 43*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_MSB 7 44*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_MASK 0x000000f0 45*5113495bSYour Name 46*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_OFFSET 0x00000000 47*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_LSB 8 48*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MSB 27 49*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MASK 0x0fffff00 50*5113495bSYour Name 51*5113495bSYour Name /* RESERVED is overlapping with TX_MPDU_QUEUE_NUMBER 52*5113495bSYour Name * TX_MPDU_QUEUE_NUMBER valid on in Buffer_type is any of Transmit_MPDU_*_descriptor 53*5113495bSYour Name * Where as RESERVED is only used for debugging in REO_QUEUE_Descr reo_queue_desc 54*5113495bSYour Name */ 55*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_RESERVED_0A_OFFSET 0x00000000 56*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_RESERVED_0A_LSB 8 57*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_RESERVED_0A_MSB 31 58*5113495bSYour Name #define UNIFORM_DESCRIPTOR_HEADER_RESERVED_0A_MASK 0xf0000000 59*5113495bSYour Name 60*5113495bSYour Name #endif 61