1 /* 2 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 #ifndef _WBM_RELEASE_RING_H_ 19 #define _WBM_RELEASE_RING_H_ 20 21 #include "buffer_addr_info.h" 22 #define NUM_OF_DWORDS_WBM_RELEASE_RING 8 23 24 struct wbm_release_ring { 25 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 26 struct buffer_addr_info released_buff_or_desc_addr_info; 27 uint32_t release_source_module : 3, 28 reserved_2a : 3, 29 buffer_or_desc_type : 3, 30 reserved_2b : 22, 31 wbm_internal_error : 1; 32 uint32_t reserved_3a : 32; 33 uint32_t reserved_4a : 32; 34 uint32_t reserved_5a : 32; 35 uint32_t reserved_6a : 32; 36 uint32_t reserved_7a : 28, 37 looping_count : 4; 38 #else 39 struct buffer_addr_info released_buff_or_desc_addr_info; 40 uint32_t wbm_internal_error : 1, 41 reserved_2b : 22, 42 buffer_or_desc_type : 3, 43 reserved_2a : 3, 44 release_source_module : 3; 45 uint32_t reserved_3a : 32; 46 uint32_t reserved_4a : 32; 47 uint32_t reserved_5a : 32; 48 uint32_t reserved_6a : 32; 49 uint32_t looping_count : 4, 50 reserved_7a : 28; 51 #endif 52 }; 53 54 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000 55 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0 56 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31 57 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff 58 59 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004 60 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0 61 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7 62 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff 63 64 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004 65 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8 66 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11 67 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00 68 69 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004 70 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12 71 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31 72 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000 73 74 #define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_OFFSET 0x00000008 75 #define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_LSB 0 76 #define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_MSB 2 77 #define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_MASK 0x00000007 78 79 #define WBM_RELEASE_RING_RESERVED_2A_OFFSET 0x00000008 80 #define WBM_RELEASE_RING_RESERVED_2A_LSB 3 81 #define WBM_RELEASE_RING_RESERVED_2A_MSB 5 82 #define WBM_RELEASE_RING_RESERVED_2A_MASK 0x00000038 83 84 #define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_OFFSET 0x00000008 85 #define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_LSB 6 86 #define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_MSB 8 87 #define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_MASK 0x000001c0 88 89 #define WBM_RELEASE_RING_RESERVED_2B_OFFSET 0x00000008 90 #define WBM_RELEASE_RING_RESERVED_2B_LSB 9 91 #define WBM_RELEASE_RING_RESERVED_2B_MSB 30 92 #define WBM_RELEASE_RING_RESERVED_2B_MASK 0x7ffffe00 93 94 #define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_OFFSET 0x00000008 95 #define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_LSB 31 96 #define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_MSB 31 97 #define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_MASK 0x80000000 98 99 #define WBM_RELEASE_RING_RESERVED_3A_OFFSET 0x0000000c 100 #define WBM_RELEASE_RING_RESERVED_3A_LSB 0 101 #define WBM_RELEASE_RING_RESERVED_3A_MSB 31 102 #define WBM_RELEASE_RING_RESERVED_3A_MASK 0xffffffff 103 104 #define WBM_RELEASE_RING_RESERVED_4A_OFFSET 0x00000010 105 #define WBM_RELEASE_RING_RESERVED_4A_LSB 0 106 #define WBM_RELEASE_RING_RESERVED_4A_MSB 31 107 #define WBM_RELEASE_RING_RESERVED_4A_MASK 0xffffffff 108 109 #define WBM_RELEASE_RING_RESERVED_5A_OFFSET 0x00000014 110 #define WBM_RELEASE_RING_RESERVED_5A_LSB 0 111 #define WBM_RELEASE_RING_RESERVED_5A_MSB 31 112 #define WBM_RELEASE_RING_RESERVED_5A_MASK 0xffffffff 113 114 #define WBM_RELEASE_RING_RESERVED_6A_OFFSET 0x00000018 115 #define WBM_RELEASE_RING_RESERVED_6A_LSB 0 116 #define WBM_RELEASE_RING_RESERVED_6A_MSB 31 117 #define WBM_RELEASE_RING_RESERVED_6A_MASK 0xffffffff 118 119 #define WBM_RELEASE_RING_RESERVED_7A_OFFSET 0x0000001c 120 #define WBM_RELEASE_RING_RESERVED_7A_LSB 0 121 #define WBM_RELEASE_RING_RESERVED_7A_MSB 27 122 #define WBM_RELEASE_RING_RESERVED_7A_MASK 0x0fffffff 123 124 #define WBM_RELEASE_RING_LOOPING_COUNT_OFFSET 0x0000001c 125 #define WBM_RELEASE_RING_LOOPING_COUNT_LSB 28 126 #define WBM_RELEASE_RING_LOOPING_COUNT_MSB 31 127 #define WBM_RELEASE_RING_LOOPING_COUNT_MASK 0xf0000000 128 129 #endif 130