1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2020, The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef __MAC_TCL_REG_SEQ_REG_H__ 18*5113495bSYour Name #define __MAC_TCL_REG_SEQ_REG_H__ 19*5113495bSYour Name 20*5113495bSYour Name #include "seq_hwio.h" 21*5113495bSYour Name #include "mac_tcl_reg_seq_hwiobase.h" 22*5113495bSYour Name #ifdef SCALE_INCLUDES 23*5113495bSYour Name #include "HALhwio.h" 24*5113495bSYour Name #else 25*5113495bSYour Name #include "msmhwio.h" 26*5113495bSYour Name #endif 27*5113495bSYour Name 28*5113495bSYour Name 29*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 30*5113495bSYour Name // Register Data for Block MAC_TCL_REG 31*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 32*5113495bSYour Name 33*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CTRL //// 34*5113495bSYour Name 35*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x) (x+0x00000000) 36*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_PHYS(x) (x+0x00000000) 37*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RMSK 0x0003ffe0 38*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_SHFT 5 39*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_IN(x) \ 40*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CTRL_RMSK) 41*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_INM(x, mask) \ 42*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask) 43*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUT(x, val) \ 44*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), val) 45*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUTM(x, mask, val) \ 46*5113495bSYour Name do {\ 47*5113495bSYour Name HWIO_INTLOCK(); \ 48*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CTRL_IN(x)); \ 49*5113495bSYour Name HWIO_INTFREE();\ 50*5113495bSYour Name } while (0) 51*5113495bSYour Name 52*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 53*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 54*5113495bSYour Name 55*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RNG_PRTY_BMSK 0x00000020 56*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RNG_PRTY_SHFT 0x5 57*5113495bSYour Name 58*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CTRL //// 59*5113495bSYour Name 60*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x) (x+0x00000004) 61*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_PHYS(x) (x+0x00000004) 62*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RMSK 0x0003ffe0 63*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_SHFT 5 64*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_IN(x) \ 65*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CTRL_RMSK) 66*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_INM(x, mask) \ 67*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask) 68*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUT(x, val) \ 69*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), val) 70*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUTM(x, mask, val) \ 71*5113495bSYour Name do {\ 72*5113495bSYour Name HWIO_INTLOCK(); \ 73*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CTRL_IN(x)); \ 74*5113495bSYour Name HWIO_INTFREE();\ 75*5113495bSYour Name } while (0) 76*5113495bSYour Name 77*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 78*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 79*5113495bSYour Name 80*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RNG_PRTY_BMSK 0x00000020 81*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RNG_PRTY_SHFT 0x5 82*5113495bSYour Name 83*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CTRL //// 84*5113495bSYour Name 85*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x) (x+0x00000008) 86*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_PHYS(x) (x+0x00000008) 87*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RMSK 0x0003ffe0 88*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_SHFT 5 89*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_IN(x) \ 90*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CTRL_RMSK) 91*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_INM(x, mask) \ 92*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask) 93*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_OUT(x, val) \ 94*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), val) 95*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_OUTM(x, mask, val) \ 96*5113495bSYour Name do {\ 97*5113495bSYour Name HWIO_INTLOCK(); \ 98*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CTRL_IN(x)); \ 99*5113495bSYour Name HWIO_INTFREE();\ 100*5113495bSYour Name } while (0) 101*5113495bSYour Name 102*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 103*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 104*5113495bSYour Name 105*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RNG_PRTY_BMSK 0x00000020 106*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RNG_PRTY_SHFT 0x5 107*5113495bSYour Name 108*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CTRL //// 109*5113495bSYour Name 110*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x) (x+0x0000000c) 111*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_PHYS(x) (x+0x0000000c) 112*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RMSK 0x0003ffe0 113*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_SHFT 5 114*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_IN(x) \ 115*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CTRL_RMSK) 116*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_INM(x, mask) \ 117*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), mask) 118*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_OUT(x, val) \ 119*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), val) 120*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_OUTM(x, mask, val) \ 121*5113495bSYour Name do {\ 122*5113495bSYour Name HWIO_INTLOCK(); \ 123*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CTRL_IN(x)); \ 124*5113495bSYour Name HWIO_INTFREE();\ 125*5113495bSYour Name } while (0) 126*5113495bSYour Name 127*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 128*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 129*5113495bSYour Name 130*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RNG_PRTY_BMSK 0x00000020 131*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RNG_PRTY_SHFT 0x5 132*5113495bSYour Name 133*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CTRL //// 134*5113495bSYour Name 135*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x) (x+0x00000010) 136*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_PHYS(x) (x+0x00000010) 137*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RMSK 0x0003ffe0 138*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_SHFT 5 139*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_IN(x) \ 140*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RMSK) 141*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_INM(x, mask) \ 142*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), mask) 143*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_OUT(x, val) \ 144*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), val) 145*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_OUTM(x, mask, val) \ 146*5113495bSYour Name do {\ 147*5113495bSYour Name HWIO_INTLOCK(); \ 148*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_IN(x)); \ 149*5113495bSYour Name HWIO_INTFREE();\ 150*5113495bSYour Name } while (0) 151*5113495bSYour Name 152*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 153*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 154*5113495bSYour Name 155*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RNG_PRTY_BMSK 0x00000020 156*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RNG_PRTY_SHFT 0x5 157*5113495bSYour Name 158*5113495bSYour Name //// Register TCL_R0_CONS_RING_CMN_CTRL_REG //// 159*5113495bSYour Name 160*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x) (x+0x00000014) 161*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_PHYS(x) (x+0x00000014) 162*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_RMSK 0x001fffff 163*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SHFT 0 164*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_IN(x) \ 165*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_RMSK) 166*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_INM(x, mask) \ 167*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), mask) 168*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_OUT(x, val) \ 169*5113495bSYour Name out_dword( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), val) 170*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_OUTM(x, mask, val) \ 171*5113495bSYour Name do {\ 172*5113495bSYour Name HWIO_INTLOCK(); \ 173*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), mask, val, HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_IN(x)); \ 174*5113495bSYour Name HWIO_INTFREE();\ 175*5113495bSYour Name } while (0) 176*5113495bSYour Name 177*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_INSERT_VLAN_EN_BMSK 0x00100000 178*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_INSERT_VLAN_EN_SHFT 0x14 179*5113495bSYour Name 180*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_STOP_META_RD_AT_8B_BDRY_BMSK 0x00080000 181*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_STOP_META_RD_AT_8B_BDRY_SHFT 0x13 182*5113495bSYour Name 183*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ENABLE_C9D1_BMSK 0x00040000 184*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ENABLE_C9D1_SHFT 0x12 185*5113495bSYour Name 186*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK 0x00020000 187*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT 0x11 188*5113495bSYour Name 189*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_EXTN_NUM_BUF_RD_BMSK 0x0001c000 190*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_EXTN_NUM_BUF_RD_SHFT 0xe 191*5113495bSYour Name 192*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_TCL_IDLE_BMSK 0x00002000 193*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_TCL_IDLE_SHFT 0xd 194*5113495bSYour Name 195*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_STAT_BMSK 0x00001000 196*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_STAT_SHFT 0xc 197*5113495bSYour Name 198*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_STAT_BMSK 0x00000800 199*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_STAT_SHFT 0xb 200*5113495bSYour Name 201*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_STAT_BMSK 0x00000400 202*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_STAT_SHFT 0xa 203*5113495bSYour Name 204*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_STAT_BMSK 0x00000200 205*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_STAT_SHFT 0x9 206*5113495bSYour Name 207*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_STAT_BMSK 0x00000100 208*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_STAT_SHFT 0x8 209*5113495bSYour Name 210*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_BMSK 0x00000080 211*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_SHFT 0x7 212*5113495bSYour Name 213*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_BMSK 0x00000040 214*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_SHFT 0x6 215*5113495bSYour Name 216*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_BMSK 0x00000020 217*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_SHFT 0x5 218*5113495bSYour Name 219*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_BMSK 0x00000010 220*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_SHFT 0x4 221*5113495bSYour Name 222*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_BMSK 0x00000008 223*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_SHFT 0x3 224*5113495bSYour Name 225*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_HDR_FWD_EN_BMSK 0x00000004 226*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_HDR_FWD_EN_SHFT 0x2 227*5113495bSYour Name 228*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_HDR_LEN_SEL_BMSK 0x00000002 229*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_HDR_LEN_SEL_SHFT 0x1 230*5113495bSYour Name 231*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_CLFY_DIS_BMSK 0x00000001 232*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_CLFY_DIS_SHFT 0x0 233*5113495bSYour Name 234*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_CTRL //// 235*5113495bSYour Name 236*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x) (x+0x00000018) 237*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_PHYS(x) (x+0x00000018) 238*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_RMSK 0x0000ffff 239*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_SHFT 0 240*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_IN(x) \ 241*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_CTRL_RMSK) 242*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_INM(x, mask) \ 243*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), mask) 244*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_OUT(x, val) \ 245*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), val) 246*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_OUTM(x, mask, val) \ 247*5113495bSYour Name do {\ 248*5113495bSYour Name HWIO_INTLOCK(); \ 249*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_CTRL_IN(x)); \ 250*5113495bSYour Name HWIO_INTFREE();\ 251*5113495bSYour Name } while (0) 252*5113495bSYour Name 253*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_DROP_NO_DROP_PRIORITY_BMSK 0x0000c000 254*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_DROP_NO_DROP_PRIORITY_SHFT 0xe 255*5113495bSYour Name 256*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_RING_BMSK 0x00002000 257*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_RING_SHFT 0xd 258*5113495bSYour Name 259*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_REQUIRED_BMSK 0x00001000 260*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_REQUIRED_SHFT 0xc 261*5113495bSYour Name 262*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 263*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 264*5113495bSYour Name 265*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_CTRL //// 266*5113495bSYour Name 267*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x) (x+0x0000001c) 268*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_PHYS(x) (x+0x0000001c) 269*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_RMSK 0x00000fff 270*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_SHFT 0 271*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_IN(x) \ 272*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_CTRL_RMSK) 273*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_INM(x, mask) \ 274*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), mask) 275*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_OUT(x, val) \ 276*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), val) 277*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_OUTM(x, mask, val) \ 278*5113495bSYour Name do {\ 279*5113495bSYour Name HWIO_INTLOCK(); \ 280*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_CTRL_IN(x)); \ 281*5113495bSYour Name HWIO_INTFREE();\ 282*5113495bSYour Name } while (0) 283*5113495bSYour Name 284*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 285*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 286*5113495bSYour Name 287*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_CTRL //// 288*5113495bSYour Name 289*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x) (x+0x00000020) 290*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_PHYS(x) (x+0x00000020) 291*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_RMSK 0x00000fff 292*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_SHFT 0 293*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_IN(x) \ 294*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_RMSK) 295*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_INM(x, mask) \ 296*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), mask) 297*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_OUT(x, val) \ 298*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), val) 299*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_OUTM(x, mask, val) \ 300*5113495bSYour Name do {\ 301*5113495bSYour Name HWIO_INTLOCK(); \ 302*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_IN(x)); \ 303*5113495bSYour Name HWIO_INTFREE();\ 304*5113495bSYour Name } while (0) 305*5113495bSYour Name 306*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 307*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 308*5113495bSYour Name 309*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_CTRL //// 310*5113495bSYour Name 311*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x) (x+0x00000024) 312*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_PHYS(x) (x+0x00000024) 313*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_RMSK 0x00000fff 314*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_SHFT 0 315*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_IN(x) \ 316*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_RMSK) 317*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_INM(x, mask) \ 318*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), mask) 319*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_OUT(x, val) \ 320*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), val) 321*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_OUTM(x, mask, val) \ 322*5113495bSYour Name do {\ 323*5113495bSYour Name HWIO_INTLOCK(); \ 324*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_IN(x)); \ 325*5113495bSYour Name HWIO_INTFREE();\ 326*5113495bSYour Name } while (0) 327*5113495bSYour Name 328*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 329*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 330*5113495bSYour Name 331*5113495bSYour Name //// Register TCL_R0_GEN_CTRL //// 332*5113495bSYour Name 333*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDR(x) (x+0x00000028) 334*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PHYS(x) (x+0x00000028) 335*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_RMSK 0xfffff1fb 336*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_SHFT 0 337*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_IN(x) \ 338*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GEN_CTRL_ADDR(x), HWIO_TCL_R0_GEN_CTRL_RMSK) 339*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_INM(x, mask) \ 340*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GEN_CTRL_ADDR(x), mask) 341*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_OUT(x, val) \ 342*5113495bSYour Name out_dword( HWIO_TCL_R0_GEN_CTRL_ADDR(x), val) 343*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_OUTM(x, mask, val) \ 344*5113495bSYour Name do {\ 345*5113495bSYour Name HWIO_INTLOCK(); \ 346*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GEN_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GEN_CTRL_IN(x)); \ 347*5113495bSYour Name HWIO_INTFREE();\ 348*5113495bSYour Name } while (0) 349*5113495bSYour Name 350*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_WHO_CLASSIFY_INFO_OFFSET_BMSK 0xffff0000 351*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_WHO_CLASSIFY_INFO_OFFSET_SHFT 0x10 352*5113495bSYour Name 353*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_L4_BMSK 0x00008000 354*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_L4_SHFT 0xf 355*5113495bSYour Name 356*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_ESP_BMSK 0x00004000 357*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_ESP_SHFT 0xe 358*5113495bSYour Name 359*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FLOW_TOEPLITZ_5_SEL_BMSK 0x00002000 360*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FLOW_TOEPLITZ_5_SEL_SHFT 0xd 361*5113495bSYour Name 362*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_STAT_UP_DIS_BMSK 0x00001000 363*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_STAT_UP_DIS_SHFT 0xc 364*5113495bSYour Name 365*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_UPDATE_DIS_BMSK 0x00000100 366*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_UPDATE_DIS_SHFT 0x8 367*5113495bSYour Name 368*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_UPDATE_DIS_BMSK 0x00000080 369*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_UPDATE_DIS_SHFT 0x7 370*5113495bSYour Name 371*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRY_UPDATE_DIS_BMSK 0x00000040 372*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRY_UPDATE_DIS_SHFT 0x6 373*5113495bSYour Name 374*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRX_UPDATE_DIS_BMSK 0x00000020 375*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRX_UPDATE_DIS_SHFT 0x5 376*5113495bSYour Name 377*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_EN_BMSK 0x00000010 378*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_EN_SHFT 0x4 379*5113495bSYour Name 380*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_EN_BMSK 0x00000008 381*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_EN_SHFT 0x3 382*5113495bSYour Name 383*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_TO_FW_BMSK 0x00000002 384*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_TO_FW_SHFT 0x1 385*5113495bSYour Name 386*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_EN_11AH_BMSK 0x00000001 387*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_EN_11AH_SHFT 0x0 388*5113495bSYour Name 389*5113495bSYour Name //// Register TCL_R0_DSCP_TID_MAP_n //// 390*5113495bSYour Name 391*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n) (base+0x2C+0x4*n) 392*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_PHYS(base, n) (base+0x2C+0x4*n) 393*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK 0xffffffff 394*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_SHFT 0 395*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_MAXn 287 396*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_INI(base, n) \ 397*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK) 398*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_INMI(base, n, mask) \ 399*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), mask) 400*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_OUTI(base, n, val) \ 401*5113495bSYour Name out_dword( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), val) 402*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_OUTMI(base, n, mask, val) \ 403*5113495bSYour Name do {\ 404*5113495bSYour Name HWIO_INTLOCK(); \ 405*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), mask, val, HWIO_TCL_R0_DSCP_TID_MAP_n_INI(base, n)); \ 406*5113495bSYour Name HWIO_INTFREE();\ 407*5113495bSYour Name } while (0) 408*5113495bSYour Name 409*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_VAL_BMSK 0xffffffff 410*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_VAL_SHFT 0x0 411*5113495bSYour Name 412*5113495bSYour Name //// Register TCL_R0_PCP_TID_MAP //// 413*5113495bSYour Name 414*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_ADDR(x) (x+0x000004ac) 415*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PHYS(x) (x+0x000004ac) 416*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_RMSK 0x00ffffff 417*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_SHFT 0 418*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_IN(x) \ 419*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), HWIO_TCL_R0_PCP_TID_MAP_RMSK) 420*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_INM(x, mask) \ 421*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), mask) 422*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_OUT(x, val) \ 423*5113495bSYour Name out_dword( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), val) 424*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_OUTM(x, mask, val) \ 425*5113495bSYour Name do {\ 426*5113495bSYour Name HWIO_INTLOCK(); \ 427*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), mask, val, HWIO_TCL_R0_PCP_TID_MAP_IN(x)); \ 428*5113495bSYour Name HWIO_INTFREE();\ 429*5113495bSYour Name } while (0) 430*5113495bSYour Name 431*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_7_BMSK 0x00e00000 432*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_7_SHFT 0x15 433*5113495bSYour Name 434*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_6_BMSK 0x001c0000 435*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_6_SHFT 0x12 436*5113495bSYour Name 437*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_5_BMSK 0x00038000 438*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_5_SHFT 0xf 439*5113495bSYour Name 440*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_4_BMSK 0x00007000 441*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_4_SHFT 0xc 442*5113495bSYour Name 443*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_3_BMSK 0x00000e00 444*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_3_SHFT 0x9 445*5113495bSYour Name 446*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_2_BMSK 0x000001c0 447*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_2_SHFT 0x6 448*5113495bSYour Name 449*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_1_BMSK 0x00000038 450*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_1_SHFT 0x3 451*5113495bSYour Name 452*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_0_BMSK 0x00000007 453*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_0_SHFT 0x0 454*5113495bSYour Name 455*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_31_0 //// 456*5113495bSYour Name 457*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x) (x+0x000004b0) 458*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_PHYS(x) (x+0x000004b0) 459*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_RMSK 0xffffffff 460*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_SHFT 0 461*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_IN(x) \ 462*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_31_0_RMSK) 463*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_INM(x, mask) \ 464*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), mask) 465*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_OUT(x, val) \ 466*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), val) 467*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_OUTM(x, mask, val) \ 468*5113495bSYour Name do {\ 469*5113495bSYour Name HWIO_INTLOCK(); \ 470*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_31_0_IN(x)); \ 471*5113495bSYour Name HWIO_INTFREE();\ 472*5113495bSYour Name } while (0) 473*5113495bSYour Name 474*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_VAL_BMSK 0xffffffff 475*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_VAL_SHFT 0x0 476*5113495bSYour Name 477*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_63_32 //// 478*5113495bSYour Name 479*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x) (x+0x000004b4) 480*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_PHYS(x) (x+0x000004b4) 481*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_RMSK 0xffffffff 482*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_SHFT 0 483*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_IN(x) \ 484*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_63_32_RMSK) 485*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_INM(x, mask) \ 486*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), mask) 487*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_OUT(x, val) \ 488*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), val) 489*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_OUTM(x, mask, val) \ 490*5113495bSYour Name do {\ 491*5113495bSYour Name HWIO_INTLOCK(); \ 492*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_63_32_IN(x)); \ 493*5113495bSYour Name HWIO_INTFREE();\ 494*5113495bSYour Name } while (0) 495*5113495bSYour Name 496*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_VAL_BMSK 0xffffffff 497*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_VAL_SHFT 0x0 498*5113495bSYour Name 499*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_64 //// 500*5113495bSYour Name 501*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x) (x+0x000004b8) 502*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_PHYS(x) (x+0x000004b8) 503*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_RMSK 0x00000001 504*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_SHFT 0 505*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_IN(x) \ 506*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_64_RMSK) 507*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_INM(x, mask) \ 508*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), mask) 509*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_OUT(x, val) \ 510*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), val) 511*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_OUTM(x, mask, val) \ 512*5113495bSYour Name do {\ 513*5113495bSYour Name HWIO_INTLOCK(); \ 514*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_64_IN(x)); \ 515*5113495bSYour Name HWIO_INTFREE();\ 516*5113495bSYour Name } while (0) 517*5113495bSYour Name 518*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_VAL_BMSK 0x00000001 519*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_VAL_SHFT 0x0 520*5113495bSYour Name 521*5113495bSYour Name //// Register TCL_R0_CONFIG_SEARCH_QUEUE //// 522*5113495bSYour Name 523*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x) (x+0x000004bc) 524*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PHYS(x) (x+0x000004bc) 525*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_RMSK 0x00fffdfc 526*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_SHFT 2 527*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_IN(x) \ 528*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_RMSK) 529*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_INM(x, mask) \ 530*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), mask) 531*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_OUT(x, val) \ 532*5113495bSYour Name out_dword( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), val) 533*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_OUTM(x, mask, val) \ 534*5113495bSYour Name do {\ 535*5113495bSYour Name HWIO_INTLOCK(); \ 536*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), mask, val, HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_IN(x)); \ 537*5113495bSYour Name HWIO_INTFREE();\ 538*5113495bSYour Name } while (0) 539*5113495bSYour Name 540*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_MSDU_LEN_ERR_TO_FW_EN_BMSK 0x00800000 541*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_MSDU_LEN_ERR_TO_FW_EN_SHFT 0x17 542*5113495bSYour Name 543*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_M0_FW_SEL_BMSK 0x00700000 544*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_M0_FW_SEL_SHFT 0x14 545*5113495bSYour Name 546*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ASE_M0_FW_SEL_BMSK 0x000e0000 547*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ASE_M0_FW_SEL_SHFT 0x11 548*5113495bSYour Name 549*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_M0_FW_SEL_BMSK 0x0001c000 550*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_M0_FW_SEL_SHFT 0xe 551*5113495bSYour Name 552*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_DROP_BMSK 0x00002000 553*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_DROP_SHFT 0xd 554*5113495bSYour Name 555*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_DROP_BMSK 0x00001000 556*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_DROP_SHFT 0xc 557*5113495bSYour Name 558*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_LOOP_BMSK 0x00000800 559*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_LOOP_SHFT 0xb 560*5113495bSYour Name 561*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_LOOP_BMSK 0x00000400 562*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_LOOP_SHFT 0xa 563*5113495bSYour Name 564*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PRIORITY_BMSK 0x000001c0 565*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PRIORITY_SHFT 0x6 566*5113495bSYour Name 567*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_HANDLER_BMSK 0x00000030 568*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_HANDLER_SHFT 0x4 569*5113495bSYour Name 570*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_HANDLER_BMSK 0x0000000c 571*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_HANDLER_SHFT 0x2 572*5113495bSYour Name 573*5113495bSYour Name //// Register TCL_R0_FSE_FAIL_QUEUE_NUM_LOW //// 574*5113495bSYour Name 575*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x) (x+0x000004c0) 576*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_PHYS(x) (x+0x000004c0) 577*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_RMSK 0xffffffff 578*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_SHFT 0 579*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_IN(x) \ 580*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_RMSK) 581*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_INM(x, mask) \ 582*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask) 583*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_OUT(x, val) \ 584*5113495bSYour Name out_dword( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), val) 585*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_OUTM(x, mask, val) \ 586*5113495bSYour Name do {\ 587*5113495bSYour Name HWIO_INTLOCK(); \ 588*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask, val, HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_IN(x)); \ 589*5113495bSYour Name HWIO_INTFREE();\ 590*5113495bSYour Name } while (0) 591*5113495bSYour Name 592*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_VAL_BMSK 0xffffffff 593*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_VAL_SHFT 0x0 594*5113495bSYour Name 595*5113495bSYour Name //// Register TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH //// 596*5113495bSYour Name 597*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x) (x+0x000004c4) 598*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_PHYS(x) (x+0x000004c4) 599*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_RMSK 0x000000ff 600*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_SHFT 0 601*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_IN(x) \ 602*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_RMSK) 603*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_INM(x, mask) \ 604*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask) 605*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_OUT(x, val) \ 606*5113495bSYour Name out_dword( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), val) 607*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_OUTM(x, mask, val) \ 608*5113495bSYour Name do {\ 609*5113495bSYour Name HWIO_INTLOCK(); \ 610*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_IN(x)); \ 611*5113495bSYour Name HWIO_INTFREE();\ 612*5113495bSYour Name } while (0) 613*5113495bSYour Name 614*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_VAL_BMSK 0x000000ff 615*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_VAL_SHFT 0x0 616*5113495bSYour Name 617*5113495bSYour Name //// Register TCL_R0_CCE_FAIL_QUEUE_NUM_LOW //// 618*5113495bSYour Name 619*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x) (x+0x000004c8) 620*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_PHYS(x) (x+0x000004c8) 621*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_RMSK 0xffffffff 622*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_SHFT 0 623*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_IN(x) \ 624*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_RMSK) 625*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_INM(x, mask) \ 626*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask) 627*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_OUT(x, val) \ 628*5113495bSYour Name out_dword( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), val) 629*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_OUTM(x, mask, val) \ 630*5113495bSYour Name do {\ 631*5113495bSYour Name HWIO_INTLOCK(); \ 632*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask, val, HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_IN(x)); \ 633*5113495bSYour Name HWIO_INTFREE();\ 634*5113495bSYour Name } while (0) 635*5113495bSYour Name 636*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_VAL_BMSK 0xffffffff 637*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_VAL_SHFT 0x0 638*5113495bSYour Name 639*5113495bSYour Name //// Register TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH //// 640*5113495bSYour Name 641*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x) (x+0x000004cc) 642*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_PHYS(x) (x+0x000004cc) 643*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_RMSK 0x000000ff 644*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_SHFT 0 645*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_IN(x) \ 646*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_RMSK) 647*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_INM(x, mask) \ 648*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask) 649*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_OUT(x, val) \ 650*5113495bSYour Name out_dword( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), val) 651*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_OUTM(x, mask, val) \ 652*5113495bSYour Name do {\ 653*5113495bSYour Name HWIO_INTLOCK(); \ 654*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_IN(x)); \ 655*5113495bSYour Name HWIO_INTFREE();\ 656*5113495bSYour Name } while (0) 657*5113495bSYour Name 658*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_VAL_BMSK 0x000000ff 659*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_VAL_SHFT 0x0 660*5113495bSYour Name 661*5113495bSYour Name //// Register TCL_R0_CONFIG_SEARCH_METADATA //// 662*5113495bSYour Name 663*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x) (x+0x000004d0) 664*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_PHYS(x) (x+0x000004d0) 665*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_RMSK 0xffffffff 666*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_SHFT 0 667*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_IN(x) \ 668*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), HWIO_TCL_R0_CONFIG_SEARCH_METADATA_RMSK) 669*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_INM(x, mask) \ 670*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), mask) 671*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_OUT(x, val) \ 672*5113495bSYour Name out_dword( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), val) 673*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_OUTM(x, mask, val) \ 674*5113495bSYour Name do {\ 675*5113495bSYour Name HWIO_INTLOCK(); \ 676*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), mask, val, HWIO_TCL_R0_CONFIG_SEARCH_METADATA_IN(x)); \ 677*5113495bSYour Name HWIO_INTFREE();\ 678*5113495bSYour Name } while (0) 679*5113495bSYour Name 680*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_FSE_FAIL_NUM_BMSK 0xffff0000 681*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_FSE_FAIL_NUM_SHFT 0x10 682*5113495bSYour Name 683*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_CCE_FAIL_NUM_BMSK 0x0000ffff 684*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_CCE_FAIL_NUM_SHFT 0x0 685*5113495bSYour Name 686*5113495bSYour Name //// Register TCL_R0_TID_MAP_PRTY //// 687*5113495bSYour Name 688*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x) (x+0x000004d4) 689*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_PHYS(x) (x+0x000004d4) 690*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_RMSK 0x000000ef 691*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_SHFT 0 692*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_IN(x) \ 693*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), HWIO_TCL_R0_TID_MAP_PRTY_RMSK) 694*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_INM(x, mask) \ 695*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), mask) 696*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_OUT(x, val) \ 697*5113495bSYour Name out_dword( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), val) 698*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_OUTM(x, mask, val) \ 699*5113495bSYour Name do {\ 700*5113495bSYour Name HWIO_INTLOCK(); \ 701*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), mask, val, HWIO_TCL_R0_TID_MAP_PRTY_IN(x)); \ 702*5113495bSYour Name HWIO_INTFREE();\ 703*5113495bSYour Name } while (0) 704*5113495bSYour Name 705*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_TID_DEF_BMSK 0x000000e0 706*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_TID_DEF_SHFT 0x5 707*5113495bSYour Name 708*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_VAL_BMSK 0x0000000f 709*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_VAL_SHFT 0x0 710*5113495bSYour Name 711*5113495bSYour Name //// Register TCL_R0_INVALID_APB_ACC_ADDR //// 712*5113495bSYour Name 713*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x) (x+0x000004d8) 714*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_PHYS(x) (x+0x000004d8) 715*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_RMSK 0xffffffff 716*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_SHFT 0 717*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_IN(x) \ 718*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), HWIO_TCL_R0_INVALID_APB_ACC_ADDR_RMSK) 719*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_INM(x, mask) \ 720*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), mask) 721*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_OUT(x, val) \ 722*5113495bSYour Name out_dword( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), val) 723*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_OUTM(x, mask, val) \ 724*5113495bSYour Name do {\ 725*5113495bSYour Name HWIO_INTLOCK(); \ 726*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), mask, val, HWIO_TCL_R0_INVALID_APB_ACC_ADDR_IN(x)); \ 727*5113495bSYour Name HWIO_INTFREE();\ 728*5113495bSYour Name } while (0) 729*5113495bSYour Name 730*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_VAL_BMSK 0xffffffff 731*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_VAL_SHFT 0x0 732*5113495bSYour Name 733*5113495bSYour Name //// Register TCL_R0_WATCHDOG //// 734*5113495bSYour Name 735*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_ADDR(x) (x+0x000004dc) 736*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_PHYS(x) (x+0x000004dc) 737*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_RMSK 0xffffffff 738*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_SHFT 0 739*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_IN(x) \ 740*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_WATCHDOG_ADDR(x), HWIO_TCL_R0_WATCHDOG_RMSK) 741*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_INM(x, mask) \ 742*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_WATCHDOG_ADDR(x), mask) 743*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_OUT(x, val) \ 744*5113495bSYour Name out_dword( HWIO_TCL_R0_WATCHDOG_ADDR(x), val) 745*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_OUTM(x, mask, val) \ 746*5113495bSYour Name do {\ 747*5113495bSYour Name HWIO_INTLOCK(); \ 748*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_WATCHDOG_ADDR(x), mask, val, HWIO_TCL_R0_WATCHDOG_IN(x)); \ 749*5113495bSYour Name HWIO_INTFREE();\ 750*5113495bSYour Name } while (0) 751*5113495bSYour Name 752*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_STATUS_BMSK 0xffff0000 753*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_STATUS_SHFT 0x10 754*5113495bSYour Name 755*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_LIMIT_BMSK 0x0000ffff 756*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_LIMIT_SHFT 0x0 757*5113495bSYour Name 758*5113495bSYour Name //// Register TCL_R0_LCE_RULE_n //// 759*5113495bSYour Name 760*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n) (base+0x4E0+0x4*n) 761*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_PHYS(base, n) (base+0x4E0+0x4*n) 762*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_RMSK 0x007fffff 763*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_SHFT 0 764*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MAXn 25 765*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_INI(base, n) \ 766*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), HWIO_TCL_R0_LCE_RULE_n_RMSK) 767*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_INMI(base, n, mask) \ 768*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), mask) 769*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_OUTI(base, n, val) \ 770*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), val) 771*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_OUTMI(base, n, mask, val) \ 772*5113495bSYour Name do {\ 773*5113495bSYour Name HWIO_INTLOCK(); \ 774*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_RULE_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_RULE_n_INI(base, n)); \ 775*5113495bSYour Name HWIO_INTFREE();\ 776*5113495bSYour Name } while (0) 777*5113495bSYour Name 778*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_IP_PROT_BMSK 0x00400000 779*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_IP_PROT_SHFT 0x16 780*5113495bSYour Name 781*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_ADDR_BIT_0_BMSK 0x00200000 782*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_ADDR_BIT_0_SHFT 0x15 783*5113495bSYour Name 784*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_TCP_OR_UDP_BMSK 0x00180000 785*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_TCP_OR_UDP_SHFT 0x13 786*5113495bSYour Name 787*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_PORT_BMSK 0x00040000 788*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_DEST_PORT_SHFT 0x12 789*5113495bSYour Name 790*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_SRC_PORT_BMSK 0x00020000 791*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_SRC_PORT_SHFT 0x11 792*5113495bSYour Name 793*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_L3_TYPE_BMSK 0x00010000 794*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_L3_TYPE_SHFT 0x10 795*5113495bSYour Name 796*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_VAL_BMSK 0x0000ffff 797*5113495bSYour Name #define HWIO_TCL_R0_LCE_RULE_n_MATCH_VAL_SHFT 0x0 798*5113495bSYour Name 799*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n //// 800*5113495bSYour Name 801*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n) (base+0x548+0x4*n) 802*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_PHYS(base, n) (base+0x548+0x4*n) 803*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_RMSK 0xffffffff 804*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_SHFT 0 805*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_MAXn 25 806*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INI(base, n) \ 807*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_RMSK) 808*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INMI(base, n, mask) \ 809*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), mask) 810*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_OUTI(base, n, val) \ 811*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), val) 812*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_OUTMI(base, n, mask, val) \ 813*5113495bSYour Name do {\ 814*5113495bSYour Name HWIO_INTLOCK(); \ 815*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_INI(base, n)); \ 816*5113495bSYour Name HWIO_INTFREE();\ 817*5113495bSYour Name } while (0) 818*5113495bSYour Name 819*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_VAL_BMSK 0xffffffff 820*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_LSB_n_VAL_SHFT 0x0 821*5113495bSYour Name 822*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n //// 823*5113495bSYour Name 824*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n) (base+0x5B0+0x4*n) 825*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_PHYS(base, n) (base+0x5B0+0x4*n) 826*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_RMSK 0x000000ff 827*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_SHFT 0 828*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_MAXn 25 829*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INI(base, n) \ 830*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_RMSK) 831*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INMI(base, n, mask) \ 832*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), mask) 833*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_OUTI(base, n, val) \ 834*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), val) 835*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_OUTMI(base, n, mask, val) \ 836*5113495bSYour Name do {\ 837*5113495bSYour Name HWIO_INTLOCK(); \ 838*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_INI(base, n)); \ 839*5113495bSYour Name HWIO_INTFREE();\ 840*5113495bSYour Name } while (0) 841*5113495bSYour Name 842*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_VAL_BMSK 0x000000ff 843*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_FLOW_PTR_MSB_n_VAL_SHFT 0x0 844*5113495bSYour Name 845*5113495bSYour Name //// Register TCL_R0_LCE_CLFY_INFO_HANDLER_n //// 846*5113495bSYour Name 847*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n) (base+0x618+0x4*n) 848*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_PHYS(base, n) (base+0x618+0x4*n) 849*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RMSK 0x003fffff 850*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_SHFT 0 851*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MAXn 25 852*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INI(base, n) \ 853*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RMSK) 854*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INMI(base, n, mask) \ 855*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), mask) 856*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_OUTI(base, n, val) \ 857*5113495bSYour Name out_dword( HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), val) 858*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_OUTMI(base, n, mask, val) \ 859*5113495bSYour Name do {\ 860*5113495bSYour Name HWIO_INTLOCK(); \ 861*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_ADDR(base, n), mask, val, HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_INI(base, n)); \ 862*5113495bSYour Name HWIO_INTFREE();\ 863*5113495bSYour Name } while (0) 864*5113495bSYour Name 865*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RULE_HIT_BMSK 0x00200000 866*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_RULE_HIT_SHFT 0x15 867*5113495bSYour Name 868*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_METADATA_BMSK 0x001fffe0 869*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_METADATA_SHFT 0x5 870*5113495bSYour Name 871*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MSDU_DROP_BMSK 0x00000010 872*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_MSDU_DROP_SHFT 0x4 873*5113495bSYour Name 874*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TO_TQM_IF_M0_FW_BMSK 0x00000008 875*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TO_TQM_IF_M0_FW_SHFT 0x3 876*5113495bSYour Name 877*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_LOOP_HANDLER_BMSK 0x00000004 878*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_LOOP_HANDLER_SHFT 0x2 879*5113495bSYour Name 880*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_HANDLER_BMSK 0x00000003 881*5113495bSYour Name #define HWIO_TCL_R0_LCE_CLFY_INFO_HANDLER_n_TQM_FLOW_HANDLER_SHFT 0x0 882*5113495bSYour Name 883*5113495bSYour Name //// Register TCL_R0_CLKGATE_DISABLE //// 884*5113495bSYour Name 885*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x) (x+0x00000680) 886*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PHYS(x) (x+0x00000680) 887*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_RMSK 0xffffffff 888*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SHFT 0 889*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_IN(x) \ 890*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), HWIO_TCL_R0_CLKGATE_DISABLE_RMSK) 891*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_INM(x, mask) \ 892*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), mask) 893*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_OUT(x, val) \ 894*5113495bSYour Name out_dword( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), val) 895*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_OUTM(x, mask, val) \ 896*5113495bSYour Name do {\ 897*5113495bSYour Name HWIO_INTLOCK(); \ 898*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_CLKGATE_DISABLE_IN(x)); \ 899*5113495bSYour Name HWIO_INTFREE();\ 900*5113495bSYour Name } while (0) 901*5113495bSYour Name 902*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLK_ENS_EXTEND_BMSK 0x80000000 903*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLK_ENS_EXTEND_SHFT 0x1f 904*5113495bSYour Name 905*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CPU_IF_EXTEND_BMSK 0x40000000 906*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CPU_IF_EXTEND_SHFT 0x1e 907*5113495bSYour Name 908*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_APB_CLK_BMSK 0x20000000 909*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_APB_CLK_SHFT 0x1d 910*5113495bSYour Name 911*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_FSE_BMSK 0x10000000 912*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_FSE_SHFT 0x1c 913*5113495bSYour Name 914*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLFY_RES_MEM_BMSK 0x08000000 915*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLFY_RES_MEM_SHFT 0x1b 916*5113495bSYour Name 917*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CTRL_BMSK 0x04000000 918*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CTRL_SHFT 0x1a 919*5113495bSYour Name 920*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CCE_RES_BMSK 0x02000000 921*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CCE_RES_SHFT 0x19 922*5113495bSYour Name 923*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS2_PROD_RING_BMSK 0x01000000 924*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS2_PROD_RING_SHFT 0x18 925*5113495bSYour Name 926*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS1_PROD_RING_BMSK 0x00800000 927*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS1_PROD_RING_SHFT 0x17 928*5113495bSYour Name 929*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2FW_PROD_RING_BMSK 0x00400000 930*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2FW_PROD_RING_SHFT 0x16 931*5113495bSYour Name 932*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2TQM_PROD_RING_BMSK 0x00200000 933*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2TQM_PROD_RING_SHFT 0x15 934*5113495bSYour Name 935*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PROD_RING_CTRL_BMSK 0x00100000 936*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PROD_RING_CTRL_SHFT 0x14 937*5113495bSYour Name 938*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_DECODE_BMSK 0x00080000 939*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_DECODE_SHFT 0x13 940*5113495bSYour Name 941*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_GEN_BMSK 0x00040000 942*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_GEN_SHFT 0x12 943*5113495bSYour Name 944*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_FETCH_BMSK 0x00020000 945*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_FETCH_SHFT 0x11 946*5113495bSYour Name 947*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_BUF_BMSK 0x00010000 948*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_BUF_SHFT 0x10 949*5113495bSYour Name 950*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_BUF_BMSK 0x00008000 951*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_BUF_SHFT 0xf 952*5113495bSYour Name 953*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_RD_BMSK 0x00004000 954*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_RD_SHFT 0xe 955*5113495bSYour Name 956*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ASE_BMSK 0x00002000 957*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ASE_SHFT 0xd 958*5113495bSYour Name 959*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GXI_BMSK 0x00001000 960*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GXI_SHFT 0xc 961*5113495bSYour Name 962*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_3_BMSK 0x00000800 963*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_3_SHFT 0xb 964*5113495bSYour Name 965*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_2_BMSK 0x00000400 966*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_2_SHFT 0xa 967*5113495bSYour Name 968*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_1_BMSK 0x00000200 969*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_1_SHFT 0x9 970*5113495bSYour Name 971*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_0_BMSK 0x00000100 972*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_0_SHFT 0x8 973*5113495bSYour Name 974*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_4_BMSK 0x00000080 975*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_4_SHFT 0x7 976*5113495bSYour Name 977*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_3_BMSK 0x00000040 978*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_3_SHFT 0x6 979*5113495bSYour Name 980*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_2_BMSK 0x00000020 981*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_2_SHFT 0x5 982*5113495bSYour Name 983*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_1_BMSK 0x00000010 984*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_1_SHFT 0x4 985*5113495bSYour Name 986*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_0_BMSK 0x00000008 987*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_0_SHFT 0x3 988*5113495bSYour Name 989*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL_IDLE_REQ_SM_BMSK 0x00000004 990*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL_IDLE_REQ_SM_SHFT 0x2 991*5113495bSYour Name 992*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_LCE_CCE_BMSK 0x00000002 993*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_LCE_CCE_SHFT 0x1 994*5113495bSYour Name 995*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PARSER_BMSK 0x00000001 996*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PARSER_SHFT 0x0 997*5113495bSYour Name 998*5113495bSYour Name //// Register TCL_R0_CREDIT_COUNT //// 999*5113495bSYour Name 1000*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ADDR(x) (x+0x00000684) 1001*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_PHYS(x) (x+0x00000684) 1002*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_RMSK 0x0001ffff 1003*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_SHFT 0 1004*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_IN(x) \ 1005*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), HWIO_TCL_R0_CREDIT_COUNT_RMSK) 1006*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_INM(x, mask) \ 1007*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), mask) 1008*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_OUT(x, val) \ 1009*5113495bSYour Name out_dword( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), val) 1010*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_OUTM(x, mask, val) \ 1011*5113495bSYour Name do {\ 1012*5113495bSYour Name HWIO_INTLOCK(); \ 1013*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), mask, val, HWIO_TCL_R0_CREDIT_COUNT_IN(x)); \ 1014*5113495bSYour Name HWIO_INTFREE();\ 1015*5113495bSYour Name } while (0) 1016*5113495bSYour Name 1017*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ENABLE_BMSK 0x00010000 1018*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ENABLE_SHFT 0x10 1019*5113495bSYour Name 1020*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_VAL_BMSK 0x0000ffff 1021*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_VAL_SHFT 0x0 1022*5113495bSYour Name 1023*5113495bSYour Name //// Register TCL_R0_CURRENT_CREDIT_COUNT //// 1024*5113495bSYour Name 1025*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x) (x+0x00000688) 1026*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_PHYS(x) (x+0x00000688) 1027*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_RMSK 0x0000ffff 1028*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_SHFT 0 1029*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_IN(x) \ 1030*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), HWIO_TCL_R0_CURRENT_CREDIT_COUNT_RMSK) 1031*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_INM(x, mask) \ 1032*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), mask) 1033*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_OUT(x, val) \ 1034*5113495bSYour Name out_dword( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), val) 1035*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_OUTM(x, mask, val) \ 1036*5113495bSYour Name do {\ 1037*5113495bSYour Name HWIO_INTLOCK(); \ 1038*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), mask, val, HWIO_TCL_R0_CURRENT_CREDIT_COUNT_IN(x)); \ 1039*5113495bSYour Name HWIO_INTFREE();\ 1040*5113495bSYour Name } while (0) 1041*5113495bSYour Name 1042*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_VAL_BMSK 0x0000ffff 1043*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_VAL_SHFT 0x0 1044*5113495bSYour Name 1045*5113495bSYour Name //// Register TCL_R0_S_PARE_REGISTER //// 1046*5113495bSYour Name 1047*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x) (x+0x0000068c) 1048*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_PHYS(x) (x+0x0000068c) 1049*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_RMSK 0xffffffff 1050*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_SHFT 0 1051*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_IN(x) \ 1052*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), HWIO_TCL_R0_S_PARE_REGISTER_RMSK) 1053*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_INM(x, mask) \ 1054*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), mask) 1055*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_OUT(x, val) \ 1056*5113495bSYour Name out_dword( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), val) 1057*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_OUTM(x, mask, val) \ 1058*5113495bSYour Name do {\ 1059*5113495bSYour Name HWIO_INTLOCK(); \ 1060*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), mask, val, HWIO_TCL_R0_S_PARE_REGISTER_IN(x)); \ 1061*5113495bSYour Name HWIO_INTFREE();\ 1062*5113495bSYour Name } while (0) 1063*5113495bSYour Name 1064*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_VAL_BMSK 0xffffffff 1065*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_VAL_SHFT 0x0 1066*5113495bSYour Name 1067*5113495bSYour Name //// Register TCL_R0_MISC_CTRL //// 1068*5113495bSYour Name 1069*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_ADDR(x) (x+0x00000690) 1070*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_PHYS(x) (x+0x00000690) 1071*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_RMSK 0x00000003 1072*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_SHFT 0 1073*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_IN(x) \ 1074*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_MISC_CTRL_ADDR(x), HWIO_TCL_R0_MISC_CTRL_RMSK) 1075*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_INM(x, mask) \ 1076*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_MISC_CTRL_ADDR(x), mask) 1077*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_OUT(x, val) \ 1078*5113495bSYour Name out_dword( HWIO_TCL_R0_MISC_CTRL_ADDR(x), val) 1079*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_OUTM(x, mask, val) \ 1080*5113495bSYour Name do {\ 1081*5113495bSYour Name HWIO_INTLOCK(); \ 1082*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_MISC_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_MISC_CTRL_IN(x)); \ 1083*5113495bSYour Name HWIO_INTFREE();\ 1084*5113495bSYour Name } while (0) 1085*5113495bSYour Name 1086*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_DATA_CORRUPT_FIX_DISABLE_CHK_BIT_BMSK 0x00000002 1087*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_DATA_CORRUPT_FIX_DISABLE_CHK_BIT_SHFT 0x1 1088*5113495bSYour Name 1089*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_MSI_DISABLE_CHK_BIT_BMSK 0x00000001 1090*5113495bSYour Name #define HWIO_TCL_R0_MISC_CTRL_MSI_DISABLE_CHK_BIT_SHFT 0x0 1091*5113495bSYour Name 1092*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_BASE_LSB //// 1093*5113495bSYour Name 1094*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x) (x+0x00000694) 1095*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_PHYS(x) (x+0x00000694) 1096*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RMSK 0xffffffff 1097*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_SHFT 0 1098*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_IN(x) \ 1099*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RMSK) 1100*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_INM(x, mask) \ 1101*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), mask) 1102*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_OUT(x, val) \ 1103*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), val) 1104*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_OUTM(x, mask, val) \ 1105*5113495bSYour Name do {\ 1106*5113495bSYour Name HWIO_INTLOCK(); \ 1107*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_IN(x)); \ 1108*5113495bSYour Name HWIO_INTFREE();\ 1109*5113495bSYour Name } while (0) 1110*5113495bSYour Name 1111*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1112*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1113*5113495bSYour Name 1114*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_BASE_MSB //// 1115*5113495bSYour Name 1116*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x) (x+0x00000698) 1117*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_PHYS(x) (x+0x00000698) 1118*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RMSK 0x0fffffff 1119*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_SHFT 0 1120*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_IN(x) \ 1121*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RMSK) 1122*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_INM(x, mask) \ 1123*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), mask) 1124*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_OUT(x, val) \ 1125*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), val) 1126*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_OUTM(x, mask, val) \ 1127*5113495bSYour Name do {\ 1128*5113495bSYour Name HWIO_INTLOCK(); \ 1129*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_IN(x)); \ 1130*5113495bSYour Name HWIO_INTFREE();\ 1131*5113495bSYour Name } while (0) 1132*5113495bSYour Name 1133*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1134*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1135*5113495bSYour Name 1136*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1137*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1138*5113495bSYour Name 1139*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_ID //// 1140*5113495bSYour Name 1141*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x) (x+0x0000069c) 1142*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_PHYS(x) (x+0x0000069c) 1143*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_RMSK 0x000000ff 1144*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_SHFT 0 1145*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_IN(x) \ 1146*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_ID_RMSK) 1147*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_INM(x, mask) \ 1148*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), mask) 1149*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_OUT(x, val) \ 1150*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), val) 1151*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_OUTM(x, mask, val) \ 1152*5113495bSYour Name do {\ 1153*5113495bSYour Name HWIO_INTLOCK(); \ 1154*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_ID_IN(x)); \ 1155*5113495bSYour Name HWIO_INTFREE();\ 1156*5113495bSYour Name } while (0) 1157*5113495bSYour Name 1158*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1159*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ENTRY_SIZE_SHFT 0x0 1160*5113495bSYour Name 1161*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_STATUS //// 1162*5113495bSYour Name 1163*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x) (x+0x000006a0) 1164*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_PHYS(x) (x+0x000006a0) 1165*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_RMSK 0xffffffff 1166*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_SHFT 0 1167*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_IN(x) \ 1168*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_STATUS_RMSK) 1169*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_INM(x, mask) \ 1170*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), mask) 1171*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_OUT(x, val) \ 1172*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), val) 1173*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_OUTM(x, mask, val) \ 1174*5113495bSYour Name do {\ 1175*5113495bSYour Name HWIO_INTLOCK(); \ 1176*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_STATUS_IN(x)); \ 1177*5113495bSYour Name HWIO_INTFREE();\ 1178*5113495bSYour Name } while (0) 1179*5113495bSYour Name 1180*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1181*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1182*5113495bSYour Name 1183*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1184*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1185*5113495bSYour Name 1186*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MISC //// 1187*5113495bSYour Name 1188*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x) (x+0x000006a4) 1189*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_PHYS(x) (x+0x000006a4) 1190*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RMSK 0x003fffff 1191*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SHFT 0 1192*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_IN(x) \ 1193*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MISC_RMSK) 1194*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_INM(x, mask) \ 1195*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), mask) 1196*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_OUT(x, val) \ 1197*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), val) 1198*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_OUTM(x, mask, val) \ 1199*5113495bSYour Name do {\ 1200*5113495bSYour Name HWIO_INTLOCK(); \ 1201*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MISC_IN(x)); \ 1202*5113495bSYour Name HWIO_INTFREE();\ 1203*5113495bSYour Name } while (0) 1204*5113495bSYour Name 1205*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1206*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SPARE_CONTROL_SHFT 0xe 1207*5113495bSYour Name 1208*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1209*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1210*5113495bSYour Name 1211*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1212*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1213*5113495bSYour Name 1214*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1215*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1216*5113495bSYour Name 1217*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1218*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_ENABLE_SHFT 0x6 1219*5113495bSYour Name 1220*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1221*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1222*5113495bSYour Name 1223*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1224*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1225*5113495bSYour Name 1226*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1227*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1228*5113495bSYour Name 1229*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1230*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SECURITY_BIT_SHFT 0x2 1231*5113495bSYour Name 1232*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1233*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1234*5113495bSYour Name 1235*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1236*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1237*5113495bSYour Name 1238*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_TP_ADDR_LSB //// 1239*5113495bSYour Name 1240*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x) (x+0x000006b0) 1241*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_PHYS(x) (x+0x000006b0) 1242*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_RMSK 0xffffffff 1243*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_SHFT 0 1244*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_IN(x) \ 1245*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_RMSK) 1246*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_INM(x, mask) \ 1247*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask) 1248*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_OUT(x, val) \ 1249*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), val) 1250*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 1251*5113495bSYour Name do {\ 1252*5113495bSYour Name HWIO_INTLOCK(); \ 1253*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_IN(x)); \ 1254*5113495bSYour Name HWIO_INTFREE();\ 1255*5113495bSYour Name } while (0) 1256*5113495bSYour Name 1257*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 1258*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 1259*5113495bSYour Name 1260*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_TP_ADDR_MSB //// 1261*5113495bSYour Name 1262*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x) (x+0x000006b4) 1263*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_PHYS(x) (x+0x000006b4) 1264*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_RMSK 0x000000ff 1265*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_SHFT 0 1266*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_IN(x) \ 1267*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_RMSK) 1268*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_INM(x, mask) \ 1269*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask) 1270*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_OUT(x, val) \ 1271*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), val) 1272*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 1273*5113495bSYour Name do {\ 1274*5113495bSYour Name HWIO_INTLOCK(); \ 1275*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_IN(x)); \ 1276*5113495bSYour Name HWIO_INTFREE();\ 1277*5113495bSYour Name } while (0) 1278*5113495bSYour Name 1279*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 1280*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 1281*5113495bSYour Name 1282*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0 //// 1283*5113495bSYour Name 1284*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000006c4) 1285*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000006c4) 1286*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 1287*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 1288*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 1289*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK) 1290*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 1291*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 1292*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 1293*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 1294*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 1295*5113495bSYour Name do {\ 1296*5113495bSYour Name HWIO_INTLOCK(); \ 1297*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 1298*5113495bSYour Name HWIO_INTFREE();\ 1299*5113495bSYour Name } while (0) 1300*5113495bSYour Name 1301*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 1302*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 1303*5113495bSYour Name 1304*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 1305*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 1306*5113495bSYour Name 1307*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 1308*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 1309*5113495bSYour Name 1310*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1 //// 1311*5113495bSYour Name 1312*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000006c8) 1313*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000006c8) 1314*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 1315*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 1316*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 1317*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK) 1318*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 1319*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 1320*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 1321*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 1322*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 1323*5113495bSYour Name do {\ 1324*5113495bSYour Name HWIO_INTLOCK(); \ 1325*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 1326*5113495bSYour Name HWIO_INTFREE();\ 1327*5113495bSYour Name } while (0) 1328*5113495bSYour Name 1329*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 1330*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 1331*5113495bSYour Name 1332*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS //// 1333*5113495bSYour Name 1334*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000006cc) 1335*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000006cc) 1336*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 1337*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_SHFT 0 1338*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_IN(x) \ 1339*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_RMSK) 1340*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 1341*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 1342*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 1343*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), val) 1344*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 1345*5113495bSYour Name do {\ 1346*5113495bSYour Name HWIO_INTLOCK(); \ 1347*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_IN(x)); \ 1348*5113495bSYour Name HWIO_INTFREE();\ 1349*5113495bSYour Name } while (0) 1350*5113495bSYour Name 1351*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 1352*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 1353*5113495bSYour Name 1354*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 1355*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 1356*5113495bSYour Name 1357*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 1358*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 1359*5113495bSYour Name 1360*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER //// 1361*5113495bSYour Name 1362*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000006d0) 1363*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000006d0) 1364*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 1365*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 1366*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 1367*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK) 1368*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 1369*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 1370*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 1371*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 1372*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 1373*5113495bSYour Name do {\ 1374*5113495bSYour Name HWIO_INTLOCK(); \ 1375*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 1376*5113495bSYour Name HWIO_INTFREE();\ 1377*5113495bSYour Name } while (0) 1378*5113495bSYour Name 1379*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 1380*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 1381*5113495bSYour Name 1382*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER //// 1383*5113495bSYour Name 1384*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000006d4) 1385*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000006d4) 1386*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 1387*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 1388*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 1389*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK) 1390*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 1391*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 1392*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 1393*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 1394*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 1395*5113495bSYour Name do {\ 1396*5113495bSYour Name HWIO_INTLOCK(); \ 1397*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 1398*5113495bSYour Name HWIO_INTFREE();\ 1399*5113495bSYour Name } while (0) 1400*5113495bSYour Name 1401*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 1402*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 1403*5113495bSYour Name 1404*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS //// 1405*5113495bSYour Name 1406*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000006d8) 1407*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000006d8) 1408*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 1409*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 1410*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 1411*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK) 1412*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 1413*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 1414*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 1415*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 1416*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 1417*5113495bSYour Name do {\ 1418*5113495bSYour Name HWIO_INTLOCK(); \ 1419*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 1420*5113495bSYour Name HWIO_INTFREE();\ 1421*5113495bSYour Name } while (0) 1422*5113495bSYour Name 1423*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 1424*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 1425*5113495bSYour Name 1426*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 1427*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 1428*5113495bSYour Name 1429*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB //// 1430*5113495bSYour Name 1431*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000006dc) 1432*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000006dc) 1433*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 1434*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_SHFT 0 1435*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_IN(x) \ 1436*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_RMSK) 1437*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_INM(x, mask) \ 1438*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask) 1439*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_OUT(x, val) \ 1440*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), val) 1441*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 1442*5113495bSYour Name do {\ 1443*5113495bSYour Name HWIO_INTLOCK(); \ 1444*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_IN(x)); \ 1445*5113495bSYour Name HWIO_INTFREE();\ 1446*5113495bSYour Name } while (0) 1447*5113495bSYour Name 1448*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 1449*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 1450*5113495bSYour Name 1451*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB //// 1452*5113495bSYour Name 1453*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000006e0) 1454*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000006e0) 1455*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 1456*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_SHFT 0 1457*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_IN(x) \ 1458*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_RMSK) 1459*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_INM(x, mask) \ 1460*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask) 1461*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_OUT(x, val) \ 1462*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), val) 1463*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 1464*5113495bSYour Name do {\ 1465*5113495bSYour Name HWIO_INTLOCK(); \ 1466*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_IN(x)); \ 1467*5113495bSYour Name HWIO_INTFREE();\ 1468*5113495bSYour Name } while (0) 1469*5113495bSYour Name 1470*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 1471*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 1472*5113495bSYour Name 1473*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 1474*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 1475*5113495bSYour Name 1476*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_DATA //// 1477*5113495bSYour Name 1478*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x) (x+0x000006e4) 1479*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_PHYS(x) (x+0x000006e4) 1480*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_RMSK 0xffffffff 1481*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_SHFT 0 1482*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_IN(x) \ 1483*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_RMSK) 1484*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_INM(x, mask) \ 1485*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), mask) 1486*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_OUT(x, val) \ 1487*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), val) 1488*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_OUTM(x, mask, val) \ 1489*5113495bSYour Name do {\ 1490*5113495bSYour Name HWIO_INTLOCK(); \ 1491*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_IN(x)); \ 1492*5113495bSYour Name HWIO_INTFREE();\ 1493*5113495bSYour Name } while (0) 1494*5113495bSYour Name 1495*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 1496*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_VALUE_SHFT 0x0 1497*5113495bSYour Name 1498*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET //// 1499*5113495bSYour Name 1500*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000006e8) 1501*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000006e8) 1502*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 1503*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_SHFT 0 1504*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_IN(x) \ 1505*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_RMSK) 1506*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 1507*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 1508*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 1509*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 1510*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 1511*5113495bSYour Name do {\ 1512*5113495bSYour Name HWIO_INTLOCK(); \ 1513*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_IN(x)); \ 1514*5113495bSYour Name HWIO_INTFREE();\ 1515*5113495bSYour Name } while (0) 1516*5113495bSYour Name 1517*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 1518*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 1519*5113495bSYour Name 1520*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_BASE_LSB //// 1521*5113495bSYour Name 1522*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x) (x+0x000006ec) 1523*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_PHYS(x) (x+0x000006ec) 1524*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RMSK 0xffffffff 1525*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_SHFT 0 1526*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_IN(x) \ 1527*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RMSK) 1528*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_INM(x, mask) \ 1529*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), mask) 1530*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_OUT(x, val) \ 1531*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), val) 1532*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_OUTM(x, mask, val) \ 1533*5113495bSYour Name do {\ 1534*5113495bSYour Name HWIO_INTLOCK(); \ 1535*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_IN(x)); \ 1536*5113495bSYour Name HWIO_INTFREE();\ 1537*5113495bSYour Name } while (0) 1538*5113495bSYour Name 1539*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1540*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1541*5113495bSYour Name 1542*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_BASE_MSB //// 1543*5113495bSYour Name 1544*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x) (x+0x000006f0) 1545*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_PHYS(x) (x+0x000006f0) 1546*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RMSK 0x0fffffff 1547*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_SHFT 0 1548*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_IN(x) \ 1549*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RMSK) 1550*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_INM(x, mask) \ 1551*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), mask) 1552*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_OUT(x, val) \ 1553*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), val) 1554*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_OUTM(x, mask, val) \ 1555*5113495bSYour Name do {\ 1556*5113495bSYour Name HWIO_INTLOCK(); \ 1557*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_IN(x)); \ 1558*5113495bSYour Name HWIO_INTFREE();\ 1559*5113495bSYour Name } while (0) 1560*5113495bSYour Name 1561*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1562*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1563*5113495bSYour Name 1564*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1565*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1566*5113495bSYour Name 1567*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_ID //// 1568*5113495bSYour Name 1569*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x) (x+0x000006f4) 1570*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_PHYS(x) (x+0x000006f4) 1571*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_RMSK 0x000000ff 1572*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_SHFT 0 1573*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_IN(x) \ 1574*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_ID_RMSK) 1575*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_INM(x, mask) \ 1576*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), mask) 1577*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_OUT(x, val) \ 1578*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), val) 1579*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_OUTM(x, mask, val) \ 1580*5113495bSYour Name do {\ 1581*5113495bSYour Name HWIO_INTLOCK(); \ 1582*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_ID_IN(x)); \ 1583*5113495bSYour Name HWIO_INTFREE();\ 1584*5113495bSYour Name } while (0) 1585*5113495bSYour Name 1586*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1587*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ENTRY_SIZE_SHFT 0x0 1588*5113495bSYour Name 1589*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_STATUS //// 1590*5113495bSYour Name 1591*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x) (x+0x000006f8) 1592*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_PHYS(x) (x+0x000006f8) 1593*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_RMSK 0xffffffff 1594*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_SHFT 0 1595*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_IN(x) \ 1596*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_STATUS_RMSK) 1597*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_INM(x, mask) \ 1598*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), mask) 1599*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_OUT(x, val) \ 1600*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), val) 1601*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_OUTM(x, mask, val) \ 1602*5113495bSYour Name do {\ 1603*5113495bSYour Name HWIO_INTLOCK(); \ 1604*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_STATUS_IN(x)); \ 1605*5113495bSYour Name HWIO_INTFREE();\ 1606*5113495bSYour Name } while (0) 1607*5113495bSYour Name 1608*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1609*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1610*5113495bSYour Name 1611*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1612*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1613*5113495bSYour Name 1614*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MISC //// 1615*5113495bSYour Name 1616*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x) (x+0x000006fc) 1617*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_PHYS(x) (x+0x000006fc) 1618*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RMSK 0x003fffff 1619*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SHFT 0 1620*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_IN(x) \ 1621*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MISC_RMSK) 1622*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_INM(x, mask) \ 1623*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), mask) 1624*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_OUT(x, val) \ 1625*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), val) 1626*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_OUTM(x, mask, val) \ 1627*5113495bSYour Name do {\ 1628*5113495bSYour Name HWIO_INTLOCK(); \ 1629*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MISC_IN(x)); \ 1630*5113495bSYour Name HWIO_INTFREE();\ 1631*5113495bSYour Name } while (0) 1632*5113495bSYour Name 1633*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1634*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SPARE_CONTROL_SHFT 0xe 1635*5113495bSYour Name 1636*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1637*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1638*5113495bSYour Name 1639*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1640*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1641*5113495bSYour Name 1642*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1643*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1644*5113495bSYour Name 1645*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1646*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_ENABLE_SHFT 0x6 1647*5113495bSYour Name 1648*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1649*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1650*5113495bSYour Name 1651*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1652*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1653*5113495bSYour Name 1654*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1655*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1656*5113495bSYour Name 1657*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1658*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SECURITY_BIT_SHFT 0x2 1659*5113495bSYour Name 1660*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1661*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1662*5113495bSYour Name 1663*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1664*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1665*5113495bSYour Name 1666*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_TP_ADDR_LSB //// 1667*5113495bSYour Name 1668*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000708) 1669*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000708) 1670*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_RMSK 0xffffffff 1671*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_SHFT 0 1672*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_IN(x) \ 1673*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_RMSK) 1674*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_INM(x, mask) \ 1675*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), mask) 1676*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_OUT(x, val) \ 1677*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), val) 1678*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 1679*5113495bSYour Name do {\ 1680*5113495bSYour Name HWIO_INTLOCK(); \ 1681*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_IN(x)); \ 1682*5113495bSYour Name HWIO_INTFREE();\ 1683*5113495bSYour Name } while (0) 1684*5113495bSYour Name 1685*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 1686*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 1687*5113495bSYour Name 1688*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_TP_ADDR_MSB //// 1689*5113495bSYour Name 1690*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x) (x+0x0000070c) 1691*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_PHYS(x) (x+0x0000070c) 1692*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_RMSK 0x000000ff 1693*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_SHFT 0 1694*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_IN(x) \ 1695*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_RMSK) 1696*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_INM(x, mask) \ 1697*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), mask) 1698*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_OUT(x, val) \ 1699*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), val) 1700*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 1701*5113495bSYour Name do {\ 1702*5113495bSYour Name HWIO_INTLOCK(); \ 1703*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_IN(x)); \ 1704*5113495bSYour Name HWIO_INTFREE();\ 1705*5113495bSYour Name } while (0) 1706*5113495bSYour Name 1707*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 1708*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 1709*5113495bSYour Name 1710*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0 //// 1711*5113495bSYour Name 1712*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x0000071c) 1713*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x0000071c) 1714*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 1715*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 1716*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 1717*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_RMSK) 1718*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 1719*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 1720*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 1721*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 1722*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 1723*5113495bSYour Name do {\ 1724*5113495bSYour Name HWIO_INTLOCK(); \ 1725*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 1726*5113495bSYour Name HWIO_INTFREE();\ 1727*5113495bSYour Name } while (0) 1728*5113495bSYour Name 1729*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 1730*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 1731*5113495bSYour Name 1732*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 1733*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 1734*5113495bSYour Name 1735*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 1736*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 1737*5113495bSYour Name 1738*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1 //// 1739*5113495bSYour Name 1740*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000720) 1741*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000720) 1742*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 1743*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 1744*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 1745*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_RMSK) 1746*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 1747*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 1748*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 1749*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 1750*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 1751*5113495bSYour Name do {\ 1752*5113495bSYour Name HWIO_INTLOCK(); \ 1753*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 1754*5113495bSYour Name HWIO_INTFREE();\ 1755*5113495bSYour Name } while (0) 1756*5113495bSYour Name 1757*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 1758*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 1759*5113495bSYour Name 1760*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS //// 1761*5113495bSYour Name 1762*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000724) 1763*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000724) 1764*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 1765*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_SHFT 0 1766*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_IN(x) \ 1767*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_RMSK) 1768*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 1769*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 1770*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 1771*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), val) 1772*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 1773*5113495bSYour Name do {\ 1774*5113495bSYour Name HWIO_INTLOCK(); \ 1775*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_IN(x)); \ 1776*5113495bSYour Name HWIO_INTFREE();\ 1777*5113495bSYour Name } while (0) 1778*5113495bSYour Name 1779*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 1780*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 1781*5113495bSYour Name 1782*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 1783*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 1784*5113495bSYour Name 1785*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 1786*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 1787*5113495bSYour Name 1788*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER //// 1789*5113495bSYour Name 1790*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000728) 1791*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000728) 1792*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 1793*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 1794*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 1795*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RMSK) 1796*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 1797*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 1798*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 1799*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 1800*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 1801*5113495bSYour Name do {\ 1802*5113495bSYour Name HWIO_INTLOCK(); \ 1803*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 1804*5113495bSYour Name HWIO_INTFREE();\ 1805*5113495bSYour Name } while (0) 1806*5113495bSYour Name 1807*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 1808*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 1809*5113495bSYour Name 1810*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER //// 1811*5113495bSYour Name 1812*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x0000072c) 1813*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x0000072c) 1814*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 1815*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 1816*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 1817*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_RMSK) 1818*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 1819*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 1820*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 1821*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 1822*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 1823*5113495bSYour Name do {\ 1824*5113495bSYour Name HWIO_INTLOCK(); \ 1825*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 1826*5113495bSYour Name HWIO_INTFREE();\ 1827*5113495bSYour Name } while (0) 1828*5113495bSYour Name 1829*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 1830*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 1831*5113495bSYour Name 1832*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS //// 1833*5113495bSYour Name 1834*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000730) 1835*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000730) 1836*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 1837*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 1838*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 1839*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_RMSK) 1840*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 1841*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 1842*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 1843*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 1844*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 1845*5113495bSYour Name do {\ 1846*5113495bSYour Name HWIO_INTLOCK(); \ 1847*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 1848*5113495bSYour Name HWIO_INTFREE();\ 1849*5113495bSYour Name } while (0) 1850*5113495bSYour Name 1851*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 1852*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 1853*5113495bSYour Name 1854*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 1855*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 1856*5113495bSYour Name 1857*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB //// 1858*5113495bSYour Name 1859*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000734) 1860*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000734) 1861*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_RMSK 0xffffffff 1862*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_SHFT 0 1863*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_IN(x) \ 1864*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_RMSK) 1865*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_INM(x, mask) \ 1866*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), mask) 1867*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_OUT(x, val) \ 1868*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), val) 1869*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 1870*5113495bSYour Name do {\ 1871*5113495bSYour Name HWIO_INTLOCK(); \ 1872*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_IN(x)); \ 1873*5113495bSYour Name HWIO_INTFREE();\ 1874*5113495bSYour Name } while (0) 1875*5113495bSYour Name 1876*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 1877*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 1878*5113495bSYour Name 1879*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB //// 1880*5113495bSYour Name 1881*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000738) 1882*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000738) 1883*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_RMSK 0x000001ff 1884*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_SHFT 0 1885*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_IN(x) \ 1886*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_RMSK) 1887*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_INM(x, mask) \ 1888*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), mask) 1889*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_OUT(x, val) \ 1890*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), val) 1891*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 1892*5113495bSYour Name do {\ 1893*5113495bSYour Name HWIO_INTLOCK(); \ 1894*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_IN(x)); \ 1895*5113495bSYour Name HWIO_INTFREE();\ 1896*5113495bSYour Name } while (0) 1897*5113495bSYour Name 1898*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 1899*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 1900*5113495bSYour Name 1901*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 1902*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 1903*5113495bSYour Name 1904*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_DATA //// 1905*5113495bSYour Name 1906*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x) (x+0x0000073c) 1907*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_PHYS(x) (x+0x0000073c) 1908*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_RMSK 0xffffffff 1909*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_SHFT 0 1910*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_IN(x) \ 1911*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_RMSK) 1912*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_INM(x, mask) \ 1913*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), mask) 1914*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_OUT(x, val) \ 1915*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), val) 1916*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_OUTM(x, mask, val) \ 1917*5113495bSYour Name do {\ 1918*5113495bSYour Name HWIO_INTLOCK(); \ 1919*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_IN(x)); \ 1920*5113495bSYour Name HWIO_INTFREE();\ 1921*5113495bSYour Name } while (0) 1922*5113495bSYour Name 1923*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 1924*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_VALUE_SHFT 0x0 1925*5113495bSYour Name 1926*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET //// 1927*5113495bSYour Name 1928*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000740) 1929*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000740) 1930*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 1931*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_SHFT 0 1932*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_IN(x) \ 1933*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_RMSK) 1934*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 1935*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 1936*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 1937*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), val) 1938*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 1939*5113495bSYour Name do {\ 1940*5113495bSYour Name HWIO_INTLOCK(); \ 1941*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_IN(x)); \ 1942*5113495bSYour Name HWIO_INTFREE();\ 1943*5113495bSYour Name } while (0) 1944*5113495bSYour Name 1945*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 1946*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 1947*5113495bSYour Name 1948*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_BASE_LSB //// 1949*5113495bSYour Name 1950*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x) (x+0x00000744) 1951*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_PHYS(x) (x+0x00000744) 1952*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RMSK 0xffffffff 1953*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_SHFT 0 1954*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_IN(x) \ 1955*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RMSK) 1956*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_INM(x, mask) \ 1957*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), mask) 1958*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_OUT(x, val) \ 1959*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), val) 1960*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_OUTM(x, mask, val) \ 1961*5113495bSYour Name do {\ 1962*5113495bSYour Name HWIO_INTLOCK(); \ 1963*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_IN(x)); \ 1964*5113495bSYour Name HWIO_INTFREE();\ 1965*5113495bSYour Name } while (0) 1966*5113495bSYour Name 1967*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1968*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1969*5113495bSYour Name 1970*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_BASE_MSB //// 1971*5113495bSYour Name 1972*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x) (x+0x00000748) 1973*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_PHYS(x) (x+0x00000748) 1974*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RMSK 0x0fffffff 1975*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_SHFT 0 1976*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_IN(x) \ 1977*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RMSK) 1978*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_INM(x, mask) \ 1979*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), mask) 1980*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_OUT(x, val) \ 1981*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), val) 1982*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_OUTM(x, mask, val) \ 1983*5113495bSYour Name do {\ 1984*5113495bSYour Name HWIO_INTLOCK(); \ 1985*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_IN(x)); \ 1986*5113495bSYour Name HWIO_INTFREE();\ 1987*5113495bSYour Name } while (0) 1988*5113495bSYour Name 1989*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1990*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1991*5113495bSYour Name 1992*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1993*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1994*5113495bSYour Name 1995*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_ID //// 1996*5113495bSYour Name 1997*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x) (x+0x0000074c) 1998*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_PHYS(x) (x+0x0000074c) 1999*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_RMSK 0x000000ff 2000*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_SHFT 0 2001*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_IN(x) \ 2002*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_ID_RMSK) 2003*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_INM(x, mask) \ 2004*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), mask) 2005*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_OUT(x, val) \ 2006*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), val) 2007*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_OUTM(x, mask, val) \ 2008*5113495bSYour Name do {\ 2009*5113495bSYour Name HWIO_INTLOCK(); \ 2010*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_ID_IN(x)); \ 2011*5113495bSYour Name HWIO_INTFREE();\ 2012*5113495bSYour Name } while (0) 2013*5113495bSYour Name 2014*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2015*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ENTRY_SIZE_SHFT 0x0 2016*5113495bSYour Name 2017*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_STATUS //// 2018*5113495bSYour Name 2019*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x) (x+0x00000750) 2020*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_PHYS(x) (x+0x00000750) 2021*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_RMSK 0xffffffff 2022*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_SHFT 0 2023*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_IN(x) \ 2024*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_STATUS_RMSK) 2025*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_INM(x, mask) \ 2026*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), mask) 2027*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_OUT(x, val) \ 2028*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), val) 2029*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_OUTM(x, mask, val) \ 2030*5113495bSYour Name do {\ 2031*5113495bSYour Name HWIO_INTLOCK(); \ 2032*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_STATUS_IN(x)); \ 2033*5113495bSYour Name HWIO_INTFREE();\ 2034*5113495bSYour Name } while (0) 2035*5113495bSYour Name 2036*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2037*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2038*5113495bSYour Name 2039*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2040*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2041*5113495bSYour Name 2042*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MISC //// 2043*5113495bSYour Name 2044*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x) (x+0x00000754) 2045*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_PHYS(x) (x+0x00000754) 2046*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RMSK 0x003fffff 2047*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SHFT 0 2048*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_IN(x) \ 2049*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MISC_RMSK) 2050*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_INM(x, mask) \ 2051*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), mask) 2052*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_OUT(x, val) \ 2053*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), val) 2054*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_OUTM(x, mask, val) \ 2055*5113495bSYour Name do {\ 2056*5113495bSYour Name HWIO_INTLOCK(); \ 2057*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MISC_IN(x)); \ 2058*5113495bSYour Name HWIO_INTFREE();\ 2059*5113495bSYour Name } while (0) 2060*5113495bSYour Name 2061*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2062*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SPARE_CONTROL_SHFT 0xe 2063*5113495bSYour Name 2064*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2065*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2066*5113495bSYour Name 2067*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2068*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2069*5113495bSYour Name 2070*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2071*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2072*5113495bSYour Name 2073*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2074*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_ENABLE_SHFT 0x6 2075*5113495bSYour Name 2076*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2077*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2078*5113495bSYour Name 2079*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2080*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2081*5113495bSYour Name 2082*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2083*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2084*5113495bSYour Name 2085*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2086*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SECURITY_BIT_SHFT 0x2 2087*5113495bSYour Name 2088*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2089*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2090*5113495bSYour Name 2091*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2092*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2093*5113495bSYour Name 2094*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_TP_ADDR_LSB //// 2095*5113495bSYour Name 2096*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000760) 2097*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000760) 2098*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_RMSK 0xffffffff 2099*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_SHFT 0 2100*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_IN(x) \ 2101*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_RMSK) 2102*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_INM(x, mask) \ 2103*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), mask) 2104*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_OUT(x, val) \ 2105*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), val) 2106*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2107*5113495bSYour Name do {\ 2108*5113495bSYour Name HWIO_INTLOCK(); \ 2109*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_IN(x)); \ 2110*5113495bSYour Name HWIO_INTFREE();\ 2111*5113495bSYour Name } while (0) 2112*5113495bSYour Name 2113*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2114*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2115*5113495bSYour Name 2116*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_TP_ADDR_MSB //// 2117*5113495bSYour Name 2118*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000764) 2119*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000764) 2120*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_RMSK 0x000000ff 2121*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_SHFT 0 2122*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_IN(x) \ 2123*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_RMSK) 2124*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_INM(x, mask) \ 2125*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), mask) 2126*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_OUT(x, val) \ 2127*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), val) 2128*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2129*5113495bSYour Name do {\ 2130*5113495bSYour Name HWIO_INTLOCK(); \ 2131*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_IN(x)); \ 2132*5113495bSYour Name HWIO_INTFREE();\ 2133*5113495bSYour Name } while (0) 2134*5113495bSYour Name 2135*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2136*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2137*5113495bSYour Name 2138*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0 //// 2139*5113495bSYour Name 2140*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000774) 2141*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000774) 2142*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2143*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2144*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2145*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2146*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2147*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2148*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2149*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2150*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2151*5113495bSYour Name do {\ 2152*5113495bSYour Name HWIO_INTLOCK(); \ 2153*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2154*5113495bSYour Name HWIO_INTFREE();\ 2155*5113495bSYour Name } while (0) 2156*5113495bSYour Name 2157*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2158*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2159*5113495bSYour Name 2160*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2161*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2162*5113495bSYour Name 2163*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2164*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2165*5113495bSYour Name 2166*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1 //// 2167*5113495bSYour Name 2168*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000778) 2169*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000778) 2170*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2171*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2172*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2173*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2174*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2175*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2176*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2177*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2178*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2179*5113495bSYour Name do {\ 2180*5113495bSYour Name HWIO_INTLOCK(); \ 2181*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2182*5113495bSYour Name HWIO_INTFREE();\ 2183*5113495bSYour Name } while (0) 2184*5113495bSYour Name 2185*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2186*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2187*5113495bSYour Name 2188*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS //// 2189*5113495bSYour Name 2190*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000077c) 2191*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000077c) 2192*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2193*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_SHFT 0 2194*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_IN(x) \ 2195*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_RMSK) 2196*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2197*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2198*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2199*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2200*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2201*5113495bSYour Name do {\ 2202*5113495bSYour Name HWIO_INTLOCK(); \ 2203*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_IN(x)); \ 2204*5113495bSYour Name HWIO_INTFREE();\ 2205*5113495bSYour Name } while (0) 2206*5113495bSYour Name 2207*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2208*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2209*5113495bSYour Name 2210*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2211*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2212*5113495bSYour Name 2213*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2214*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2215*5113495bSYour Name 2216*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER //// 2217*5113495bSYour Name 2218*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000780) 2219*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000780) 2220*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2221*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2222*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2223*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2224*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2225*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2226*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2227*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2228*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2229*5113495bSYour Name do {\ 2230*5113495bSYour Name HWIO_INTLOCK(); \ 2231*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2232*5113495bSYour Name HWIO_INTFREE();\ 2233*5113495bSYour Name } while (0) 2234*5113495bSYour Name 2235*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2236*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2237*5113495bSYour Name 2238*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER //// 2239*5113495bSYour Name 2240*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000784) 2241*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000784) 2242*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 2243*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 2244*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 2245*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_RMSK) 2246*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 2247*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 2248*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 2249*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 2250*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 2251*5113495bSYour Name do {\ 2252*5113495bSYour Name HWIO_INTLOCK(); \ 2253*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 2254*5113495bSYour Name HWIO_INTFREE();\ 2255*5113495bSYour Name } while (0) 2256*5113495bSYour Name 2257*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 2258*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 2259*5113495bSYour Name 2260*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS //// 2261*5113495bSYour Name 2262*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000788) 2263*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000788) 2264*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 2265*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 2266*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 2267*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_RMSK) 2268*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 2269*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 2270*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 2271*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 2272*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 2273*5113495bSYour Name do {\ 2274*5113495bSYour Name HWIO_INTLOCK(); \ 2275*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 2276*5113495bSYour Name HWIO_INTFREE();\ 2277*5113495bSYour Name } while (0) 2278*5113495bSYour Name 2279*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 2280*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 2281*5113495bSYour Name 2282*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 2283*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 2284*5113495bSYour Name 2285*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB //// 2286*5113495bSYour Name 2287*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000078c) 2288*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000078c) 2289*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_RMSK 0xffffffff 2290*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_SHFT 0 2291*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_IN(x) \ 2292*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_RMSK) 2293*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_INM(x, mask) \ 2294*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), mask) 2295*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_OUT(x, val) \ 2296*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), val) 2297*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 2298*5113495bSYour Name do {\ 2299*5113495bSYour Name HWIO_INTLOCK(); \ 2300*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_IN(x)); \ 2301*5113495bSYour Name HWIO_INTFREE();\ 2302*5113495bSYour Name } while (0) 2303*5113495bSYour Name 2304*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 2305*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 2306*5113495bSYour Name 2307*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB //// 2308*5113495bSYour Name 2309*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000790) 2310*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000790) 2311*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_RMSK 0x000001ff 2312*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_SHFT 0 2313*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_IN(x) \ 2314*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_RMSK) 2315*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_INM(x, mask) \ 2316*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), mask) 2317*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_OUT(x, val) \ 2318*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), val) 2319*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 2320*5113495bSYour Name do {\ 2321*5113495bSYour Name HWIO_INTLOCK(); \ 2322*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_IN(x)); \ 2323*5113495bSYour Name HWIO_INTFREE();\ 2324*5113495bSYour Name } while (0) 2325*5113495bSYour Name 2326*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 2327*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 2328*5113495bSYour Name 2329*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 2330*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 2331*5113495bSYour Name 2332*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_DATA //// 2333*5113495bSYour Name 2334*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x) (x+0x00000794) 2335*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_PHYS(x) (x+0x00000794) 2336*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_RMSK 0xffffffff 2337*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_SHFT 0 2338*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_IN(x) \ 2339*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_RMSK) 2340*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_INM(x, mask) \ 2341*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), mask) 2342*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_OUT(x, val) \ 2343*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), val) 2344*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_OUTM(x, mask, val) \ 2345*5113495bSYour Name do {\ 2346*5113495bSYour Name HWIO_INTLOCK(); \ 2347*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_IN(x)); \ 2348*5113495bSYour Name HWIO_INTFREE();\ 2349*5113495bSYour Name } while (0) 2350*5113495bSYour Name 2351*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 2352*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_VALUE_SHFT 0x0 2353*5113495bSYour Name 2354*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET //// 2355*5113495bSYour Name 2356*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000798) 2357*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000798) 2358*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 2359*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_SHFT 0 2360*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_IN(x) \ 2361*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_RMSK) 2362*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 2363*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 2364*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 2365*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), val) 2366*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 2367*5113495bSYour Name do {\ 2368*5113495bSYour Name HWIO_INTLOCK(); \ 2369*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_IN(x)); \ 2370*5113495bSYour Name HWIO_INTFREE();\ 2371*5113495bSYour Name } while (0) 2372*5113495bSYour Name 2373*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 2374*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 2375*5113495bSYour Name 2376*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB //// 2377*5113495bSYour Name 2378*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x) (x+0x0000079c) 2379*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_PHYS(x) (x+0x0000079c) 2380*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RMSK 0xffffffff 2381*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_SHFT 0 2382*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_IN(x) \ 2383*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RMSK) 2384*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_INM(x, mask) \ 2385*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), mask) 2386*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_OUT(x, val) \ 2387*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), val) 2388*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_OUTM(x, mask, val) \ 2389*5113495bSYour Name do {\ 2390*5113495bSYour Name HWIO_INTLOCK(); \ 2391*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_IN(x)); \ 2392*5113495bSYour Name HWIO_INTFREE();\ 2393*5113495bSYour Name } while (0) 2394*5113495bSYour Name 2395*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 2396*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 2397*5113495bSYour Name 2398*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB //// 2399*5113495bSYour Name 2400*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x) (x+0x000007a0) 2401*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_PHYS(x) (x+0x000007a0) 2402*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RMSK 0x0fffffff 2403*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_SHFT 0 2404*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_IN(x) \ 2405*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RMSK) 2406*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_INM(x, mask) \ 2407*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), mask) 2408*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_OUT(x, val) \ 2409*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), val) 2410*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_OUTM(x, mask, val) \ 2411*5113495bSYour Name do {\ 2412*5113495bSYour Name HWIO_INTLOCK(); \ 2413*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_IN(x)); \ 2414*5113495bSYour Name HWIO_INTFREE();\ 2415*5113495bSYour Name } while (0) 2416*5113495bSYour Name 2417*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 2418*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_SIZE_SHFT 0x8 2419*5113495bSYour Name 2420*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 2421*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 2422*5113495bSYour Name 2423*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_ID //// 2424*5113495bSYour Name 2425*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x) (x+0x000007a4) 2426*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_PHYS(x) (x+0x000007a4) 2427*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_RMSK 0x000000ff 2428*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_SHFT 0 2429*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_IN(x) \ 2430*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_RMSK) 2431*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_INM(x, mask) \ 2432*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), mask) 2433*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_OUT(x, val) \ 2434*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), val) 2435*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_OUTM(x, mask, val) \ 2436*5113495bSYour Name do {\ 2437*5113495bSYour Name HWIO_INTLOCK(); \ 2438*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_IN(x)); \ 2439*5113495bSYour Name HWIO_INTFREE();\ 2440*5113495bSYour Name } while (0) 2441*5113495bSYour Name 2442*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2443*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ENTRY_SIZE_SHFT 0x0 2444*5113495bSYour Name 2445*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_STATUS //// 2446*5113495bSYour Name 2447*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x) (x+0x000007a8) 2448*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_PHYS(x) (x+0x000007a8) 2449*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_RMSK 0xffffffff 2450*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_SHFT 0 2451*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_IN(x) \ 2452*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_RMSK) 2453*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_INM(x, mask) \ 2454*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), mask) 2455*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_OUT(x, val) \ 2456*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), val) 2457*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_OUTM(x, mask, val) \ 2458*5113495bSYour Name do {\ 2459*5113495bSYour Name HWIO_INTLOCK(); \ 2460*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_IN(x)); \ 2461*5113495bSYour Name HWIO_INTFREE();\ 2462*5113495bSYour Name } while (0) 2463*5113495bSYour Name 2464*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2465*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2466*5113495bSYour Name 2467*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2468*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2469*5113495bSYour Name 2470*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MISC //// 2471*5113495bSYour Name 2472*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x) (x+0x000007ac) 2473*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_PHYS(x) (x+0x000007ac) 2474*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RMSK 0x003fffff 2475*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SHFT 0 2476*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_IN(x) \ 2477*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RMSK) 2478*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_INM(x, mask) \ 2479*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), mask) 2480*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_OUT(x, val) \ 2481*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), val) 2482*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_OUTM(x, mask, val) \ 2483*5113495bSYour Name do {\ 2484*5113495bSYour Name HWIO_INTLOCK(); \ 2485*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_IN(x)); \ 2486*5113495bSYour Name HWIO_INTFREE();\ 2487*5113495bSYour Name } while (0) 2488*5113495bSYour Name 2489*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2490*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SPARE_CONTROL_SHFT 0xe 2491*5113495bSYour Name 2492*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2493*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2494*5113495bSYour Name 2495*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2496*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2497*5113495bSYour Name 2498*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2499*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2500*5113495bSYour Name 2501*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2502*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_ENABLE_SHFT 0x6 2503*5113495bSYour Name 2504*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2505*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2506*5113495bSYour Name 2507*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2508*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2509*5113495bSYour Name 2510*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2511*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2512*5113495bSYour Name 2513*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2514*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SECURITY_BIT_SHFT 0x2 2515*5113495bSYour Name 2516*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2517*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2518*5113495bSYour Name 2519*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2520*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2521*5113495bSYour Name 2522*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB //// 2523*5113495bSYour Name 2524*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x) (x+0x000007b8) 2525*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_PHYS(x) (x+0x000007b8) 2526*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_RMSK 0xffffffff 2527*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_SHFT 0 2528*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_IN(x) \ 2529*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_RMSK) 2530*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_INM(x, mask) \ 2531*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), mask) 2532*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_OUT(x, val) \ 2533*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), val) 2534*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2535*5113495bSYour Name do {\ 2536*5113495bSYour Name HWIO_INTLOCK(); \ 2537*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_IN(x)); \ 2538*5113495bSYour Name HWIO_INTFREE();\ 2539*5113495bSYour Name } while (0) 2540*5113495bSYour Name 2541*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2542*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2543*5113495bSYour Name 2544*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB //// 2545*5113495bSYour Name 2546*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x) (x+0x000007bc) 2547*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_PHYS(x) (x+0x000007bc) 2548*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_RMSK 0x000000ff 2549*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_SHFT 0 2550*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_IN(x) \ 2551*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_RMSK) 2552*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_INM(x, mask) \ 2553*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), mask) 2554*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_OUT(x, val) \ 2555*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), val) 2556*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2557*5113495bSYour Name do {\ 2558*5113495bSYour Name HWIO_INTLOCK(); \ 2559*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_IN(x)); \ 2560*5113495bSYour Name HWIO_INTFREE();\ 2561*5113495bSYour Name } while (0) 2562*5113495bSYour Name 2563*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2564*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2565*5113495bSYour Name 2566*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0 //// 2567*5113495bSYour Name 2568*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000007cc) 2569*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000007cc) 2570*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2571*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2572*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2573*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2574*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2575*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2576*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2577*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2578*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2579*5113495bSYour Name do {\ 2580*5113495bSYour Name HWIO_INTLOCK(); \ 2581*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2582*5113495bSYour Name HWIO_INTFREE();\ 2583*5113495bSYour Name } while (0) 2584*5113495bSYour Name 2585*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2586*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2587*5113495bSYour Name 2588*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2589*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2590*5113495bSYour Name 2591*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2592*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2593*5113495bSYour Name 2594*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1 //// 2595*5113495bSYour Name 2596*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000007d0) 2597*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000007d0) 2598*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2599*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2600*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2601*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2602*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2603*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2604*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2605*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2606*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2607*5113495bSYour Name do {\ 2608*5113495bSYour Name HWIO_INTLOCK(); \ 2609*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2610*5113495bSYour Name HWIO_INTFREE();\ 2611*5113495bSYour Name } while (0) 2612*5113495bSYour Name 2613*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2614*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2615*5113495bSYour Name 2616*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS //// 2617*5113495bSYour Name 2618*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000007d4) 2619*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000007d4) 2620*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2621*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_SHFT 0 2622*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_IN(x) \ 2623*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_RMSK) 2624*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2625*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2626*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2627*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2628*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2629*5113495bSYour Name do {\ 2630*5113495bSYour Name HWIO_INTLOCK(); \ 2631*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_IN(x)); \ 2632*5113495bSYour Name HWIO_INTFREE();\ 2633*5113495bSYour Name } while (0) 2634*5113495bSYour Name 2635*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2636*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2637*5113495bSYour Name 2638*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2639*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2640*5113495bSYour Name 2641*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2642*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2643*5113495bSYour Name 2644*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER //// 2645*5113495bSYour Name 2646*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000007d8) 2647*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000007d8) 2648*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2649*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2650*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2651*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2652*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2653*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2654*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2655*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2656*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2657*5113495bSYour Name do {\ 2658*5113495bSYour Name HWIO_INTLOCK(); \ 2659*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2660*5113495bSYour Name HWIO_INTFREE();\ 2661*5113495bSYour Name } while (0) 2662*5113495bSYour Name 2663*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2664*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2665*5113495bSYour Name 2666*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER //// 2667*5113495bSYour Name 2668*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000007dc) 2669*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000007dc) 2670*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 2671*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 2672*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 2673*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_RMSK) 2674*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 2675*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 2676*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 2677*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 2678*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 2679*5113495bSYour Name do {\ 2680*5113495bSYour Name HWIO_INTLOCK(); \ 2681*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 2682*5113495bSYour Name HWIO_INTFREE();\ 2683*5113495bSYour Name } while (0) 2684*5113495bSYour Name 2685*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 2686*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 2687*5113495bSYour Name 2688*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS //// 2689*5113495bSYour Name 2690*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000007e0) 2691*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000007e0) 2692*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 2693*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 2694*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 2695*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_RMSK) 2696*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 2697*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 2698*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 2699*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 2700*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 2701*5113495bSYour Name do {\ 2702*5113495bSYour Name HWIO_INTLOCK(); \ 2703*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 2704*5113495bSYour Name HWIO_INTFREE();\ 2705*5113495bSYour Name } while (0) 2706*5113495bSYour Name 2707*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 2708*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 2709*5113495bSYour Name 2710*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 2711*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 2712*5113495bSYour Name 2713*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB //// 2714*5113495bSYour Name 2715*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000007e4) 2716*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000007e4) 2717*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_RMSK 0xffffffff 2718*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_SHFT 0 2719*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_IN(x) \ 2720*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_RMSK) 2721*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_INM(x, mask) \ 2722*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), mask) 2723*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_OUT(x, val) \ 2724*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), val) 2725*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 2726*5113495bSYour Name do {\ 2727*5113495bSYour Name HWIO_INTLOCK(); \ 2728*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_IN(x)); \ 2729*5113495bSYour Name HWIO_INTFREE();\ 2730*5113495bSYour Name } while (0) 2731*5113495bSYour Name 2732*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 2733*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 2734*5113495bSYour Name 2735*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB //// 2736*5113495bSYour Name 2737*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000007e8) 2738*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000007e8) 2739*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_RMSK 0x000001ff 2740*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_SHFT 0 2741*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_IN(x) \ 2742*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_RMSK) 2743*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_INM(x, mask) \ 2744*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), mask) 2745*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_OUT(x, val) \ 2746*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), val) 2747*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 2748*5113495bSYour Name do {\ 2749*5113495bSYour Name HWIO_INTLOCK(); \ 2750*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_IN(x)); \ 2751*5113495bSYour Name HWIO_INTFREE();\ 2752*5113495bSYour Name } while (0) 2753*5113495bSYour Name 2754*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 2755*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 2756*5113495bSYour Name 2757*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 2758*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 2759*5113495bSYour Name 2760*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA //// 2761*5113495bSYour Name 2762*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x) (x+0x000007ec) 2763*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_PHYS(x) (x+0x000007ec) 2764*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_RMSK 0xffffffff 2765*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_SHFT 0 2766*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_IN(x) \ 2767*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_RMSK) 2768*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_INM(x, mask) \ 2769*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), mask) 2770*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_OUT(x, val) \ 2771*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), val) 2772*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_OUTM(x, mask, val) \ 2773*5113495bSYour Name do {\ 2774*5113495bSYour Name HWIO_INTLOCK(); \ 2775*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_IN(x)); \ 2776*5113495bSYour Name HWIO_INTFREE();\ 2777*5113495bSYour Name } while (0) 2778*5113495bSYour Name 2779*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 2780*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_VALUE_SHFT 0x0 2781*5113495bSYour Name 2782*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET //// 2783*5113495bSYour Name 2784*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000007f0) 2785*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000007f0) 2786*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 2787*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_SHFT 0 2788*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_IN(x) \ 2789*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_RMSK) 2790*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 2791*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 2792*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 2793*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), val) 2794*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 2795*5113495bSYour Name do {\ 2796*5113495bSYour Name HWIO_INTLOCK(); \ 2797*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_IN(x)); \ 2798*5113495bSYour Name HWIO_INTFREE();\ 2799*5113495bSYour Name } while (0) 2800*5113495bSYour Name 2801*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 2802*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 2803*5113495bSYour Name 2804*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_BASE_LSB //// 2805*5113495bSYour Name 2806*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x) (x+0x000007f4) 2807*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_PHYS(x) (x+0x000007f4) 2808*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RMSK 0xffffffff 2809*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_SHFT 0 2810*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_IN(x) \ 2811*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RMSK) 2812*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_INM(x, mask) \ 2813*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), mask) 2814*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_OUT(x, val) \ 2815*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), val) 2816*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_OUTM(x, mask, val) \ 2817*5113495bSYour Name do {\ 2818*5113495bSYour Name HWIO_INTLOCK(); \ 2819*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_IN(x)); \ 2820*5113495bSYour Name HWIO_INTFREE();\ 2821*5113495bSYour Name } while (0) 2822*5113495bSYour Name 2823*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 2824*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 2825*5113495bSYour Name 2826*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_BASE_MSB //// 2827*5113495bSYour Name 2828*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x) (x+0x000007f8) 2829*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_PHYS(x) (x+0x000007f8) 2830*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RMSK 0x00ffffff 2831*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_SHFT 0 2832*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_IN(x) \ 2833*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RMSK) 2834*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_INM(x, mask) \ 2835*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), mask) 2836*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_OUT(x, val) \ 2837*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), val) 2838*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_OUTM(x, mask, val) \ 2839*5113495bSYour Name do {\ 2840*5113495bSYour Name HWIO_INTLOCK(); \ 2841*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_IN(x)); \ 2842*5113495bSYour Name HWIO_INTFREE();\ 2843*5113495bSYour Name } while (0) 2844*5113495bSYour Name 2845*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 2846*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 2847*5113495bSYour Name 2848*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 2849*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 2850*5113495bSYour Name 2851*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_ID //// 2852*5113495bSYour Name 2853*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x) (x+0x000007fc) 2854*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_PHYS(x) (x+0x000007fc) 2855*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_RMSK 0x000000ff 2856*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_SHFT 0 2857*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_IN(x) \ 2858*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_ID_RMSK) 2859*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_INM(x, mask) \ 2860*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), mask) 2861*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_OUT(x, val) \ 2862*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), val) 2863*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_OUTM(x, mask, val) \ 2864*5113495bSYour Name do {\ 2865*5113495bSYour Name HWIO_INTLOCK(); \ 2866*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_ID_IN(x)); \ 2867*5113495bSYour Name HWIO_INTFREE();\ 2868*5113495bSYour Name } while (0) 2869*5113495bSYour Name 2870*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2871*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ENTRY_SIZE_SHFT 0x0 2872*5113495bSYour Name 2873*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_STATUS //// 2874*5113495bSYour Name 2875*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x) (x+0x00000800) 2876*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_PHYS(x) (x+0x00000800) 2877*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_RMSK 0xffffffff 2878*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_SHFT 0 2879*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_IN(x) \ 2880*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_STATUS_RMSK) 2881*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_INM(x, mask) \ 2882*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), mask) 2883*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_OUT(x, val) \ 2884*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), val) 2885*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_OUTM(x, mask, val) \ 2886*5113495bSYour Name do {\ 2887*5113495bSYour Name HWIO_INTLOCK(); \ 2888*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_STATUS_IN(x)); \ 2889*5113495bSYour Name HWIO_INTFREE();\ 2890*5113495bSYour Name } while (0) 2891*5113495bSYour Name 2892*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2893*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2894*5113495bSYour Name 2895*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2896*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2897*5113495bSYour Name 2898*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MISC //// 2899*5113495bSYour Name 2900*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x) (x+0x00000804) 2901*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_PHYS(x) (x+0x00000804) 2902*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RMSK 0x003fffff 2903*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SHFT 0 2904*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_IN(x) \ 2905*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MISC_RMSK) 2906*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_INM(x, mask) \ 2907*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), mask) 2908*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_OUT(x, val) \ 2909*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), val) 2910*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_OUTM(x, mask, val) \ 2911*5113495bSYour Name do {\ 2912*5113495bSYour Name HWIO_INTLOCK(); \ 2913*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MISC_IN(x)); \ 2914*5113495bSYour Name HWIO_INTFREE();\ 2915*5113495bSYour Name } while (0) 2916*5113495bSYour Name 2917*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2918*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SPARE_CONTROL_SHFT 0xe 2919*5113495bSYour Name 2920*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2921*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2922*5113495bSYour Name 2923*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2924*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2925*5113495bSYour Name 2926*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2927*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2928*5113495bSYour Name 2929*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2930*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_ENABLE_SHFT 0x6 2931*5113495bSYour Name 2932*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2933*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2934*5113495bSYour Name 2935*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2936*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2937*5113495bSYour Name 2938*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2939*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2940*5113495bSYour Name 2941*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2942*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SECURITY_BIT_SHFT 0x2 2943*5113495bSYour Name 2944*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2945*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2946*5113495bSYour Name 2947*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2948*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2949*5113495bSYour Name 2950*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_TP_ADDR_LSB //// 2951*5113495bSYour Name 2952*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000810) 2953*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000810) 2954*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_RMSK 0xffffffff 2955*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_SHFT 0 2956*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_IN(x) \ 2957*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_RMSK) 2958*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_INM(x, mask) \ 2959*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask) 2960*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_OUT(x, val) \ 2961*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), val) 2962*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2963*5113495bSYour Name do {\ 2964*5113495bSYour Name HWIO_INTLOCK(); \ 2965*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_IN(x)); \ 2966*5113495bSYour Name HWIO_INTFREE();\ 2967*5113495bSYour Name } while (0) 2968*5113495bSYour Name 2969*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2970*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2971*5113495bSYour Name 2972*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_TP_ADDR_MSB //// 2973*5113495bSYour Name 2974*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000814) 2975*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000814) 2976*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_RMSK 0x000000ff 2977*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_SHFT 0 2978*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_IN(x) \ 2979*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_RMSK) 2980*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_INM(x, mask) \ 2981*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask) 2982*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_OUT(x, val) \ 2983*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), val) 2984*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2985*5113495bSYour Name do {\ 2986*5113495bSYour Name HWIO_INTLOCK(); \ 2987*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_IN(x)); \ 2988*5113495bSYour Name HWIO_INTFREE();\ 2989*5113495bSYour Name } while (0) 2990*5113495bSYour Name 2991*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2992*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2993*5113495bSYour Name 2994*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0 //// 2995*5113495bSYour Name 2996*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000824) 2997*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000824) 2998*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2999*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 3000*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 3001*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK) 3002*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 3003*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 3004*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 3005*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 3006*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 3007*5113495bSYour Name do {\ 3008*5113495bSYour Name HWIO_INTLOCK(); \ 3009*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 3010*5113495bSYour Name HWIO_INTFREE();\ 3011*5113495bSYour Name } while (0) 3012*5113495bSYour Name 3013*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3014*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3015*5113495bSYour Name 3016*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 3017*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 3018*5113495bSYour Name 3019*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3020*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3021*5113495bSYour Name 3022*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1 //// 3023*5113495bSYour Name 3024*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000828) 3025*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000828) 3026*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 3027*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 3028*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 3029*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK) 3030*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 3031*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 3032*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 3033*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 3034*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 3035*5113495bSYour Name do {\ 3036*5113495bSYour Name HWIO_INTLOCK(); \ 3037*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 3038*5113495bSYour Name HWIO_INTFREE();\ 3039*5113495bSYour Name } while (0) 3040*5113495bSYour Name 3041*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 3042*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 3043*5113495bSYour Name 3044*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS //// 3045*5113495bSYour Name 3046*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000082c) 3047*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000082c) 3048*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 3049*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_SHFT 0 3050*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_IN(x) \ 3051*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_RMSK) 3052*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 3053*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 3054*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 3055*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), val) 3056*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 3057*5113495bSYour Name do {\ 3058*5113495bSYour Name HWIO_INTLOCK(); \ 3059*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_IN(x)); \ 3060*5113495bSYour Name HWIO_INTFREE();\ 3061*5113495bSYour Name } while (0) 3062*5113495bSYour Name 3063*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3064*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3065*5113495bSYour Name 3066*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 3067*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 3068*5113495bSYour Name 3069*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3070*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3071*5113495bSYour Name 3072*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER //// 3073*5113495bSYour Name 3074*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000830) 3075*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000830) 3076*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 3077*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 3078*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 3079*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK) 3080*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 3081*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 3082*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 3083*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 3084*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 3085*5113495bSYour Name do {\ 3086*5113495bSYour Name HWIO_INTLOCK(); \ 3087*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 3088*5113495bSYour Name HWIO_INTFREE();\ 3089*5113495bSYour Name } while (0) 3090*5113495bSYour Name 3091*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 3092*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 3093*5113495bSYour Name 3094*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER //// 3095*5113495bSYour Name 3096*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000834) 3097*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000834) 3098*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 3099*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 3100*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 3101*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK) 3102*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 3103*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 3104*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 3105*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 3106*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 3107*5113495bSYour Name do {\ 3108*5113495bSYour Name HWIO_INTLOCK(); \ 3109*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 3110*5113495bSYour Name HWIO_INTFREE();\ 3111*5113495bSYour Name } while (0) 3112*5113495bSYour Name 3113*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 3114*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 3115*5113495bSYour Name 3116*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS //// 3117*5113495bSYour Name 3118*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000838) 3119*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000838) 3120*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x00ffffff 3121*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 3122*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 3123*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK) 3124*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 3125*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 3126*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 3127*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 3128*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 3129*5113495bSYour Name do {\ 3130*5113495bSYour Name HWIO_INTLOCK(); \ 3131*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 3132*5113495bSYour Name HWIO_INTFREE();\ 3133*5113495bSYour Name } while (0) 3134*5113495bSYour Name 3135*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x00ff0000 3136*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x10 3137*5113495bSYour Name 3138*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x0000ffff 3139*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 3140*5113495bSYour Name 3141*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB //// 3142*5113495bSYour Name 3143*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000083c) 3144*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000083c) 3145*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3146*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_SHFT 0 3147*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_IN(x) \ 3148*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_RMSK) 3149*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_INM(x, mask) \ 3150*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask) 3151*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_OUT(x, val) \ 3152*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), val) 3153*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3154*5113495bSYour Name do {\ 3155*5113495bSYour Name HWIO_INTLOCK(); \ 3156*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_IN(x)); \ 3157*5113495bSYour Name HWIO_INTFREE();\ 3158*5113495bSYour Name } while (0) 3159*5113495bSYour Name 3160*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3161*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3162*5113495bSYour Name 3163*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB //// 3164*5113495bSYour Name 3165*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000840) 3166*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000840) 3167*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3168*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_SHFT 0 3169*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_IN(x) \ 3170*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_RMSK) 3171*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_INM(x, mask) \ 3172*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask) 3173*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_OUT(x, val) \ 3174*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), val) 3175*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3176*5113495bSYour Name do {\ 3177*5113495bSYour Name HWIO_INTLOCK(); \ 3178*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_IN(x)); \ 3179*5113495bSYour Name HWIO_INTFREE();\ 3180*5113495bSYour Name } while (0) 3181*5113495bSYour Name 3182*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3183*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3184*5113495bSYour Name 3185*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3186*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3187*5113495bSYour Name 3188*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_DATA //// 3189*5113495bSYour Name 3190*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x) (x+0x00000844) 3191*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_PHYS(x) (x+0x00000844) 3192*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_RMSK 0xffffffff 3193*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_SHFT 0 3194*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_IN(x) \ 3195*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_RMSK) 3196*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_INM(x, mask) \ 3197*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), mask) 3198*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_OUT(x, val) \ 3199*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), val) 3200*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_OUTM(x, mask, val) \ 3201*5113495bSYour Name do {\ 3202*5113495bSYour Name HWIO_INTLOCK(); \ 3203*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_IN(x)); \ 3204*5113495bSYour Name HWIO_INTFREE();\ 3205*5113495bSYour Name } while (0) 3206*5113495bSYour Name 3207*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3208*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_VALUE_SHFT 0x0 3209*5113495bSYour Name 3210*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET //// 3211*5113495bSYour Name 3212*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000848) 3213*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000848) 3214*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3215*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_SHFT 0 3216*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_IN(x) \ 3217*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_RMSK) 3218*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3219*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3220*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3221*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3222*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3223*5113495bSYour Name do {\ 3224*5113495bSYour Name HWIO_INTLOCK(); \ 3225*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_IN(x)); \ 3226*5113495bSYour Name HWIO_INTFREE();\ 3227*5113495bSYour Name } while (0) 3228*5113495bSYour Name 3229*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3230*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3231*5113495bSYour Name 3232*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_BASE_LSB //// 3233*5113495bSYour Name 3234*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x) (x+0x0000084c) 3235*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_PHYS(x) (x+0x0000084c) 3236*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RMSK 0xffffffff 3237*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_SHFT 0 3238*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_IN(x) \ 3239*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RMSK) 3240*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_INM(x, mask) \ 3241*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), mask) 3242*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_OUT(x, val) \ 3243*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), val) 3244*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_OUTM(x, mask, val) \ 3245*5113495bSYour Name do {\ 3246*5113495bSYour Name HWIO_INTLOCK(); \ 3247*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_IN(x)); \ 3248*5113495bSYour Name HWIO_INTFREE();\ 3249*5113495bSYour Name } while (0) 3250*5113495bSYour Name 3251*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3252*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3253*5113495bSYour Name 3254*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_BASE_MSB //// 3255*5113495bSYour Name 3256*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x) (x+0x00000850) 3257*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_PHYS(x) (x+0x00000850) 3258*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RMSK 0x00ffffff 3259*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_SHFT 0 3260*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_IN(x) \ 3261*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RMSK) 3262*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_INM(x, mask) \ 3263*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), mask) 3264*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_OUT(x, val) \ 3265*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), val) 3266*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_OUTM(x, mask, val) \ 3267*5113495bSYour Name do {\ 3268*5113495bSYour Name HWIO_INTLOCK(); \ 3269*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_IN(x)); \ 3270*5113495bSYour Name HWIO_INTFREE();\ 3271*5113495bSYour Name } while (0) 3272*5113495bSYour Name 3273*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3274*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3275*5113495bSYour Name 3276*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3277*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3278*5113495bSYour Name 3279*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_ID //// 3280*5113495bSYour Name 3281*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x) (x+0x00000854) 3282*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_PHYS(x) (x+0x00000854) 3283*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RMSK 0x0000ffff 3284*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_SHFT 0 3285*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_IN(x) \ 3286*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_ID_RMSK) 3287*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_INM(x, mask) \ 3288*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), mask) 3289*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_OUT(x, val) \ 3290*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), val) 3291*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_OUTM(x, mask, val) \ 3292*5113495bSYour Name do {\ 3293*5113495bSYour Name HWIO_INTLOCK(); \ 3294*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_ID_IN(x)); \ 3295*5113495bSYour Name HWIO_INTFREE();\ 3296*5113495bSYour Name } while (0) 3297*5113495bSYour Name 3298*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RING_ID_BMSK 0x0000ff00 3299*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RING_ID_SHFT 0x8 3300*5113495bSYour Name 3301*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3302*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ENTRY_SIZE_SHFT 0x0 3303*5113495bSYour Name 3304*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_STATUS //// 3305*5113495bSYour Name 3306*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x) (x+0x00000858) 3307*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_PHYS(x) (x+0x00000858) 3308*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_RMSK 0xffffffff 3309*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_SHFT 0 3310*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_IN(x) \ 3311*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_STATUS_RMSK) 3312*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_INM(x, mask) \ 3313*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), mask) 3314*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_OUT(x, val) \ 3315*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), val) 3316*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_OUTM(x, mask, val) \ 3317*5113495bSYour Name do {\ 3318*5113495bSYour Name HWIO_INTLOCK(); \ 3319*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_STATUS_IN(x)); \ 3320*5113495bSYour Name HWIO_INTFREE();\ 3321*5113495bSYour Name } while (0) 3322*5113495bSYour Name 3323*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3324*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3325*5113495bSYour Name 3326*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3327*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3328*5113495bSYour Name 3329*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_MISC //// 3330*5113495bSYour Name 3331*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x) (x+0x0000085c) 3332*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_PHYS(x) (x+0x0000085c) 3333*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RMSK 0x03ffffff 3334*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SHFT 0 3335*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_IN(x) \ 3336*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_MISC_RMSK) 3337*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_INM(x, mask) \ 3338*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), mask) 3339*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_OUT(x, val) \ 3340*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), val) 3341*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_OUTM(x, mask, val) \ 3342*5113495bSYour Name do {\ 3343*5113495bSYour Name HWIO_INTLOCK(); \ 3344*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_MISC_IN(x)); \ 3345*5113495bSYour Name HWIO_INTFREE();\ 3346*5113495bSYour Name } while (0) 3347*5113495bSYour Name 3348*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3349*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOP_CNT_SHFT 0x16 3350*5113495bSYour Name 3351*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3352*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SPARE_CONTROL_SHFT 0xe 3353*5113495bSYour Name 3354*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3355*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3356*5113495bSYour Name 3357*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3358*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3359*5113495bSYour Name 3360*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3361*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3362*5113495bSYour Name 3363*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3364*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_ENABLE_SHFT 0x6 3365*5113495bSYour Name 3366*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3367*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3368*5113495bSYour Name 3369*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3370*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3371*5113495bSYour Name 3372*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3373*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3374*5113495bSYour Name 3375*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3376*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SECURITY_BIT_SHFT 0x2 3377*5113495bSYour Name 3378*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3379*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3380*5113495bSYour Name 3381*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3382*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3383*5113495bSYour Name 3384*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_ADDR_LSB //// 3385*5113495bSYour Name 3386*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000860) 3387*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000860) 3388*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_RMSK 0xffffffff 3389*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_SHFT 0 3390*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_IN(x) \ 3391*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_RMSK) 3392*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_INM(x, mask) \ 3393*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), mask) 3394*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_OUT(x, val) \ 3395*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), val) 3396*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3397*5113495bSYour Name do {\ 3398*5113495bSYour Name HWIO_INTLOCK(); \ 3399*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_IN(x)); \ 3400*5113495bSYour Name HWIO_INTFREE();\ 3401*5113495bSYour Name } while (0) 3402*5113495bSYour Name 3403*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3404*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3405*5113495bSYour Name 3406*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_ADDR_MSB //// 3407*5113495bSYour Name 3408*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000864) 3409*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000864) 3410*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_RMSK 0x000000ff 3411*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_SHFT 0 3412*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_IN(x) \ 3413*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_RMSK) 3414*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_INM(x, mask) \ 3415*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), mask) 3416*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_OUT(x, val) \ 3417*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), val) 3418*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3419*5113495bSYour Name do {\ 3420*5113495bSYour Name HWIO_INTLOCK(); \ 3421*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_IN(x)); \ 3422*5113495bSYour Name HWIO_INTFREE();\ 3423*5113495bSYour Name } while (0) 3424*5113495bSYour Name 3425*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3426*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3427*5113495bSYour Name 3428*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP //// 3429*5113495bSYour Name 3430*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000870) 3431*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000870) 3432*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3433*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SHFT 0 3434*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_IN(x) \ 3435*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_RMSK) 3436*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 3437*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 3438*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 3439*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), val) 3440*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 3441*5113495bSYour Name do {\ 3442*5113495bSYour Name HWIO_INTLOCK(); \ 3443*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_IN(x)); \ 3444*5113495bSYour Name HWIO_INTFREE();\ 3445*5113495bSYour Name } while (0) 3446*5113495bSYour Name 3447*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3448*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3449*5113495bSYour Name 3450*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 3451*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 3452*5113495bSYour Name 3453*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3454*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3455*5113495bSYour Name 3456*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS //// 3457*5113495bSYour Name 3458*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000874) 3459*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000874) 3460*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 3461*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_SHFT 0 3462*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_IN(x) \ 3463*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_RMSK) 3464*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 3465*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 3466*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 3467*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), val) 3468*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 3469*5113495bSYour Name do {\ 3470*5113495bSYour Name HWIO_INTLOCK(); \ 3471*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_IN(x)); \ 3472*5113495bSYour Name HWIO_INTFREE();\ 3473*5113495bSYour Name } while (0) 3474*5113495bSYour Name 3475*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3476*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3477*5113495bSYour Name 3478*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 3479*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 3480*5113495bSYour Name 3481*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3482*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3483*5113495bSYour Name 3484*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER //// 3485*5113495bSYour Name 3486*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000878) 3487*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000878) 3488*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 3489*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_SHFT 0 3490*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_IN(x) \ 3491*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RMSK) 3492*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 3493*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 3494*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 3495*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 3496*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 3497*5113495bSYour Name do {\ 3498*5113495bSYour Name HWIO_INTLOCK(); \ 3499*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 3500*5113495bSYour Name HWIO_INTFREE();\ 3501*5113495bSYour Name } while (0) 3502*5113495bSYour Name 3503*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 3504*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 3505*5113495bSYour Name 3506*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB //// 3507*5113495bSYour Name 3508*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000894) 3509*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000894) 3510*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3511*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_SHFT 0 3512*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_IN(x) \ 3513*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_RMSK) 3514*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_INM(x, mask) \ 3515*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR(x), mask) 3516*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_OUT(x, val) \ 3517*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR(x), val) 3518*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3519*5113495bSYour Name do {\ 3520*5113495bSYour Name HWIO_INTLOCK(); \ 3521*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_IN(x)); \ 3522*5113495bSYour Name HWIO_INTFREE();\ 3523*5113495bSYour Name } while (0) 3524*5113495bSYour Name 3525*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3526*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3527*5113495bSYour Name 3528*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB //// 3529*5113495bSYour Name 3530*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000898) 3531*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000898) 3532*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3533*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_SHFT 0 3534*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_IN(x) \ 3535*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_RMSK) 3536*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_INM(x, mask) \ 3537*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR(x), mask) 3538*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_OUT(x, val) \ 3539*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR(x), val) 3540*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3541*5113495bSYour Name do {\ 3542*5113495bSYour Name HWIO_INTLOCK(); \ 3543*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_IN(x)); \ 3544*5113495bSYour Name HWIO_INTFREE();\ 3545*5113495bSYour Name } while (0) 3546*5113495bSYour Name 3547*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3548*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3549*5113495bSYour Name 3550*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3551*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3552*5113495bSYour Name 3553*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_MSI1_DATA //// 3554*5113495bSYour Name 3555*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_ADDR(x) (x+0x0000089c) 3556*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_PHYS(x) (x+0x0000089c) 3557*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_RMSK 0xffffffff 3558*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_SHFT 0 3559*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_IN(x) \ 3560*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_RMSK) 3561*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_INM(x, mask) \ 3562*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_ADDR(x), mask) 3563*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_OUT(x, val) \ 3564*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_ADDR(x), val) 3565*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_OUTM(x, mask, val) \ 3566*5113495bSYour Name do {\ 3567*5113495bSYour Name HWIO_INTLOCK(); \ 3568*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_IN(x)); \ 3569*5113495bSYour Name HWIO_INTFREE();\ 3570*5113495bSYour Name } while (0) 3571*5113495bSYour Name 3572*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3573*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MSI1_DATA_VALUE_SHFT 0x0 3574*5113495bSYour Name 3575*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET //// 3576*5113495bSYour Name 3577*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000008a0) 3578*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000008a0) 3579*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3580*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_SHFT 0 3581*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_IN(x) \ 3582*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_RMSK) 3583*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3584*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3585*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3586*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3587*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3588*5113495bSYour Name do {\ 3589*5113495bSYour Name HWIO_INTLOCK(); \ 3590*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_IN(x)); \ 3591*5113495bSYour Name HWIO_INTFREE();\ 3592*5113495bSYour Name } while (0) 3593*5113495bSYour Name 3594*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3595*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3596*5113495bSYour Name 3597*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_BASE_LSB //// 3598*5113495bSYour Name 3599*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x) (x+0x000008a4) 3600*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_PHYS(x) (x+0x000008a4) 3601*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RMSK 0xffffffff 3602*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_SHFT 0 3603*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_IN(x) \ 3604*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RMSK) 3605*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_INM(x, mask) \ 3606*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), mask) 3607*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_OUT(x, val) \ 3608*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), val) 3609*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_OUTM(x, mask, val) \ 3610*5113495bSYour Name do {\ 3611*5113495bSYour Name HWIO_INTLOCK(); \ 3612*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_IN(x)); \ 3613*5113495bSYour Name HWIO_INTFREE();\ 3614*5113495bSYour Name } while (0) 3615*5113495bSYour Name 3616*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3617*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3618*5113495bSYour Name 3619*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_BASE_MSB //// 3620*5113495bSYour Name 3621*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x) (x+0x000008a8) 3622*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_PHYS(x) (x+0x000008a8) 3623*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RMSK 0x00ffffff 3624*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_SHFT 0 3625*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_IN(x) \ 3626*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RMSK) 3627*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_INM(x, mask) \ 3628*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), mask) 3629*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_OUT(x, val) \ 3630*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), val) 3631*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_OUTM(x, mask, val) \ 3632*5113495bSYour Name do {\ 3633*5113495bSYour Name HWIO_INTLOCK(); \ 3634*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_IN(x)); \ 3635*5113495bSYour Name HWIO_INTFREE();\ 3636*5113495bSYour Name } while (0) 3637*5113495bSYour Name 3638*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3639*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3640*5113495bSYour Name 3641*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3642*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3643*5113495bSYour Name 3644*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_ID //// 3645*5113495bSYour Name 3646*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x) (x+0x000008ac) 3647*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_PHYS(x) (x+0x000008ac) 3648*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RMSK 0x0000ffff 3649*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_SHFT 0 3650*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_IN(x) \ 3651*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_ID_RMSK) 3652*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_INM(x, mask) \ 3653*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), mask) 3654*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_OUT(x, val) \ 3655*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), val) 3656*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_OUTM(x, mask, val) \ 3657*5113495bSYour Name do {\ 3658*5113495bSYour Name HWIO_INTLOCK(); \ 3659*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_ID_IN(x)); \ 3660*5113495bSYour Name HWIO_INTFREE();\ 3661*5113495bSYour Name } while (0) 3662*5113495bSYour Name 3663*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RING_ID_BMSK 0x0000ff00 3664*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RING_ID_SHFT 0x8 3665*5113495bSYour Name 3666*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3667*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ENTRY_SIZE_SHFT 0x0 3668*5113495bSYour Name 3669*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_STATUS //// 3670*5113495bSYour Name 3671*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x) (x+0x000008b0) 3672*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_PHYS(x) (x+0x000008b0) 3673*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_RMSK 0xffffffff 3674*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_SHFT 0 3675*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_IN(x) \ 3676*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_RMSK) 3677*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_INM(x, mask) \ 3678*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), mask) 3679*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_OUT(x, val) \ 3680*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), val) 3681*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_OUTM(x, mask, val) \ 3682*5113495bSYour Name do {\ 3683*5113495bSYour Name HWIO_INTLOCK(); \ 3684*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_IN(x)); \ 3685*5113495bSYour Name HWIO_INTFREE();\ 3686*5113495bSYour Name } while (0) 3687*5113495bSYour Name 3688*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3689*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3690*5113495bSYour Name 3691*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3692*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3693*5113495bSYour Name 3694*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MISC //// 3695*5113495bSYour Name 3696*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x) (x+0x000008b4) 3697*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_PHYS(x) (x+0x000008b4) 3698*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RMSK 0x03ffffff 3699*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SHFT 0 3700*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_IN(x) \ 3701*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RMSK) 3702*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_INM(x, mask) \ 3703*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), mask) 3704*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_OUT(x, val) \ 3705*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), val) 3706*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_OUTM(x, mask, val) \ 3707*5113495bSYour Name do {\ 3708*5113495bSYour Name HWIO_INTLOCK(); \ 3709*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MISC_IN(x)); \ 3710*5113495bSYour Name HWIO_INTFREE();\ 3711*5113495bSYour Name } while (0) 3712*5113495bSYour Name 3713*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3714*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOP_CNT_SHFT 0x16 3715*5113495bSYour Name 3716*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3717*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SPARE_CONTROL_SHFT 0xe 3718*5113495bSYour Name 3719*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3720*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3721*5113495bSYour Name 3722*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3723*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3724*5113495bSYour Name 3725*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3726*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3727*5113495bSYour Name 3728*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3729*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_ENABLE_SHFT 0x6 3730*5113495bSYour Name 3731*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3732*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3733*5113495bSYour Name 3734*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3735*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3736*5113495bSYour Name 3737*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3738*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3739*5113495bSYour Name 3740*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3741*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SECURITY_BIT_SHFT 0x2 3742*5113495bSYour Name 3743*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3744*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3745*5113495bSYour Name 3746*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3747*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3748*5113495bSYour Name 3749*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB //// 3750*5113495bSYour Name 3751*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x) (x+0x000008b8) 3752*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_PHYS(x) (x+0x000008b8) 3753*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_RMSK 0xffffffff 3754*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_SHFT 0 3755*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_IN(x) \ 3756*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_RMSK) 3757*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_INM(x, mask) \ 3758*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), mask) 3759*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_OUT(x, val) \ 3760*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), val) 3761*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3762*5113495bSYour Name do {\ 3763*5113495bSYour Name HWIO_INTLOCK(); \ 3764*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_IN(x)); \ 3765*5113495bSYour Name HWIO_INTFREE();\ 3766*5113495bSYour Name } while (0) 3767*5113495bSYour Name 3768*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3769*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3770*5113495bSYour Name 3771*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB //// 3772*5113495bSYour Name 3773*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x) (x+0x000008bc) 3774*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_PHYS(x) (x+0x000008bc) 3775*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_RMSK 0x000000ff 3776*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_SHFT 0 3777*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_IN(x) \ 3778*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_RMSK) 3779*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_INM(x, mask) \ 3780*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), mask) 3781*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_OUT(x, val) \ 3782*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), val) 3783*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3784*5113495bSYour Name do {\ 3785*5113495bSYour Name HWIO_INTLOCK(); \ 3786*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_IN(x)); \ 3787*5113495bSYour Name HWIO_INTFREE();\ 3788*5113495bSYour Name } while (0) 3789*5113495bSYour Name 3790*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3791*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3792*5113495bSYour Name 3793*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP //// 3794*5113495bSYour Name 3795*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000008c8) 3796*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000008c8) 3797*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3798*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SHFT 0 3799*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_IN(x) \ 3800*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_RMSK) 3801*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 3802*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 3803*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 3804*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), val) 3805*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 3806*5113495bSYour Name do {\ 3807*5113495bSYour Name HWIO_INTLOCK(); \ 3808*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_IN(x)); \ 3809*5113495bSYour Name HWIO_INTFREE();\ 3810*5113495bSYour Name } while (0) 3811*5113495bSYour Name 3812*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3813*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3814*5113495bSYour Name 3815*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 3816*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 3817*5113495bSYour Name 3818*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3819*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3820*5113495bSYour Name 3821*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS //// 3822*5113495bSYour Name 3823*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000008cc) 3824*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000008cc) 3825*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 3826*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_SHFT 0 3827*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_IN(x) \ 3828*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_RMSK) 3829*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 3830*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 3831*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 3832*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), val) 3833*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 3834*5113495bSYour Name do {\ 3835*5113495bSYour Name HWIO_INTLOCK(); \ 3836*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_IN(x)); \ 3837*5113495bSYour Name HWIO_INTFREE();\ 3838*5113495bSYour Name } while (0) 3839*5113495bSYour Name 3840*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3841*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3842*5113495bSYour Name 3843*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 3844*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 3845*5113495bSYour Name 3846*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3847*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3848*5113495bSYour Name 3849*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER //// 3850*5113495bSYour Name 3851*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000008d0) 3852*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000008d0) 3853*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 3854*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_SHFT 0 3855*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_IN(x) \ 3856*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RMSK) 3857*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 3858*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 3859*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 3860*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 3861*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 3862*5113495bSYour Name do {\ 3863*5113495bSYour Name HWIO_INTLOCK(); \ 3864*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 3865*5113495bSYour Name HWIO_INTFREE();\ 3866*5113495bSYour Name } while (0) 3867*5113495bSYour Name 3868*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 3869*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 3870*5113495bSYour Name 3871*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB //// 3872*5113495bSYour Name 3873*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000008ec) 3874*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000008ec) 3875*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3876*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_SHFT 0 3877*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_IN(x) \ 3878*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_RMSK) 3879*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_INM(x, mask) \ 3880*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), mask) 3881*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_OUT(x, val) \ 3882*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), val) 3883*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3884*5113495bSYour Name do {\ 3885*5113495bSYour Name HWIO_INTLOCK(); \ 3886*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_IN(x)); \ 3887*5113495bSYour Name HWIO_INTFREE();\ 3888*5113495bSYour Name } while (0) 3889*5113495bSYour Name 3890*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3891*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3892*5113495bSYour Name 3893*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB //// 3894*5113495bSYour Name 3895*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000008f0) 3896*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000008f0) 3897*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3898*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_SHFT 0 3899*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_IN(x) \ 3900*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_RMSK) 3901*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_INM(x, mask) \ 3902*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), mask) 3903*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_OUT(x, val) \ 3904*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), val) 3905*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3906*5113495bSYour Name do {\ 3907*5113495bSYour Name HWIO_INTLOCK(); \ 3908*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_IN(x)); \ 3909*5113495bSYour Name HWIO_INTFREE();\ 3910*5113495bSYour Name } while (0) 3911*5113495bSYour Name 3912*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3913*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3914*5113495bSYour Name 3915*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3916*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3917*5113495bSYour Name 3918*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_DATA //// 3919*5113495bSYour Name 3920*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x) (x+0x000008f4) 3921*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_PHYS(x) (x+0x000008f4) 3922*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_RMSK 0xffffffff 3923*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_SHFT 0 3924*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_IN(x) \ 3925*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_RMSK) 3926*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_INM(x, mask) \ 3927*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), mask) 3928*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_OUT(x, val) \ 3929*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), val) 3930*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_OUTM(x, mask, val) \ 3931*5113495bSYour Name do {\ 3932*5113495bSYour Name HWIO_INTLOCK(); \ 3933*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_IN(x)); \ 3934*5113495bSYour Name HWIO_INTFREE();\ 3935*5113495bSYour Name } while (0) 3936*5113495bSYour Name 3937*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3938*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_VALUE_SHFT 0x0 3939*5113495bSYour Name 3940*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET //// 3941*5113495bSYour Name 3942*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000008f8) 3943*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000008f8) 3944*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3945*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_SHFT 0 3946*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_IN(x) \ 3947*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_RMSK) 3948*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3949*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3950*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3951*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3952*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3953*5113495bSYour Name do {\ 3954*5113495bSYour Name HWIO_INTLOCK(); \ 3955*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_IN(x)); \ 3956*5113495bSYour Name HWIO_INTFREE();\ 3957*5113495bSYour Name } while (0) 3958*5113495bSYour Name 3959*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3960*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3961*5113495bSYour Name 3962*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_BASE_LSB //// 3963*5113495bSYour Name 3964*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x) (x+0x000008fc) 3965*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_PHYS(x) (x+0x000008fc) 3966*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RMSK 0xffffffff 3967*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_SHFT 0 3968*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_IN(x) \ 3969*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RMSK) 3970*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_INM(x, mask) \ 3971*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), mask) 3972*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_OUT(x, val) \ 3973*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), val) 3974*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_OUTM(x, mask, val) \ 3975*5113495bSYour Name do {\ 3976*5113495bSYour Name HWIO_INTLOCK(); \ 3977*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_IN(x)); \ 3978*5113495bSYour Name HWIO_INTFREE();\ 3979*5113495bSYour Name } while (0) 3980*5113495bSYour Name 3981*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3982*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3983*5113495bSYour Name 3984*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_BASE_MSB //// 3985*5113495bSYour Name 3986*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x) (x+0x00000900) 3987*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_PHYS(x) (x+0x00000900) 3988*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RMSK 0x00ffffff 3989*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_SHFT 0 3990*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_IN(x) \ 3991*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RMSK) 3992*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_INM(x, mask) \ 3993*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), mask) 3994*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_OUT(x, val) \ 3995*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), val) 3996*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_OUTM(x, mask, val) \ 3997*5113495bSYour Name do {\ 3998*5113495bSYour Name HWIO_INTLOCK(); \ 3999*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_IN(x)); \ 4000*5113495bSYour Name HWIO_INTFREE();\ 4001*5113495bSYour Name } while (0) 4002*5113495bSYour Name 4003*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 4004*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_SIZE_SHFT 0x8 4005*5113495bSYour Name 4006*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 4007*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 4008*5113495bSYour Name 4009*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_ID //// 4010*5113495bSYour Name 4011*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x) (x+0x00000904) 4012*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_PHYS(x) (x+0x00000904) 4013*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RMSK 0x0000ffff 4014*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_SHFT 0 4015*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_IN(x) \ 4016*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_ID_RMSK) 4017*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_INM(x, mask) \ 4018*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), mask) 4019*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_OUT(x, val) \ 4020*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), val) 4021*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_OUTM(x, mask, val) \ 4022*5113495bSYour Name do {\ 4023*5113495bSYour Name HWIO_INTLOCK(); \ 4024*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_ID_IN(x)); \ 4025*5113495bSYour Name HWIO_INTFREE();\ 4026*5113495bSYour Name } while (0) 4027*5113495bSYour Name 4028*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RING_ID_BMSK 0x0000ff00 4029*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RING_ID_SHFT 0x8 4030*5113495bSYour Name 4031*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 4032*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ENTRY_SIZE_SHFT 0x0 4033*5113495bSYour Name 4034*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_STATUS //// 4035*5113495bSYour Name 4036*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x) (x+0x00000908) 4037*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_PHYS(x) (x+0x00000908) 4038*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_RMSK 0xffffffff 4039*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_SHFT 0 4040*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_IN(x) \ 4041*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_RMSK) 4042*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_INM(x, mask) \ 4043*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), mask) 4044*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_OUT(x, val) \ 4045*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), val) 4046*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_OUTM(x, mask, val) \ 4047*5113495bSYour Name do {\ 4048*5113495bSYour Name HWIO_INTLOCK(); \ 4049*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_IN(x)); \ 4050*5113495bSYour Name HWIO_INTFREE();\ 4051*5113495bSYour Name } while (0) 4052*5113495bSYour Name 4053*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 4054*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 4055*5113495bSYour Name 4056*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 4057*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 4058*5113495bSYour Name 4059*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MISC //// 4060*5113495bSYour Name 4061*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x) (x+0x0000090c) 4062*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_PHYS(x) (x+0x0000090c) 4063*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RMSK 0x03ffffff 4064*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SHFT 0 4065*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_IN(x) \ 4066*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RMSK) 4067*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_INM(x, mask) \ 4068*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), mask) 4069*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_OUT(x, val) \ 4070*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), val) 4071*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_OUTM(x, mask, val) \ 4072*5113495bSYour Name do {\ 4073*5113495bSYour Name HWIO_INTLOCK(); \ 4074*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MISC_IN(x)); \ 4075*5113495bSYour Name HWIO_INTFREE();\ 4076*5113495bSYour Name } while (0) 4077*5113495bSYour Name 4078*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOP_CNT_BMSK 0x03c00000 4079*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOP_CNT_SHFT 0x16 4080*5113495bSYour Name 4081*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 4082*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SPARE_CONTROL_SHFT 0xe 4083*5113495bSYour Name 4084*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 4085*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 4086*5113495bSYour Name 4087*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 4088*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 4089*5113495bSYour Name 4090*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 4091*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 4092*5113495bSYour Name 4093*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 4094*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_ENABLE_SHFT 0x6 4095*5113495bSYour Name 4096*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 4097*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 4098*5113495bSYour Name 4099*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 4100*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 4101*5113495bSYour Name 4102*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 4103*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 4104*5113495bSYour Name 4105*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SECURITY_BIT_BMSK 0x00000004 4106*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SECURITY_BIT_SHFT 0x2 4107*5113495bSYour Name 4108*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 4109*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 4110*5113495bSYour Name 4111*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 4112*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RING_ID_DISABLE_SHFT 0x0 4113*5113495bSYour Name 4114*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB //// 4115*5113495bSYour Name 4116*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000910) 4117*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000910) 4118*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_RMSK 0xffffffff 4119*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_SHFT 0 4120*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_IN(x) \ 4121*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_RMSK) 4122*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_INM(x, mask) \ 4123*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), mask) 4124*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_OUT(x, val) \ 4125*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), val) 4126*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 4127*5113495bSYour Name do {\ 4128*5113495bSYour Name HWIO_INTLOCK(); \ 4129*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_IN(x)); \ 4130*5113495bSYour Name HWIO_INTFREE();\ 4131*5113495bSYour Name } while (0) 4132*5113495bSYour Name 4133*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 4134*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 4135*5113495bSYour Name 4136*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB //// 4137*5113495bSYour Name 4138*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000914) 4139*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000914) 4140*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_RMSK 0x000000ff 4141*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_SHFT 0 4142*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_IN(x) \ 4143*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_RMSK) 4144*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_INM(x, mask) \ 4145*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), mask) 4146*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_OUT(x, val) \ 4147*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), val) 4148*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 4149*5113495bSYour Name do {\ 4150*5113495bSYour Name HWIO_INTLOCK(); \ 4151*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_IN(x)); \ 4152*5113495bSYour Name HWIO_INTFREE();\ 4153*5113495bSYour Name } while (0) 4154*5113495bSYour Name 4155*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 4156*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 4157*5113495bSYour Name 4158*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP //// 4159*5113495bSYour Name 4160*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000920) 4161*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000920) 4162*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 4163*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SHFT 0 4164*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_IN(x) \ 4165*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_RMSK) 4166*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 4167*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 4168*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 4169*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), val) 4170*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 4171*5113495bSYour Name do {\ 4172*5113495bSYour Name HWIO_INTLOCK(); \ 4173*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_IN(x)); \ 4174*5113495bSYour Name HWIO_INTFREE();\ 4175*5113495bSYour Name } while (0) 4176*5113495bSYour Name 4177*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 4178*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 4179*5113495bSYour Name 4180*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 4181*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 4182*5113495bSYour Name 4183*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 4184*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 4185*5113495bSYour Name 4186*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS //// 4187*5113495bSYour Name 4188*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000924) 4189*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000924) 4190*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 4191*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_SHFT 0 4192*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_IN(x) \ 4193*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_RMSK) 4194*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 4195*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 4196*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 4197*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), val) 4198*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 4199*5113495bSYour Name do {\ 4200*5113495bSYour Name HWIO_INTLOCK(); \ 4201*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_IN(x)); \ 4202*5113495bSYour Name HWIO_INTFREE();\ 4203*5113495bSYour Name } while (0) 4204*5113495bSYour Name 4205*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 4206*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 4207*5113495bSYour Name 4208*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 4209*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 4210*5113495bSYour Name 4211*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 4212*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 4213*5113495bSYour Name 4214*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER //// 4215*5113495bSYour Name 4216*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000928) 4217*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000928) 4218*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 4219*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_SHFT 0 4220*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_IN(x) \ 4221*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RMSK) 4222*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 4223*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 4224*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 4225*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 4226*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 4227*5113495bSYour Name do {\ 4228*5113495bSYour Name HWIO_INTLOCK(); \ 4229*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 4230*5113495bSYour Name HWIO_INTFREE();\ 4231*5113495bSYour Name } while (0) 4232*5113495bSYour Name 4233*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 4234*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 4235*5113495bSYour Name 4236*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB //// 4237*5113495bSYour Name 4238*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000944) 4239*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000944) 4240*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_RMSK 0xffffffff 4241*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_SHFT 0 4242*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_IN(x) \ 4243*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_RMSK) 4244*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_INM(x, mask) \ 4245*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), mask) 4246*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_OUT(x, val) \ 4247*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), val) 4248*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 4249*5113495bSYour Name do {\ 4250*5113495bSYour Name HWIO_INTLOCK(); \ 4251*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_IN(x)); \ 4252*5113495bSYour Name HWIO_INTFREE();\ 4253*5113495bSYour Name } while (0) 4254*5113495bSYour Name 4255*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 4256*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 4257*5113495bSYour Name 4258*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB //// 4259*5113495bSYour Name 4260*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000948) 4261*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000948) 4262*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_RMSK 0x000001ff 4263*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_SHFT 0 4264*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_IN(x) \ 4265*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_RMSK) 4266*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_INM(x, mask) \ 4267*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), mask) 4268*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_OUT(x, val) \ 4269*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), val) 4270*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 4271*5113495bSYour Name do {\ 4272*5113495bSYour Name HWIO_INTLOCK(); \ 4273*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_IN(x)); \ 4274*5113495bSYour Name HWIO_INTFREE();\ 4275*5113495bSYour Name } while (0) 4276*5113495bSYour Name 4277*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 4278*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 4279*5113495bSYour Name 4280*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 4281*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 4282*5113495bSYour Name 4283*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_DATA //// 4284*5113495bSYour Name 4285*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x) (x+0x0000094c) 4286*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_PHYS(x) (x+0x0000094c) 4287*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_RMSK 0xffffffff 4288*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_SHFT 0 4289*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_IN(x) \ 4290*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_RMSK) 4291*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_INM(x, mask) \ 4292*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), mask) 4293*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_OUT(x, val) \ 4294*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), val) 4295*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_OUTM(x, mask, val) \ 4296*5113495bSYour Name do {\ 4297*5113495bSYour Name HWIO_INTLOCK(); \ 4298*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_IN(x)); \ 4299*5113495bSYour Name HWIO_INTFREE();\ 4300*5113495bSYour Name } while (0) 4301*5113495bSYour Name 4302*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 4303*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_VALUE_SHFT 0x0 4304*5113495bSYour Name 4305*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET //// 4306*5113495bSYour Name 4307*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000950) 4308*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000950) 4309*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 4310*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_SHFT 0 4311*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_IN(x) \ 4312*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_RMSK) 4313*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 4314*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 4315*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 4316*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), val) 4317*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 4318*5113495bSYour Name do {\ 4319*5113495bSYour Name HWIO_INTLOCK(); \ 4320*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_IN(x)); \ 4321*5113495bSYour Name HWIO_INTFREE();\ 4322*5113495bSYour Name } while (0) 4323*5113495bSYour Name 4324*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 4325*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 4326*5113495bSYour Name 4327*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_BASE_LSB //// 4328*5113495bSYour Name 4329*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x) (x+0x00000954) 4330*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_PHYS(x) (x+0x00000954) 4331*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RMSK 0xffffffff 4332*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_SHFT 0 4333*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_IN(x) \ 4334*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RMSK) 4335*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_INM(x, mask) \ 4336*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), mask) 4337*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_OUT(x, val) \ 4338*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), val) 4339*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_OUTM(x, mask, val) \ 4340*5113495bSYour Name do {\ 4341*5113495bSYour Name HWIO_INTLOCK(); \ 4342*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_IN(x)); \ 4343*5113495bSYour Name HWIO_INTFREE();\ 4344*5113495bSYour Name } while (0) 4345*5113495bSYour Name 4346*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 4347*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 4348*5113495bSYour Name 4349*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_BASE_MSB //// 4350*5113495bSYour Name 4351*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x) (x+0x00000958) 4352*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_PHYS(x) (x+0x00000958) 4353*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RMSK 0x00ffffff 4354*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_SHFT 0 4355*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_IN(x) \ 4356*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RMSK) 4357*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_INM(x, mask) \ 4358*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), mask) 4359*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_OUT(x, val) \ 4360*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), val) 4361*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_OUTM(x, mask, val) \ 4362*5113495bSYour Name do {\ 4363*5113495bSYour Name HWIO_INTLOCK(); \ 4364*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_IN(x)); \ 4365*5113495bSYour Name HWIO_INTFREE();\ 4366*5113495bSYour Name } while (0) 4367*5113495bSYour Name 4368*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 4369*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_SIZE_SHFT 0x8 4370*5113495bSYour Name 4371*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 4372*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 4373*5113495bSYour Name 4374*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_ID //// 4375*5113495bSYour Name 4376*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x) (x+0x0000095c) 4377*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_PHYS(x) (x+0x0000095c) 4378*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RMSK 0x0000ffff 4379*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_SHFT 0 4380*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_IN(x) \ 4381*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_ID_RMSK) 4382*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_INM(x, mask) \ 4383*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), mask) 4384*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_OUT(x, val) \ 4385*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), val) 4386*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_OUTM(x, mask, val) \ 4387*5113495bSYour Name do {\ 4388*5113495bSYour Name HWIO_INTLOCK(); \ 4389*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_ID_IN(x)); \ 4390*5113495bSYour Name HWIO_INTFREE();\ 4391*5113495bSYour Name } while (0) 4392*5113495bSYour Name 4393*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RING_ID_BMSK 0x0000ff00 4394*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RING_ID_SHFT 0x8 4395*5113495bSYour Name 4396*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 4397*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ENTRY_SIZE_SHFT 0x0 4398*5113495bSYour Name 4399*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_STATUS //// 4400*5113495bSYour Name 4401*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x) (x+0x00000960) 4402*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_PHYS(x) (x+0x00000960) 4403*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_RMSK 0xffffffff 4404*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_SHFT 0 4405*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_IN(x) \ 4406*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_STATUS_RMSK) 4407*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_INM(x, mask) \ 4408*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), mask) 4409*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_OUT(x, val) \ 4410*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), val) 4411*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_OUTM(x, mask, val) \ 4412*5113495bSYour Name do {\ 4413*5113495bSYour Name HWIO_INTLOCK(); \ 4414*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_STATUS_IN(x)); \ 4415*5113495bSYour Name HWIO_INTFREE();\ 4416*5113495bSYour Name } while (0) 4417*5113495bSYour Name 4418*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 4419*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 4420*5113495bSYour Name 4421*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 4422*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 4423*5113495bSYour Name 4424*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_MISC //// 4425*5113495bSYour Name 4426*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x) (x+0x00000964) 4427*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_PHYS(x) (x+0x00000964) 4428*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RMSK 0x03ffffff 4429*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SHFT 0 4430*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_IN(x) \ 4431*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_MISC_RMSK) 4432*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_INM(x, mask) \ 4433*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), mask) 4434*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_OUT(x, val) \ 4435*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), val) 4436*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_OUTM(x, mask, val) \ 4437*5113495bSYour Name do {\ 4438*5113495bSYour Name HWIO_INTLOCK(); \ 4439*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_MISC_IN(x)); \ 4440*5113495bSYour Name HWIO_INTFREE();\ 4441*5113495bSYour Name } while (0) 4442*5113495bSYour Name 4443*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOP_CNT_BMSK 0x03c00000 4444*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOP_CNT_SHFT 0x16 4445*5113495bSYour Name 4446*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 4447*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SPARE_CONTROL_SHFT 0xe 4448*5113495bSYour Name 4449*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 4450*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 4451*5113495bSYour Name 4452*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 4453*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 4454*5113495bSYour Name 4455*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 4456*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 4457*5113495bSYour Name 4458*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 4459*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_ENABLE_SHFT 0x6 4460*5113495bSYour Name 4461*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 4462*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 4463*5113495bSYour Name 4464*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 4465*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 4466*5113495bSYour Name 4467*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 4468*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 4469*5113495bSYour Name 4470*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SECURITY_BIT_BMSK 0x00000004 4471*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SECURITY_BIT_SHFT 0x2 4472*5113495bSYour Name 4473*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 4474*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 4475*5113495bSYour Name 4476*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 4477*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RING_ID_DISABLE_SHFT 0x0 4478*5113495bSYour Name 4479*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_ADDR_LSB //// 4480*5113495bSYour Name 4481*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000968) 4482*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000968) 4483*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_RMSK 0xffffffff 4484*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_SHFT 0 4485*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_IN(x) \ 4486*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_RMSK) 4487*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_INM(x, mask) \ 4488*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), mask) 4489*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_OUT(x, val) \ 4490*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), val) 4491*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 4492*5113495bSYour Name do {\ 4493*5113495bSYour Name HWIO_INTLOCK(); \ 4494*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_IN(x)); \ 4495*5113495bSYour Name HWIO_INTFREE();\ 4496*5113495bSYour Name } while (0) 4497*5113495bSYour Name 4498*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 4499*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 4500*5113495bSYour Name 4501*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_ADDR_MSB //// 4502*5113495bSYour Name 4503*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000096c) 4504*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000096c) 4505*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_RMSK 0x000000ff 4506*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_SHFT 0 4507*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_IN(x) \ 4508*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_RMSK) 4509*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_INM(x, mask) \ 4510*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), mask) 4511*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_OUT(x, val) \ 4512*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), val) 4513*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 4514*5113495bSYour Name do {\ 4515*5113495bSYour Name HWIO_INTLOCK(); \ 4516*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_IN(x)); \ 4517*5113495bSYour Name HWIO_INTFREE();\ 4518*5113495bSYour Name } while (0) 4519*5113495bSYour Name 4520*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 4521*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 4522*5113495bSYour Name 4523*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP //// 4524*5113495bSYour Name 4525*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000978) 4526*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000978) 4527*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 4528*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SHFT 0 4529*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_IN(x) \ 4530*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_RMSK) 4531*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 4532*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 4533*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 4534*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), val) 4535*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 4536*5113495bSYour Name do {\ 4537*5113495bSYour Name HWIO_INTLOCK(); \ 4538*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_IN(x)); \ 4539*5113495bSYour Name HWIO_INTFREE();\ 4540*5113495bSYour Name } while (0) 4541*5113495bSYour Name 4542*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 4543*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 4544*5113495bSYour Name 4545*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 4546*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 4547*5113495bSYour Name 4548*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 4549*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 4550*5113495bSYour Name 4551*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS //// 4552*5113495bSYour Name 4553*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000097c) 4554*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000097c) 4555*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 4556*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_SHFT 0 4557*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_IN(x) \ 4558*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_RMSK) 4559*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 4560*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 4561*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 4562*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), val) 4563*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 4564*5113495bSYour Name do {\ 4565*5113495bSYour Name HWIO_INTLOCK(); \ 4566*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_IN(x)); \ 4567*5113495bSYour Name HWIO_INTFREE();\ 4568*5113495bSYour Name } while (0) 4569*5113495bSYour Name 4570*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 4571*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 4572*5113495bSYour Name 4573*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 4574*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 4575*5113495bSYour Name 4576*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 4577*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 4578*5113495bSYour Name 4579*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER //// 4580*5113495bSYour Name 4581*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000980) 4582*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000980) 4583*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 4584*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_SHFT 0 4585*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_IN(x) \ 4586*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RMSK) 4587*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 4588*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 4589*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 4590*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 4591*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 4592*5113495bSYour Name do {\ 4593*5113495bSYour Name HWIO_INTLOCK(); \ 4594*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 4595*5113495bSYour Name HWIO_INTFREE();\ 4596*5113495bSYour Name } while (0) 4597*5113495bSYour Name 4598*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 4599*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 4600*5113495bSYour Name 4601*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_MSI1_BASE_LSB //// 4602*5113495bSYour Name 4603*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000099c) 4604*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000099c) 4605*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_RMSK 0xffffffff 4606*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_SHFT 0 4607*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_IN(x) \ 4608*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_RMSK) 4609*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_INM(x, mask) \ 4610*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR(x), mask) 4611*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_OUT(x, val) \ 4612*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR(x), val) 4613*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 4614*5113495bSYour Name do {\ 4615*5113495bSYour Name HWIO_INTLOCK(); \ 4616*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_IN(x)); \ 4617*5113495bSYour Name HWIO_INTFREE();\ 4618*5113495bSYour Name } while (0) 4619*5113495bSYour Name 4620*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 4621*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 4622*5113495bSYour Name 4623*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_MSI1_BASE_MSB //// 4624*5113495bSYour Name 4625*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000009a0) 4626*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000009a0) 4627*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_RMSK 0x000001ff 4628*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_SHFT 0 4629*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_IN(x) \ 4630*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_RMSK) 4631*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_INM(x, mask) \ 4632*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR(x), mask) 4633*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_OUT(x, val) \ 4634*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR(x), val) 4635*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 4636*5113495bSYour Name do {\ 4637*5113495bSYour Name HWIO_INTLOCK(); \ 4638*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_IN(x)); \ 4639*5113495bSYour Name HWIO_INTFREE();\ 4640*5113495bSYour Name } while (0) 4641*5113495bSYour Name 4642*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 4643*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 4644*5113495bSYour Name 4645*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 4646*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 4647*5113495bSYour Name 4648*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_MSI1_DATA //// 4649*5113495bSYour Name 4650*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_ADDR(x) (x+0x000009a4) 4651*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_PHYS(x) (x+0x000009a4) 4652*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_RMSK 0xffffffff 4653*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_SHFT 0 4654*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_IN(x) \ 4655*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_RMSK) 4656*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_INM(x, mask) \ 4657*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_ADDR(x), mask) 4658*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_OUT(x, val) \ 4659*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_ADDR(x), val) 4660*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_OUTM(x, mask, val) \ 4661*5113495bSYour Name do {\ 4662*5113495bSYour Name HWIO_INTLOCK(); \ 4663*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_IN(x)); \ 4664*5113495bSYour Name HWIO_INTFREE();\ 4665*5113495bSYour Name } while (0) 4666*5113495bSYour Name 4667*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 4668*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MSI1_DATA_VALUE_SHFT 0x0 4669*5113495bSYour Name 4670*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET //// 4671*5113495bSYour Name 4672*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000009a8) 4673*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000009a8) 4674*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 4675*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_SHFT 0 4676*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_IN(x) \ 4677*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_RMSK) 4678*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 4679*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 4680*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 4681*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), val) 4682*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 4683*5113495bSYour Name do {\ 4684*5113495bSYour Name HWIO_INTLOCK(); \ 4685*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_IN(x)); \ 4686*5113495bSYour Name HWIO_INTFREE();\ 4687*5113495bSYour Name } while (0) 4688*5113495bSYour Name 4689*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 4690*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 4691*5113495bSYour Name 4692*5113495bSYour Name //// Register TCL_R0_GXI_TESTBUS_LOWER //// 4693*5113495bSYour Name 4694*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x) (x+0x000009ac) 4695*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_PHYS(x) (x+0x000009ac) 4696*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_RMSK 0xffffffff 4697*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_SHFT 0 4698*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_IN(x) \ 4699*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), HWIO_TCL_R0_GXI_TESTBUS_LOWER_RMSK) 4700*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_INM(x, mask) \ 4701*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), mask) 4702*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_OUT(x, val) \ 4703*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), val) 4704*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ 4705*5113495bSYour Name do {\ 4706*5113495bSYour Name HWIO_INTLOCK(); \ 4707*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_TCL_R0_GXI_TESTBUS_LOWER_IN(x)); \ 4708*5113495bSYour Name HWIO_INTFREE();\ 4709*5113495bSYour Name } while (0) 4710*5113495bSYour Name 4711*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_VALUE_BMSK 0xffffffff 4712*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_VALUE_SHFT 0x0 4713*5113495bSYour Name 4714*5113495bSYour Name //// Register TCL_R0_GXI_TESTBUS_UPPER //// 4715*5113495bSYour Name 4716*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x) (x+0x000009b0) 4717*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_PHYS(x) (x+0x000009b0) 4718*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_RMSK 0x000000ff 4719*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_SHFT 0 4720*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_IN(x) \ 4721*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), HWIO_TCL_R0_GXI_TESTBUS_UPPER_RMSK) 4722*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_INM(x, mask) \ 4723*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), mask) 4724*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_OUT(x, val) \ 4725*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), val) 4726*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ 4727*5113495bSYour Name do {\ 4728*5113495bSYour Name HWIO_INTLOCK(); \ 4729*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_TCL_R0_GXI_TESTBUS_UPPER_IN(x)); \ 4730*5113495bSYour Name HWIO_INTFREE();\ 4731*5113495bSYour Name } while (0) 4732*5113495bSYour Name 4733*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_VALUE_BMSK 0x000000ff 4734*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_VALUE_SHFT 0x0 4735*5113495bSYour Name 4736*5113495bSYour Name //// Register TCL_R0_GXI_SM_STATES_IX_0 //// 4737*5113495bSYour Name 4738*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x) (x+0x000009b4) 4739*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_PHYS(x) (x+0x000009b4) 4740*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_RMSK 0x00000fff 4741*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SHFT 0 4742*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_IN(x) \ 4743*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), HWIO_TCL_R0_GXI_SM_STATES_IX_0_RMSK) 4744*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_INM(x, mask) \ 4745*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), mask) 4746*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_OUT(x, val) \ 4747*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), val) 4748*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ 4749*5113495bSYour Name do {\ 4750*5113495bSYour Name HWIO_INTLOCK(); \ 4751*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_SM_STATES_IX_0_IN(x)); \ 4752*5113495bSYour Name HWIO_INTFREE();\ 4753*5113495bSYour Name } while (0) 4754*5113495bSYour Name 4755*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_RD_ADDR_BMSK 0x00000e00 4756*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_RD_ADDR_SHFT 0x9 4757*5113495bSYour Name 4758*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_ADDR_BMSK 0x000001f0 4759*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_ADDR_SHFT 0x4 4760*5113495bSYour Name 4761*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_DATA_BMSK 0x0000000f 4762*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_DATA_SHFT 0x0 4763*5113495bSYour Name 4764*5113495bSYour Name //// Register TCL_R0_GXI_END_OF_TEST_CHECK //// 4765*5113495bSYour Name 4766*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x) (x+0x000009b8) 4767*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_PHYS(x) (x+0x000009b8) 4768*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_RMSK 0x00000001 4769*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_SHFT 0 4770*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_IN(x) \ 4771*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_RMSK) 4772*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_INM(x, mask) \ 4773*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask) 4774*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_OUT(x, val) \ 4775*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), val) 4776*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 4777*5113495bSYour Name do {\ 4778*5113495bSYour Name HWIO_INTLOCK(); \ 4779*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_IN(x)); \ 4780*5113495bSYour Name HWIO_INTFREE();\ 4781*5113495bSYour Name } while (0) 4782*5113495bSYour Name 4783*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 4784*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 4785*5113495bSYour Name 4786*5113495bSYour Name //// Register TCL_R0_GXI_CLOCK_GATE_DISABLE //// 4787*5113495bSYour Name 4788*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x) (x+0x000009bc) 4789*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x) (x+0x000009bc) 4790*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RMSK 0x80000fff 4791*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SHFT 0 4792*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_IN(x) \ 4793*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RMSK) 4794*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask) \ 4795*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask) 4796*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val) \ 4797*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), val) 4798*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ 4799*5113495bSYour Name do {\ 4800*5113495bSYour Name HWIO_INTLOCK(); \ 4801*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_IN(x)); \ 4802*5113495bSYour Name HWIO_INTFREE();\ 4803*5113495bSYour Name } while (0) 4804*5113495bSYour Name 4805*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_BMSK 0x80000000 4806*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_SHFT 0x1f 4807*5113495bSYour Name 4808*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SPARE_BMSK 0x00000800 4809*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SPARE_SHFT 0xb 4810*5113495bSYour Name 4811*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WDOG_CTR_BMSK 0x00000400 4812*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WDOG_CTR_SHFT 0xa 4813*5113495bSYour Name 4814*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_FIFO_BMSK 0x00000200 4815*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_FIFO_SHFT 0x9 4816*5113495bSYour Name 4817*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_FIFO_BMSK 0x00000100 4818*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_FIFO_SHFT 0x8 4819*5113495bSYour Name 4820*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_BMSK 0x00000080 4821*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_SHFT 0x7 4822*5113495bSYour Name 4823*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_AXI_MAS_BMSK 0x00000040 4824*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_AXI_MAS_SHFT 0x6 4825*5113495bSYour Name 4826*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_BMSK 0x00000020 4827*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_SHFT 0x5 4828*5113495bSYour Name 4829*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_BMSK 0x00000010 4830*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_SHFT 0x4 4831*5113495bSYour Name 4832*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_CMD_BMSK 0x00000008 4833*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_CMD_SHFT 0x3 4834*5113495bSYour Name 4835*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_CMD_BMSK 0x00000004 4836*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_CMD_SHFT 0x2 4837*5113495bSYour Name 4838*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_CMD_BMSK 0x00000002 4839*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_CMD_SHFT 0x1 4840*5113495bSYour Name 4841*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CORE_BMSK 0x00000001 4842*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CORE_SHFT 0x0 4843*5113495bSYour Name 4844*5113495bSYour Name //// Register TCL_R0_GXI_GXI_ERR_INTS //// 4845*5113495bSYour Name 4846*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x) (x+0x000009c0) 4847*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_PHYS(x) (x+0x000009c0) 4848*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_RMSK 0x01010101 4849*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_SHFT 0 4850*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_IN(x) \ 4851*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), HWIO_TCL_R0_GXI_GXI_ERR_INTS_RMSK) 4852*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_INM(x, mask) \ 4853*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), mask) 4854*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_OUT(x, val) \ 4855*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), val) 4856*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ 4857*5113495bSYour Name do {\ 4858*5113495bSYour Name HWIO_INTLOCK(); \ 4859*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_ERR_INTS_IN(x)); \ 4860*5113495bSYour Name HWIO_INTFREE();\ 4861*5113495bSYour Name } while (0) 4862*5113495bSYour Name 4863*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_BMSK 0x01000000 4864*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_SHFT 0x18 4865*5113495bSYour Name 4866*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_BMSK 0x00010000 4867*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_SHFT 0x10 4868*5113495bSYour Name 4869*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_BMSK 0x00000100 4870*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_SHFT 0x8 4871*5113495bSYour Name 4872*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_BMSK 0x00000001 4873*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_SHFT 0x0 4874*5113495bSYour Name 4875*5113495bSYour Name //// Register TCL_R0_GXI_GXI_ERR_STATS //// 4876*5113495bSYour Name 4877*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x) (x+0x000009c4) 4878*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_PHYS(x) (x+0x000009c4) 4879*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_RMSK 0x003f3f3f 4880*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_SHFT 0 4881*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_IN(x) \ 4882*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), HWIO_TCL_R0_GXI_GXI_ERR_STATS_RMSK) 4883*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_INM(x, mask) \ 4884*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), mask) 4885*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_OUT(x, val) \ 4886*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), val) 4887*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ 4888*5113495bSYour Name do {\ 4889*5113495bSYour Name HWIO_INTLOCK(); \ 4890*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_ERR_STATS_IN(x)); \ 4891*5113495bSYour Name HWIO_INTFREE();\ 4892*5113495bSYour Name } while (0) 4893*5113495bSYour Name 4894*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_BMSK 0x003f0000 4895*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_SHFT 0x10 4896*5113495bSYour Name 4897*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_ERR_PORT_BMSK 0x00003f00 4898*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_ERR_PORT_SHFT 0x8 4899*5113495bSYour Name 4900*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_RD_ERR_PORT_BMSK 0x0000003f 4901*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_RD_ERR_PORT_SHFT 0x0 4902*5113495bSYour Name 4903*5113495bSYour Name //// Register TCL_R0_GXI_GXI_DEFAULT_CONTROL //// 4904*5113495bSYour Name 4905*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x) (x+0x000009c8) 4906*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x) (x+0x000009c8) 4907*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_RMSK 0xffff3f3f 4908*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_SHFT 0 4909*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_IN(x) \ 4910*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_RMSK) 4911*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask) \ 4912*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask) 4913*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val) \ 4914*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), val) 4915*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ 4916*5113495bSYour Name do {\ 4917*5113495bSYour Name HWIO_INTLOCK(); \ 4918*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_IN(x)); \ 4919*5113495bSYour Name HWIO_INTFREE();\ 4920*5113495bSYour Name } while (0) 4921*5113495bSYour Name 4922*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_BMSK 0xff000000 4923*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_SHFT 0x18 4924*5113495bSYour Name 4925*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_BMSK 0x00ff0000 4926*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_SHFT 0x10 4927*5113495bSYour Name 4928*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_BMSK 0x00003f00 4929*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_SHFT 0x8 4930*5113495bSYour Name 4931*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_BMSK 0x0000003f 4932*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_SHFT 0x0 4933*5113495bSYour Name 4934*5113495bSYour Name //// Register TCL_R0_GXI_GXI_REDUCED_CONTROL //// 4935*5113495bSYour Name 4936*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x) (x+0x000009cc) 4937*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x) (x+0x000009cc) 4938*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_RMSK 0xffff3f3f 4939*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_SHFT 0 4940*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_IN(x) \ 4941*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_RMSK) 4942*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask) \ 4943*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask) 4944*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val) \ 4945*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), val) 4946*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ 4947*5113495bSYour Name do {\ 4948*5113495bSYour Name HWIO_INTLOCK(); \ 4949*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_IN(x)); \ 4950*5113495bSYour Name HWIO_INTFREE();\ 4951*5113495bSYour Name } while (0) 4952*5113495bSYour Name 4953*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_BMSK 0xff000000 4954*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_SHFT 0x18 4955*5113495bSYour Name 4956*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_BMSK 0x00ff0000 4957*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_SHFT 0x10 4958*5113495bSYour Name 4959*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_BMSK 0x00003f00 4960*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_SHFT 0x8 4961*5113495bSYour Name 4962*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_BMSK 0x0000003f 4963*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_SHFT 0x0 4964*5113495bSYour Name 4965*5113495bSYour Name //// Register TCL_R0_GXI_GXI_MISC_CONTROL //// 4966*5113495bSYour Name 4967*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x) (x+0x000009d0) 4968*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_PHYS(x) (x+0x000009d0) 4969*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_RMSK 0x0fffffff 4970*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_SHFT 0 4971*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_IN(x) \ 4972*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_RMSK) 4973*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_INM(x, mask) \ 4974*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask) 4975*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_OUT(x, val) \ 4976*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), val) 4977*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ 4978*5113495bSYour Name do {\ 4979*5113495bSYour Name HWIO_INTLOCK(); \ 4980*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_IN(x)); \ 4981*5113495bSYour Name HWIO_INTFREE();\ 4982*5113495bSYour Name } while (0) 4983*5113495bSYour Name 4984*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_BMSK 0x08000000 4985*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_SHFT 0x1b 4986*5113495bSYour Name 4987*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_BMSK 0x04000000 4988*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_SHFT 0x1a 4989*5113495bSYour Name 4990*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_BMSK 0x02000000 4991*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_SHFT 0x19 4992*5113495bSYour Name 4993*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_BMSK 0x01000000 4994*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_SHFT 0x18 4995*5113495bSYour Name 4996*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_BMSK 0x00800000 4997*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_SHFT 0x17 4998*5113495bSYour Name 4999*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_BMSK 0x00700000 5000*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_SHFT 0x14 5001*5113495bSYour Name 5002*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_BMSK 0x000e0000 5003*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_SHFT 0x11 5004*5113495bSYour Name 5005*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_BMSK 0x0001fe00 5006*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_SHFT 0x9 5007*5113495bSYour Name 5008*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_BMSK 0x000001fe 5009*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_SHFT 0x1 5010*5113495bSYour Name 5011*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_CLEAR_STATS_BMSK 0x00000001 5012*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_CLEAR_STATS_SHFT 0x0 5013*5113495bSYour Name 5014*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WDOG_CONTROL //// 5015*5113495bSYour Name 5016*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x) (x+0x000009d4) 5017*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_PHYS(x) (x+0x000009d4) 5018*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_RMSK 0xffff0001 5019*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_SHFT 0 5020*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_IN(x) \ 5021*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_RMSK) 5022*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask) \ 5023*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask) 5024*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val) \ 5025*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), val) 5026*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ 5027*5113495bSYour Name do {\ 5028*5113495bSYour Name HWIO_INTLOCK(); \ 5029*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_IN(x)); \ 5030*5113495bSYour Name HWIO_INTFREE();\ 5031*5113495bSYour Name } while (0) 5032*5113495bSYour Name 5033*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_BMSK 0xffff0000 5034*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_SHFT 0x10 5035*5113495bSYour Name 5036*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_BMSK 0x00000001 5037*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_SHFT 0x0 5038*5113495bSYour Name 5039*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WDOG_STATUS //// 5040*5113495bSYour Name 5041*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x) (x+0x000009d8) 5042*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_PHYS(x) (x+0x000009d8) 5043*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_RMSK 0x0000ffff 5044*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_SHFT 0 5045*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_IN(x) \ 5046*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_RMSK) 5047*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_INM(x, mask) \ 5048*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask) 5049*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_OUT(x, val) \ 5050*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), val) 5051*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ 5052*5113495bSYour Name do {\ 5053*5113495bSYour Name HWIO_INTLOCK(); \ 5054*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_IN(x)); \ 5055*5113495bSYour Name HWIO_INTFREE();\ 5056*5113495bSYour Name } while (0) 5057*5113495bSYour Name 5058*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_GXI_WDOG_STATUS_BMSK 0x0000ffff 5059*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_GXI_WDOG_STATUS_SHFT 0x0 5060*5113495bSYour Name 5061*5113495bSYour Name //// Register TCL_R0_GXI_GXI_IDLE_COUNTERS //// 5062*5113495bSYour Name 5063*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x) (x+0x000009dc) 5064*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x) (x+0x000009dc) 5065*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_RMSK 0xffffffff 5066*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_SHFT 0 5067*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_IN(x) \ 5068*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_RMSK) 5069*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask) \ 5070*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask) 5071*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val) \ 5072*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), val) 5073*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ 5074*5113495bSYour Name do {\ 5075*5113495bSYour Name HWIO_INTLOCK(); \ 5076*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_IN(x)); \ 5077*5113495bSYour Name HWIO_INTFREE();\ 5078*5113495bSYour Name } while (0) 5079*5113495bSYour Name 5080*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_BMSK 0xffff0000 5081*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_SHFT 0x10 5082*5113495bSYour Name 5083*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_BMSK 0x0000ffff 5084*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_SHFT 0x0 5085*5113495bSYour Name 5086*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_LATENCY_CTRL //// 5087*5113495bSYour Name 5088*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x) (x+0x000009e0) 5089*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_PHYS(x) (x+0x000009e0) 5090*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_RMSK 0x000fffff 5091*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_SHFT 0 5092*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x) \ 5093*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_RMSK) 5094*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask) \ 5095*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask) 5096*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val) \ 5097*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), val) 5098*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val) \ 5099*5113495bSYour Name do {\ 5100*5113495bSYour Name HWIO_INTLOCK(); \ 5101*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x)); \ 5102*5113495bSYour Name HWIO_INTFREE();\ 5103*5113495bSYour Name } while (0) 5104*5113495bSYour Name 5105*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0x000e0000 5106*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11 5107*5113495bSYour Name 5108*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x00010000 5109*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10 5110*5113495bSYour Name 5111*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0x0000ffff 5112*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0 5113*5113495bSYour Name 5114*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_LATENCY_CTRL //// 5115*5113495bSYour Name 5116*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x) (x+0x000009e4) 5117*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_PHYS(x) (x+0x000009e4) 5118*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_RMSK 0x000fffff 5119*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_SHFT 0 5120*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x) \ 5121*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_RMSK) 5122*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask) \ 5123*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask) 5124*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val) \ 5125*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), val) 5126*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val) \ 5127*5113495bSYour Name do {\ 5128*5113495bSYour Name HWIO_INTLOCK(); \ 5129*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x)); \ 5130*5113495bSYour Name HWIO_INTFREE();\ 5131*5113495bSYour Name } while (0) 5132*5113495bSYour Name 5133*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0x000e0000 5134*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11 5135*5113495bSYour Name 5136*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x00010000 5137*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10 5138*5113495bSYour Name 5139*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0x0000ffff 5140*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0 5141*5113495bSYour Name 5142*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0 //// 5143*5113495bSYour Name 5144*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x000009e8) 5145*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x000009e8) 5146*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_RMSK 0xffffffff 5147*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_SHFT 0 5148*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x) \ 5149*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_RMSK) 5150*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ 5151*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 5152*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ 5153*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), val) 5154*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ 5155*5113495bSYour Name do {\ 5156*5113495bSYour Name HWIO_INTLOCK(); \ 5157*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x)); \ 5158*5113495bSYour Name HWIO_INTFREE();\ 5159*5113495bSYour Name } while (0) 5160*5113495bSYour Name 5161*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_VALUE_BMSK 0xffffffff 5162*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_VALUE_SHFT 0x0 5163*5113495bSYour Name 5164*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1 //// 5165*5113495bSYour Name 5166*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x000009ec) 5167*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x000009ec) 5168*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_RMSK 0xffffffff 5169*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_SHFT 0 5170*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x) \ 5171*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_RMSK) 5172*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ 5173*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 5174*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ 5175*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), val) 5176*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ 5177*5113495bSYour Name do {\ 5178*5113495bSYour Name HWIO_INTLOCK(); \ 5179*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x)); \ 5180*5113495bSYour Name HWIO_INTFREE();\ 5181*5113495bSYour Name } while (0) 5182*5113495bSYour Name 5183*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_VALUE_BMSK 0xffffffff 5184*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_VALUE_SHFT 0x0 5185*5113495bSYour Name 5186*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0 //// 5187*5113495bSYour Name 5188*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x000009f0) 5189*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x000009f0) 5190*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_RMSK 0xffffffff 5191*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_SHFT 0 5192*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x) \ 5193*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_RMSK) 5194*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ 5195*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 5196*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ 5197*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), val) 5198*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ 5199*5113495bSYour Name do {\ 5200*5113495bSYour Name HWIO_INTLOCK(); \ 5201*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x)); \ 5202*5113495bSYour Name HWIO_INTFREE();\ 5203*5113495bSYour Name } while (0) 5204*5113495bSYour Name 5205*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_VALUE_BMSK 0xffffffff 5206*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_VALUE_SHFT 0x0 5207*5113495bSYour Name 5208*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1 //// 5209*5113495bSYour Name 5210*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x000009f4) 5211*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x000009f4) 5212*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_RMSK 0xffffffff 5213*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_SHFT 0 5214*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x) \ 5215*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_RMSK) 5216*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ 5217*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 5218*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ 5219*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), val) 5220*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ 5221*5113495bSYour Name do {\ 5222*5113495bSYour Name HWIO_INTLOCK(); \ 5223*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x)); \ 5224*5113495bSYour Name HWIO_INTFREE();\ 5225*5113495bSYour Name } while (0) 5226*5113495bSYour Name 5227*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_VALUE_BMSK 0xffffffff 5228*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_VALUE_SHFT 0x0 5229*5113495bSYour Name 5230*5113495bSYour Name //// Register TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL //// 5231*5113495bSYour Name 5232*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x) (x+0x000009f8) 5233*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_PHYS(x) (x+0x000009f8) 5234*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RMSK 0x00009f9f 5235*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_SHFT 0 5236*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_IN(x) \ 5237*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RMSK) 5238*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_INM(x, mask) \ 5239*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask) 5240*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUT(x, val) \ 5241*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), val) 5242*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val) \ 5243*5113495bSYour Name do {\ 5244*5113495bSYour Name HWIO_INTLOCK(); \ 5245*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_IN(x)); \ 5246*5113495bSYour Name HWIO_INTFREE();\ 5247*5113495bSYour Name } while (0) 5248*5113495bSYour Name 5249*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_EN_BMSK 0x00008000 5250*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_EN_SHFT 0xf 5251*5113495bSYour Name 5252*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_CNT_BMSK 0x00001f00 5253*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_CNT_SHFT 0x8 5254*5113495bSYour Name 5255*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_EN_BMSK 0x00000080 5256*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_EN_SHFT 0x7 5257*5113495bSYour Name 5258*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_CNT_BMSK 0x0000001f 5259*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_CNT_SHFT 0x0 5260*5113495bSYour Name 5261*5113495bSYour Name //// Register TCL_R0_ASE_GST_BASE_ADDR_LOW //// 5262*5113495bSYour Name 5263*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x) (x+0x000009fc) 5264*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_PHYS(x) (x+0x000009fc) 5265*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_RMSK 0xffffffff 5266*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_SHFT 0 5267*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_IN(x) \ 5268*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_RMSK) 5269*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_INM(x, mask) \ 5270*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), mask) 5271*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_OUT(x, val) \ 5272*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), val) 5273*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_OUTM(x, mask, val) \ 5274*5113495bSYour Name do {\ 5275*5113495bSYour Name HWIO_INTLOCK(); \ 5276*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_IN(x)); \ 5277*5113495bSYour Name HWIO_INTFREE();\ 5278*5113495bSYour Name } while (0) 5279*5113495bSYour Name 5280*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_VAL_BMSK 0xffffffff 5281*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_VAL_SHFT 0x0 5282*5113495bSYour Name 5283*5113495bSYour Name //// Register TCL_R0_ASE_GST_BASE_ADDR_HIGH //// 5284*5113495bSYour Name 5285*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x) (x+0x00000a00) 5286*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_PHYS(x) (x+0x00000a00) 5287*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_RMSK 0x000000ff 5288*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_SHFT 0 5289*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_IN(x) \ 5290*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_RMSK) 5291*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_INM(x, mask) \ 5292*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), mask) 5293*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_OUT(x, val) \ 5294*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), val) 5295*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_OUTM(x, mask, val) \ 5296*5113495bSYour Name do {\ 5297*5113495bSYour Name HWIO_INTLOCK(); \ 5298*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_IN(x)); \ 5299*5113495bSYour Name HWIO_INTFREE();\ 5300*5113495bSYour Name } while (0) 5301*5113495bSYour Name 5302*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_VAL_BMSK 0x000000ff 5303*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_VAL_SHFT 0x0 5304*5113495bSYour Name 5305*5113495bSYour Name //// Register TCL_R0_ASE_GST_SIZE //// 5306*5113495bSYour Name 5307*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x) (x+0x00000a04) 5308*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_PHYS(x) (x+0x00000a04) 5309*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_RMSK 0x000fffff 5310*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_SHFT 0 5311*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_IN(x) \ 5312*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), HWIO_TCL_R0_ASE_GST_SIZE_RMSK) 5313*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_INM(x, mask) \ 5314*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), mask) 5315*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_OUT(x, val) \ 5316*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), val) 5317*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_OUTM(x, mask, val) \ 5318*5113495bSYour Name do {\ 5319*5113495bSYour Name HWIO_INTLOCK(); \ 5320*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_SIZE_IN(x)); \ 5321*5113495bSYour Name HWIO_INTFREE();\ 5322*5113495bSYour Name } while (0) 5323*5113495bSYour Name 5324*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_VAL_BMSK 0x000fffff 5325*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_VAL_SHFT 0x0 5326*5113495bSYour Name 5327*5113495bSYour Name //// Register TCL_R0_ASE_SEARCH_CTRL //// 5328*5113495bSYour Name 5329*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x) (x+0x00000a08) 5330*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_PHYS(x) (x+0x00000a08) 5331*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_RMSK 0xffff3fff 5332*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SHFT 0 5333*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_IN(x) \ 5334*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), HWIO_TCL_R0_ASE_SEARCH_CTRL_RMSK) 5335*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_INM(x, mask) \ 5336*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), mask) 5337*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_OUT(x, val) \ 5338*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), val) 5339*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_OUTM(x, mask, val) \ 5340*5113495bSYour Name do {\ 5341*5113495bSYour Name HWIO_INTLOCK(); \ 5342*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_ASE_SEARCH_CTRL_IN(x)); \ 5343*5113495bSYour Name HWIO_INTFREE();\ 5344*5113495bSYour Name } while (0) 5345*5113495bSYour Name 5346*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_TIMEOUT_THRESH_BMSK 0xffff0000 5347*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_TIMEOUT_THRESH_SHFT 0x10 5348*5113495bSYour Name 5349*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_CMD_READ_BYPASS_EN_BMSK 0x00002000 5350*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_CMD_READ_BYPASS_EN_SHFT 0xd 5351*5113495bSYour Name 5352*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_WRITE_BACK_FIX_EN_BMSK 0x00001000 5353*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_WRITE_BACK_FIX_EN_SHFT 0xc 5354*5113495bSYour Name 5355*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_ONLY_ENTRY_CMD_FIX_EN_BMSK 0x00000800 5356*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_ONLY_ENTRY_CMD_FIX_EN_SHFT 0xb 5357*5113495bSYour Name 5358*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_FAILURES_ENABLE_BMSK 0x00000400 5359*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_FAILURES_ENABLE_SHFT 0xa 5360*5113495bSYour Name 5361*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_DISABLE_BMSK 0x00000200 5362*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_DISABLE_SHFT 0x9 5363*5113495bSYour Name 5364*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SEARCH_SWAP_BMSK 0x00000100 5365*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SEARCH_SWAP_SHFT 0x8 5366*5113495bSYour Name 5367*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_MAX_SEARCH_BMSK 0x000000ff 5368*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_MAX_SEARCH_SHFT 0x0 5369*5113495bSYour Name 5370*5113495bSYour Name //// Register TCL_R0_ASE_WATCHDOG //// 5371*5113495bSYour Name 5372*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x) (x+0x00000a0c) 5373*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_PHYS(x) (x+0x00000a0c) 5374*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_RMSK 0xffffffff 5375*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_SHFT 0 5376*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_IN(x) \ 5377*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), HWIO_TCL_R0_ASE_WATCHDOG_RMSK) 5378*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_INM(x, mask) \ 5379*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), mask) 5380*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_OUT(x, val) \ 5381*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), val) 5382*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_OUTM(x, mask, val) \ 5383*5113495bSYour Name do {\ 5384*5113495bSYour Name HWIO_INTLOCK(); \ 5385*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), mask, val, HWIO_TCL_R0_ASE_WATCHDOG_IN(x)); \ 5386*5113495bSYour Name HWIO_INTFREE();\ 5387*5113495bSYour Name } while (0) 5388*5113495bSYour Name 5389*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_STATUS_BMSK 0xffff0000 5390*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_STATUS_SHFT 0x10 5391*5113495bSYour Name 5392*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_LIMIT_BMSK 0x0000ffff 5393*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_LIMIT_SHFT 0x0 5394*5113495bSYour Name 5395*5113495bSYour Name //// Register TCL_R0_ASE_CLKGATE_DISABLE //// 5396*5113495bSYour Name 5397*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x) (x+0x00000a10) 5398*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_PHYS(x) (x+0x00000a10) 5399*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_RMSK 0xffffffff 5400*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SHFT 0 5401*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_IN(x) \ 5402*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), HWIO_TCL_R0_ASE_CLKGATE_DISABLE_RMSK) 5403*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_INM(x, mask) \ 5404*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), mask) 5405*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_OUT(x, val) \ 5406*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), val) 5407*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_OUTM(x, mask, val) \ 5408*5113495bSYour Name do {\ 5409*5113495bSYour Name HWIO_INTLOCK(); \ 5410*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_ASE_CLKGATE_DISABLE_IN(x)); \ 5411*5113495bSYour Name HWIO_INTFREE();\ 5412*5113495bSYour Name } while (0) 5413*5113495bSYour Name 5414*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CLK_EXTEND_BMSK 0x80000000 5415*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CLK_EXTEND_SHFT 0x1f 5416*5113495bSYour Name 5417*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CPU_IF_EXTEND_BMSK 0x40000000 5418*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CPU_IF_EXTEND_SHFT 0x1e 5419*5113495bSYour Name 5420*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_RSRVD_BMSK 0x3ffffe00 5421*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_RSRVD_SHFT 0x9 5422*5113495bSYour Name 5423*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_TOP_BMSK 0x00000100 5424*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_TOP_SHFT 0x8 5425*5113495bSYour Name 5426*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CACHE_BMSK 0x00000080 5427*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CACHE_SHFT 0x7 5428*5113495bSYour Name 5429*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SLOTS_ARRAY_HASH_BMSK 0x00000040 5430*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SLOTS_ARRAY_HASH_SHFT 0x6 5431*5113495bSYour Name 5432*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_APP_RETURN_BMSK 0x00000020 5433*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_APP_RETURN_SHFT 0x5 5434*5113495bSYour Name 5435*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP2_BMSK 0x00000010 5436*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP2_SHFT 0x4 5437*5113495bSYour Name 5438*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP1_BMSK 0x00000008 5439*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP1_SHFT 0x3 5440*5113495bSYour Name 5441*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS2_BMSK 0x00000004 5442*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS2_SHFT 0x2 5443*5113495bSYour Name 5444*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS1_BMSK 0x00000002 5445*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS1_SHFT 0x1 5446*5113495bSYour Name 5447*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_CTL_BMSK 0x00000001 5448*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_CTL_SHFT 0x0 5449*5113495bSYour Name 5450*5113495bSYour Name //// Register TCL_R0_ASE_WRITE_BACK_PENDING //// 5451*5113495bSYour Name 5452*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x) (x+0x00000a14) 5453*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_PHYS(x) (x+0x00000a14) 5454*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_RMSK 0x00000001 5455*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_SHFT 0 5456*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_IN(x) \ 5457*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_RMSK) 5458*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_INM(x, mask) \ 5459*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), mask) 5460*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_OUT(x, val) \ 5461*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), val) 5462*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_OUTM(x, mask, val) \ 5463*5113495bSYour Name do {\ 5464*5113495bSYour Name HWIO_INTLOCK(); \ 5465*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), mask, val, HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_IN(x)); \ 5466*5113495bSYour Name HWIO_INTFREE();\ 5467*5113495bSYour Name } while (0) 5468*5113495bSYour Name 5469*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_STATUS_BMSK 0x00000001 5470*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_STATUS_SHFT 0x0 5471*5113495bSYour Name 5472*5113495bSYour Name //// Register TCL_R1_CACHE_FLUSH //// 5473*5113495bSYour Name 5474*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ADDR(x) (x+0x00001000) 5475*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_PHYS(x) (x+0x00001000) 5476*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_RMSK 0x00000003 5477*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_SHFT 0 5478*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_IN(x) \ 5479*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), HWIO_TCL_R1_CACHE_FLUSH_RMSK) 5480*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_INM(x, mask) \ 5481*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), mask) 5482*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_OUT(x, val) \ 5483*5113495bSYour Name out_dword( HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), val) 5484*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_OUTM(x, mask, val) \ 5485*5113495bSYour Name do {\ 5486*5113495bSYour Name HWIO_INTLOCK(); \ 5487*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_CACHE_FLUSH_ADDR(x), mask, val, HWIO_TCL_R1_CACHE_FLUSH_IN(x)); \ 5488*5113495bSYour Name HWIO_INTFREE();\ 5489*5113495bSYour Name } while (0) 5490*5113495bSYour Name 5491*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_STATUS_BMSK 0x00000002 5492*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_STATUS_SHFT 0x1 5493*5113495bSYour Name 5494*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ENABLE_BMSK 0x00000001 5495*5113495bSYour Name #define HWIO_TCL_R1_CACHE_FLUSH_ENABLE_SHFT 0x0 5496*5113495bSYour Name 5497*5113495bSYour Name //// Register TCL_R1_SM_STATES_IX_0 //// 5498*5113495bSYour Name 5499*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x) (x+0x00001004) 5500*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_PHYS(x) (x+0x00001004) 5501*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_RMSK 0x3fffffff 5502*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SHFT 0 5503*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_IN(x) \ 5504*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), HWIO_TCL_R1_SM_STATES_IX_0_RMSK) 5505*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_INM(x, mask) \ 5506*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), mask) 5507*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_OUT(x, val) \ 5508*5113495bSYour Name out_dword( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), val) 5509*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ 5510*5113495bSYour Name do {\ 5511*5113495bSYour Name HWIO_INTLOCK(); \ 5512*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_TCL_R1_SM_STATES_IX_0_IN(x)); \ 5513*5113495bSYour Name HWIO_INTFREE();\ 5514*5113495bSYour Name } while (0) 5515*5113495bSYour Name 5516*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_RES_WR_BMSK 0x30000000 5517*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_RES_WR_SHFT 0x1c 5518*5113495bSYour Name 5519*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_BMSK 0x0e000000 5520*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_SHFT 0x19 5521*5113495bSYour Name 5522*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_TLV_GEN_BMSK 0x01e00000 5523*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_TLV_GEN_SHFT 0x15 5524*5113495bSYour Name 5525*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_EXTN_DESC_FETCH_BMSK 0x001c0000 5526*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_EXTN_DESC_FETCH_SHFT 0x12 5527*5113495bSYour Name 5528*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_MSDU_FETCH_BMSK 0x00038000 5529*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_MSDU_FETCH_SHFT 0xf 5530*5113495bSYour Name 5531*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL_CREDIT_RING_BMSK 0x00007000 5532*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL_CREDIT_RING_SHFT 0xc 5533*5113495bSYour Name 5534*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_FW2TCL1_RING_BMSK 0x00000e00 5535*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_FW2TCL1_RING_SHFT 0x9 5536*5113495bSYour Name 5537*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL3_RING_BMSK 0x000001c0 5538*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL3_RING_SHFT 0x6 5539*5113495bSYour Name 5540*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL2_RING_BMSK 0x00000038 5541*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL2_RING_SHFT 0x3 5542*5113495bSYour Name 5543*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL1_RING_BMSK 0x00000007 5544*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL1_RING_SHFT 0x0 5545*5113495bSYour Name 5546*5113495bSYour Name //// Register TCL_R1_SM_STATES_IX_1 //// 5547*5113495bSYour Name 5548*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x) (x+0x00001008) 5549*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PHYS(x) (x+0x00001008) 5550*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_RMSK 0x001fffff 5551*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_SHFT 0 5552*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_IN(x) \ 5553*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), HWIO_TCL_R1_SM_STATES_IX_1_RMSK) 5554*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_INM(x, mask) \ 5555*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), mask) 5556*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_OUT(x, val) \ 5557*5113495bSYour Name out_dword( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), val) 5558*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ 5559*5113495bSYour Name do {\ 5560*5113495bSYour Name HWIO_INTLOCK(); \ 5561*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_TCL_R1_SM_STATES_IX_1_IN(x)); \ 5562*5113495bSYour Name HWIO_INTFREE();\ 5563*5113495bSYour Name } while (0) 5564*5113495bSYour Name 5565*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_IDLE_SEQUENCE_BMSK 0x001c0000 5566*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_IDLE_SEQUENCE_SHFT 0x12 5567*5113495bSYour Name 5568*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_DSCP_TABLE_ACC_BMSK 0x00038000 5569*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_DSCP_TABLE_ACC_SHFT 0xf 5570*5113495bSYour Name 5571*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PROD_CTRL_BMSK 0x00007000 5572*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PROD_CTRL_SHFT 0xc 5573*5113495bSYour Name 5574*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS2_BMSK 0x00000e00 5575*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS2_SHFT 0x9 5576*5113495bSYour Name 5577*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS1_BMSK 0x000001c0 5578*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS1_SHFT 0x6 5579*5113495bSYour Name 5580*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2FW_BMSK 0x00000038 5581*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2FW_SHFT 0x3 5582*5113495bSYour Name 5583*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2TQM_BMSK 0x00000007 5584*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2TQM_SHFT 0x0 5585*5113495bSYour Name 5586*5113495bSYour Name //// Register TCL_R1_STATUS //// 5587*5113495bSYour Name 5588*5113495bSYour Name #define HWIO_TCL_R1_STATUS_ADDR(x) (x+0x0000100c) 5589*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PHYS(x) (x+0x0000100c) 5590*5113495bSYour Name #define HWIO_TCL_R1_STATUS_RMSK 0x07ffffff 5591*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SHFT 0 5592*5113495bSYour Name #define HWIO_TCL_R1_STATUS_IN(x) \ 5593*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_STATUS_ADDR(x), HWIO_TCL_R1_STATUS_RMSK) 5594*5113495bSYour Name #define HWIO_TCL_R1_STATUS_INM(x, mask) \ 5595*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_STATUS_ADDR(x), mask) 5596*5113495bSYour Name #define HWIO_TCL_R1_STATUS_OUT(x, val) \ 5597*5113495bSYour Name out_dword( HWIO_TCL_R1_STATUS_ADDR(x), val) 5598*5113495bSYour Name #define HWIO_TCL_R1_STATUS_OUTM(x, mask, val) \ 5599*5113495bSYour Name do {\ 5600*5113495bSYour Name HWIO_INTLOCK(); \ 5601*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_STATUS_ADDR(x), mask, val, HWIO_TCL_R1_STATUS_IN(x)); \ 5602*5113495bSYour Name HWIO_INTFREE();\ 5603*5113495bSYour Name } while (0) 5604*5113495bSYour Name 5605*5113495bSYour Name #define HWIO_TCL_R1_STATUS_HDR_BUF_EMPTY_BMSK 0x04000000 5606*5113495bSYour Name #define HWIO_TCL_R1_STATUS_HDR_BUF_EMPTY_SHFT 0x1a 5607*5113495bSYour Name 5608*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DESC_BUF_EMPTY_BMSK 0x02000000 5609*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DESC_BUF_EMPTY_SHFT 0x19 5610*5113495bSYour Name 5611*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GSE_CCE_RES_IDLE_BMSK 0x01000000 5612*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GSE_CCE_RES_IDLE_SHFT 0x18 5613*5113495bSYour Name 5614*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PROD_RING_BUNC_FIFO_CTRL_IDLE_BMSK 0x00800000 5615*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PROD_RING_BUNC_FIFO_CTRL_IDLE_SHFT 0x17 5616*5113495bSYour Name 5617*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PROD_RING_CTRL_IDLE_BMSK 0x00400000 5618*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PROD_RING_CTRL_IDLE_SHFT 0x16 5619*5113495bSYour Name 5620*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TLV_DECODER_IDLE_BMSK 0x00200000 5621*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TLV_DECODER_IDLE_SHFT 0x15 5622*5113495bSYour Name 5623*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TLV_GEN_IDLE_BMSK 0x00100000 5624*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TLV_GEN_IDLE_SHFT 0x14 5625*5113495bSYour Name 5626*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GSE_CTRL_IDLE_BMSK 0x00080000 5627*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GSE_CTRL_IDLE_SHFT 0x13 5628*5113495bSYour Name 5629*5113495bSYour Name #define HWIO_TCL_R1_STATUS_CLFY_WRAP_IDLE_BMSK 0x00040000 5630*5113495bSYour Name #define HWIO_TCL_R1_STATUS_CLFY_WRAP_IDLE_SHFT 0x12 5631*5113495bSYour Name 5632*5113495bSYour Name #define HWIO_TCL_R1_STATUS_CCE_OR_LCE_IDLE_BMSK 0x00020000 5633*5113495bSYour Name #define HWIO_TCL_R1_STATUS_CCE_OR_LCE_IDLE_SHFT 0x11 5634*5113495bSYour Name 5635*5113495bSYour Name #define HWIO_TCL_R1_STATUS_ASE_IDLE_BMSK 0x00010000 5636*5113495bSYour Name #define HWIO_TCL_R1_STATUS_ASE_IDLE_SHFT 0x10 5637*5113495bSYour Name 5638*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PARSER_IDLE_BMSK 0x00008000 5639*5113495bSYour Name #define HWIO_TCL_R1_STATUS_PARSER_IDLE_SHFT 0xf 5640*5113495bSYour Name 5641*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_STATUS2_PROD_IDLE_BMSK 0x00004000 5642*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_STATUS2_PROD_IDLE_SHFT 0xe 5643*5113495bSYour Name 5644*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_STATUS1_PROD_IDLE_BMSK 0x00002000 5645*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_STATUS1_PROD_IDLE_SHFT 0xd 5646*5113495bSYour Name 5647*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL2FW_PROD_IDLE_BMSK 0x00001000 5648*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL2FW_PROD_IDLE_SHFT 0xc 5649*5113495bSYour Name 5650*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL2TQM_PROD_IDLE_BMSK 0x00000800 5651*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL2TQM_PROD_IDLE_SHFT 0xb 5652*5113495bSYour Name 5653*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL_CREDIT_CONS_IDLE_BMSK 0x00000400 5654*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL_CREDIT_CONS_IDLE_SHFT 0xa 5655*5113495bSYour Name 5656*5113495bSYour Name #define HWIO_TCL_R1_STATUS_FW2TCL1_CONS_IDLE_BMSK 0x00000200 5657*5113495bSYour Name #define HWIO_TCL_R1_STATUS_FW2TCL1_CONS_IDLE_SHFT 0x9 5658*5113495bSYour Name 5659*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL3_CONS_IDLE_BMSK 0x00000100 5660*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL3_CONS_IDLE_SHFT 0x8 5661*5113495bSYour Name 5662*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL2_CONS_IDLE_BMSK 0x00000080 5663*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL2_CONS_IDLE_SHFT 0x7 5664*5113495bSYour Name 5665*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL1_CONS_IDLE_BMSK 0x00000040 5666*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SW2TCL1_CONS_IDLE_SHFT 0x6 5667*5113495bSYour Name 5668*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GXI_IDLE_BMSK 0x00000020 5669*5113495bSYour Name #define HWIO_TCL_R1_STATUS_GXI_IDLE_SHFT 0x5 5670*5113495bSYour Name 5671*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DESC_RD_IDLE_BMSK 0x00000010 5672*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DESC_RD_IDLE_SHFT 0x4 5673*5113495bSYour Name 5674*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SDU_HDR_FETCH_IDLE_BMSK 0x00000008 5675*5113495bSYour Name #define HWIO_TCL_R1_STATUS_SDU_HDR_FETCH_IDLE_SHFT 0x3 5676*5113495bSYour Name 5677*5113495bSYour Name #define HWIO_TCL_R1_STATUS_LINK_DESC_FETCH_IDLE_BMSK 0x00000004 5678*5113495bSYour Name #define HWIO_TCL_R1_STATUS_LINK_DESC_FETCH_IDLE_SHFT 0x2 5679*5113495bSYour Name 5680*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DATA_FETCH_IDLE_BMSK 0x00000002 5681*5113495bSYour Name #define HWIO_TCL_R1_STATUS_DATA_FETCH_IDLE_SHFT 0x1 5682*5113495bSYour Name 5683*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_INT_IDLE_BMSK 0x00000001 5684*5113495bSYour Name #define HWIO_TCL_R1_STATUS_TCL_INT_IDLE_SHFT 0x0 5685*5113495bSYour Name 5686*5113495bSYour Name //// Register TCL_R1_TESTBUS_CTRL_0 //// 5687*5113495bSYour Name 5688*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x) (x+0x00001010) 5689*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PHYS(x) (x+0x00001010) 5690*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_RMSK 0x3fffffff 5691*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_SHFT 0 5692*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_IN(x) \ 5693*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), HWIO_TCL_R1_TESTBUS_CTRL_0_RMSK) 5694*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_INM(x, mask) \ 5695*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), mask) 5696*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_OUT(x, val) \ 5697*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), val) 5698*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_OUTM(x, mask, val) \ 5699*5113495bSYour Name do {\ 5700*5113495bSYour Name HWIO_INTLOCK(); \ 5701*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_CTRL_0_IN(x)); \ 5702*5113495bSYour Name HWIO_INTFREE();\ 5703*5113495bSYour Name } while (0) 5704*5113495bSYour Name 5705*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_BMSK 0x20000000 5706*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_SHFT 0x1d 5707*5113495bSYour Name 5708*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_TCL_MAIN_SELECT_BMSK 0x1f800000 5709*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_TCL_MAIN_SELECT_SHFT 0x17 5710*5113495bSYour Name 5711*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_GXI_SELECT_BMSK 0x007c0000 5712*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_GXI_SELECT_SHFT 0x12 5713*5113495bSYour Name 5714*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_FSE_SELECT_BMSK 0x0003c000 5715*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_FSE_SELECT_SHFT 0xe 5716*5113495bSYour Name 5717*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ASE_SELECT_BMSK 0x00003c00 5718*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ASE_SELECT_SHFT 0xa 5719*5113495bSYour Name 5720*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PARSER_SELECT_BMSK 0x000003e0 5721*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PARSER_SELECT_SHFT 0x5 5722*5113495bSYour Name 5723*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_CCE_SELECT_BMSK 0x0000001f 5724*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_CCE_SELECT_SHFT 0x0 5725*5113495bSYour Name 5726*5113495bSYour Name //// Register TCL_R1_TESTBUS_LOW //// 5727*5113495bSYour Name 5728*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_ADDR(x) (x+0x00001014) 5729*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_PHYS(x) (x+0x00001014) 5730*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_RMSK 0xffffffff 5731*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_SHFT 0 5732*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_IN(x) \ 5733*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), HWIO_TCL_R1_TESTBUS_LOW_RMSK) 5734*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_INM(x, mask) \ 5735*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), mask) 5736*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_OUT(x, val) \ 5737*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), val) 5738*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_OUTM(x, mask, val) \ 5739*5113495bSYour Name do {\ 5740*5113495bSYour Name HWIO_INTLOCK(); \ 5741*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_LOW_IN(x)); \ 5742*5113495bSYour Name HWIO_INTFREE();\ 5743*5113495bSYour Name } while (0) 5744*5113495bSYour Name 5745*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_VAL_BMSK 0xffffffff 5746*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_VAL_SHFT 0x0 5747*5113495bSYour Name 5748*5113495bSYour Name //// Register TCL_R1_TESTBUS_HIGH //// 5749*5113495bSYour Name 5750*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x) (x+0x00001018) 5751*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_PHYS(x) (x+0x00001018) 5752*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_RMSK 0x000000ff 5753*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_SHFT 0 5754*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_IN(x) \ 5755*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), HWIO_TCL_R1_TESTBUS_HIGH_RMSK) 5756*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_INM(x, mask) \ 5757*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), mask) 5758*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_OUT(x, val) \ 5759*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), val) 5760*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_OUTM(x, mask, val) \ 5761*5113495bSYour Name do {\ 5762*5113495bSYour Name HWIO_INTLOCK(); \ 5763*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_HIGH_IN(x)); \ 5764*5113495bSYour Name HWIO_INTFREE();\ 5765*5113495bSYour Name } while (0) 5766*5113495bSYour Name 5767*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_VAL_BMSK 0x000000ff 5768*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_VAL_SHFT 0x0 5769*5113495bSYour Name 5770*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_0 //// 5771*5113495bSYour Name 5772*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x) (x+0x0000101c) 5773*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_PHYS(x) (x+0x0000101c) 5774*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_RMSK 0xffffffff 5775*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_SHFT 0 5776*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_IN(x) \ 5777*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_0_RMSK) 5778*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_INM(x, mask) \ 5779*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), mask) 5780*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_OUT(x, val) \ 5781*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), val) 5782*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_OUTM(x, mask, val) \ 5783*5113495bSYour Name do {\ 5784*5113495bSYour Name HWIO_INTLOCK(); \ 5785*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_0_IN(x)); \ 5786*5113495bSYour Name HWIO_INTFREE();\ 5787*5113495bSYour Name } while (0) 5788*5113495bSYour Name 5789*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_VAL_BMSK 0xffffffff 5790*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_VAL_SHFT 0x0 5791*5113495bSYour Name 5792*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_1 //// 5793*5113495bSYour Name 5794*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x) (x+0x00001020) 5795*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_PHYS(x) (x+0x00001020) 5796*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_RMSK 0xffffffff 5797*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_SHFT 0 5798*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_IN(x) \ 5799*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_1_RMSK) 5800*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_INM(x, mask) \ 5801*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), mask) 5802*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_OUT(x, val) \ 5803*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), val) 5804*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_OUTM(x, mask, val) \ 5805*5113495bSYour Name do {\ 5806*5113495bSYour Name HWIO_INTLOCK(); \ 5807*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_1_IN(x)); \ 5808*5113495bSYour Name HWIO_INTFREE();\ 5809*5113495bSYour Name } while (0) 5810*5113495bSYour Name 5811*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_VAL_BMSK 0xffffffff 5812*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_VAL_SHFT 0x0 5813*5113495bSYour Name 5814*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_2 //// 5815*5113495bSYour Name 5816*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x) (x+0x00001024) 5817*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_PHYS(x) (x+0x00001024) 5818*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_RMSK 0xffffffff 5819*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_SHFT 0 5820*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_IN(x) \ 5821*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_2_RMSK) 5822*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_INM(x, mask) \ 5823*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), mask) 5824*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_OUT(x, val) \ 5825*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), val) 5826*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_OUTM(x, mask, val) \ 5827*5113495bSYour Name do {\ 5828*5113495bSYour Name HWIO_INTLOCK(); \ 5829*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_2_IN(x)); \ 5830*5113495bSYour Name HWIO_INTFREE();\ 5831*5113495bSYour Name } while (0) 5832*5113495bSYour Name 5833*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_VAL_BMSK 0xffffffff 5834*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_VAL_SHFT 0x0 5835*5113495bSYour Name 5836*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_3 //// 5837*5113495bSYour Name 5838*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x) (x+0x00001028) 5839*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_PHYS(x) (x+0x00001028) 5840*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_RMSK 0xffffffff 5841*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_SHFT 0 5842*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_IN(x) \ 5843*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_3_RMSK) 5844*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_INM(x, mask) \ 5845*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), mask) 5846*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_OUT(x, val) \ 5847*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), val) 5848*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_OUTM(x, mask, val) \ 5849*5113495bSYour Name do {\ 5850*5113495bSYour Name HWIO_INTLOCK(); \ 5851*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_3_IN(x)); \ 5852*5113495bSYour Name HWIO_INTFREE();\ 5853*5113495bSYour Name } while (0) 5854*5113495bSYour Name 5855*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_VAL_BMSK 0xffffffff 5856*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_VAL_SHFT 0x0 5857*5113495bSYour Name 5858*5113495bSYour Name //// Register TCL_R1_REG_ACCESS_EVENT_GEN_CTRL //// 5859*5113495bSYour Name 5860*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x) (x+0x0000102c) 5861*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_PHYS(x) (x+0x0000102c) 5862*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_RMSK 0xffffffff 5863*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_SHFT 0 5864*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_IN(x) \ 5865*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_RMSK) 5866*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_INM(x, mask) \ 5867*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), mask) 5868*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_OUT(x, val) \ 5869*5113495bSYour Name out_dword( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), val) 5870*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_OUTM(x, mask, val) \ 5871*5113495bSYour Name do {\ 5872*5113495bSYour Name HWIO_INTLOCK(); \ 5873*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), mask, val, HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_IN(x)); \ 5874*5113495bSYour Name HWIO_INTFREE();\ 5875*5113495bSYour Name } while (0) 5876*5113495bSYour Name 5877*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_BMSK 0xfffe0000 5878*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_SHFT 0x11 5879*5113495bSYour Name 5880*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_BMSK 0x0001fffc 5881*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_SHFT 0x2 5882*5113495bSYour Name 5883*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_BMSK 0x00000002 5884*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_SHFT 0x1 5885*5113495bSYour Name 5886*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_BMSK 0x00000001 5887*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_SHFT 0x0 5888*5113495bSYour Name 5889*5113495bSYour Name //// Register TCL_R1_SPARE_REGISTER //// 5890*5113495bSYour Name 5891*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_ADDR(x) (x+0x00001030) 5892*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_PHYS(x) (x+0x00001030) 5893*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_RMSK 0xffffffff 5894*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_SHFT 0 5895*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_IN(x) \ 5896*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), HWIO_TCL_R1_SPARE_REGISTER_RMSK) 5897*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_INM(x, mask) \ 5898*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), mask) 5899*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_OUT(x, val) \ 5900*5113495bSYour Name out_dword( HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), val) 5901*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_OUTM(x, mask, val) \ 5902*5113495bSYour Name do {\ 5903*5113495bSYour Name HWIO_INTLOCK(); \ 5904*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SPARE_REGISTER_ADDR(x), mask, val, HWIO_TCL_R1_SPARE_REGISTER_IN(x)); \ 5905*5113495bSYour Name HWIO_INTFREE();\ 5906*5113495bSYour Name } while (0) 5907*5113495bSYour Name 5908*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_TCL_SPARE_FIELD_32_BMSK 0xffffffff 5909*5113495bSYour Name #define HWIO_TCL_R1_SPARE_REGISTER_TCL_SPARE_FIELD_32_SHFT 0x0 5910*5113495bSYour Name 5911*5113495bSYour Name //// Register TCL_R1_END_OF_TEST_CHECK //// 5912*5113495bSYour Name 5913*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x) (x+0x00001034) 5914*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_PHYS(x) (x+0x00001034) 5915*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_RMSK 0x00000001 5916*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_SHFT 0 5917*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_IN(x) \ 5918*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R1_END_OF_TEST_CHECK_RMSK) 5919*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_INM(x, mask) \ 5920*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), mask) 5921*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_OUT(x, val) \ 5922*5113495bSYour Name out_dword( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), val) 5923*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 5924*5113495bSYour Name do {\ 5925*5113495bSYour Name HWIO_INTLOCK(); \ 5926*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R1_END_OF_TEST_CHECK_IN(x)); \ 5927*5113495bSYour Name HWIO_INTFREE();\ 5928*5113495bSYour Name } while (0) 5929*5113495bSYour Name 5930*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 5931*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 5932*5113495bSYour Name 5933*5113495bSYour Name //// Register TCL_R1_ASE_END_OF_TEST_CHECK //// 5934*5113495bSYour Name 5935*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x) (x+0x00001038) 5936*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_PHYS(x) (x+0x00001038) 5937*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_RMSK 0x00000001 5938*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_SHFT 0 5939*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_IN(x) \ 5940*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_RMSK) 5941*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_INM(x, mask) \ 5942*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), mask) 5943*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_OUT(x, val) \ 5944*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), val) 5945*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 5946*5113495bSYour Name do {\ 5947*5113495bSYour Name HWIO_INTLOCK(); \ 5948*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_IN(x)); \ 5949*5113495bSYour Name HWIO_INTFREE();\ 5950*5113495bSYour Name } while (0) 5951*5113495bSYour Name 5952*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 5953*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 5954*5113495bSYour Name 5955*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_CLEAR_COUNTERS //// 5956*5113495bSYour Name 5957*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x) (x+0x0000103c) 5958*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_PHYS(x) (x+0x0000103c) 5959*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_RMSK 0x00000001 5960*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_SHFT 0 5961*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_IN(x) \ 5962*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_RMSK) 5963*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_INM(x, mask) \ 5964*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), mask) 5965*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_OUT(x, val) \ 5966*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), val) 5967*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_OUTM(x, mask, val) \ 5968*5113495bSYour Name do {\ 5969*5113495bSYour Name HWIO_INTLOCK(); \ 5970*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_IN(x)); \ 5971*5113495bSYour Name HWIO_INTFREE();\ 5972*5113495bSYour Name } while (0) 5973*5113495bSYour Name 5974*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_EN_BMSK 0x00000001 5975*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_EN_SHFT 0x0 5976*5113495bSYour Name 5977*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER //// 5978*5113495bSYour Name 5979*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x) (x+0x00001040) 5980*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_PHYS(x) (x+0x00001040) 5981*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_RMSK 0xffffffff 5982*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_SHFT 0 5983*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_IN(x) \ 5984*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_RMSK) 5985*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_INM(x, mask) \ 5986*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), mask) 5987*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_OUT(x, val) \ 5988*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), val) 5989*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_OUTM(x, mask, val) \ 5990*5113495bSYour Name do {\ 5991*5113495bSYour Name HWIO_INTLOCK(); \ 5992*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_IN(x)); \ 5993*5113495bSYour Name HWIO_INTFREE();\ 5994*5113495bSYour Name } while (0) 5995*5113495bSYour Name 5996*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_VAL_BMSK 0xffffffff 5997*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_VAL_SHFT 0x0 5998*5113495bSYour Name 5999*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER //// 6000*5113495bSYour Name 6001*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x) (x+0x00001044) 6002*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_PHYS(x) (x+0x00001044) 6003*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_RMSK 0xffffffff 6004*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_SHFT 0 6005*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_IN(x) \ 6006*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_RMSK) 6007*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_INM(x, mask) \ 6008*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), mask) 6009*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_OUT(x, val) \ 6010*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), val) 6011*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_OUTM(x, mask, val) \ 6012*5113495bSYour Name do {\ 6013*5113495bSYour Name HWIO_INTLOCK(); \ 6014*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_IN(x)); \ 6015*5113495bSYour Name HWIO_INTFREE();\ 6016*5113495bSYour Name } while (0) 6017*5113495bSYour Name 6018*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_VAL_BMSK 0xffffffff 6019*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_VAL_SHFT 0x0 6020*5113495bSYour Name 6021*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER //// 6022*5113495bSYour Name 6023*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x) (x+0x00001048) 6024*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PHYS(x) (x+0x00001048) 6025*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_RMSK 0x000fffff 6026*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_SHFT 0 6027*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_IN(x) \ 6028*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_RMSK) 6029*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_INM(x, mask) \ 6030*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), mask) 6031*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_OUT(x, val) \ 6032*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), val) 6033*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_OUTM(x, mask, val) \ 6034*5113495bSYour Name do {\ 6035*5113495bSYour Name HWIO_INTLOCK(); \ 6036*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_IN(x)); \ 6037*5113495bSYour Name HWIO_INTFREE();\ 6038*5113495bSYour Name } while (0) 6039*5113495bSYour Name 6040*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PEAK_BMSK 0x000ffc00 6041*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PEAK_SHFT 0xa 6042*5113495bSYour Name 6043*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_CURR_BMSK 0x000003ff 6044*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_CURR_SHFT 0x0 6045*5113495bSYour Name 6046*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER //// 6047*5113495bSYour Name 6048*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x) (x+0x0000104c) 6049*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PHYS(x) (x+0x0000104c) 6050*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_RMSK 0x03ffffff 6051*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SHFT 0 6052*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_IN(x) \ 6053*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_RMSK) 6054*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_INM(x, mask) \ 6055*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), mask) 6056*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_OUT(x, val) \ 6057*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), val) 6058*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_OUTM(x, mask, val) \ 6059*5113495bSYour Name do {\ 6060*5113495bSYour Name HWIO_INTLOCK(); \ 6061*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_IN(x)); \ 6062*5113495bSYour Name HWIO_INTFREE();\ 6063*5113495bSYour Name } while (0) 6064*5113495bSYour Name 6065*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SQUARE_OCCUPANCY_BMSK 0x03fffc00 6066*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SQUARE_OCCUPANCY_SHFT 0xa 6067*5113495bSYour Name 6068*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PEAK_NUM_SEARCH_PENDING_BMSK 0x000003e0 6069*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PEAK_NUM_SEARCH_PENDING_SHFT 0x5 6070*5113495bSYour Name 6071*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_NUM_SEARCH_PENDING_BMSK 0x0000001f 6072*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_NUM_SEARCH_PENDING_SHFT 0x0 6073*5113495bSYour Name 6074*5113495bSYour Name //// Register TCL_R1_ASE_SM_STATES //// 6075*5113495bSYour Name 6076*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_ADDR(x) (x+0x00001050) 6077*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_PHYS(x) (x+0x00001050) 6078*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_RMSK 0x003fff0f 6079*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_SHFT 0 6080*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_IN(x) \ 6081*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), HWIO_TCL_R1_ASE_SM_STATES_RMSK) 6082*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_INM(x, mask) \ 6083*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), mask) 6084*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_OUT(x, val) \ 6085*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), val) 6086*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_OUTM(x, mask, val) \ 6087*5113495bSYour Name do {\ 6088*5113495bSYour Name HWIO_INTLOCK(); \ 6089*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), mask, val, HWIO_TCL_R1_ASE_SM_STATES_IN(x)); \ 6090*5113495bSYour Name HWIO_INTFREE();\ 6091*5113495bSYour Name } while (0) 6092*5113495bSYour Name 6093*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_GSE_CTRL_STATE_BMSK 0x00300000 6094*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_GSE_CTRL_STATE_SHFT 0x14 6095*5113495bSYour Name 6096*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_CACHE_CHK_STATE_BMSK 0x000c0000 6097*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_CACHE_CHK_STATE_SHFT 0x12 6098*5113495bSYour Name 6099*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS1_STATE_BMSK 0x00030000 6100*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS1_STATE_SHFT 0x10 6101*5113495bSYour Name 6102*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS2_STATE_BMSK 0x0000c000 6103*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS2_STATE_SHFT 0xe 6104*5113495bSYour Name 6105*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP1_STATE_BMSK 0x00003800 6106*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP1_STATE_SHFT 0xb 6107*5113495bSYour Name 6108*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP2_STATE_BMSK 0x00000700 6109*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP2_STATE_SHFT 0x8 6110*5113495bSYour Name 6111*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_APP_RETURN_STATE_BMSK 0x0000000f 6112*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_APP_RETURN_STATE_SHFT 0x0 6113*5113495bSYour Name 6114*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG //// 6115*5113495bSYour Name 6116*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x) (x+0x00001054) 6117*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_PHYS(x) (x+0x00001054) 6118*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_RMSK 0x000003ff 6119*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_SHFT 0 6120*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_IN(x) \ 6121*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), HWIO_TCL_R1_ASE_CACHE_DEBUG_RMSK) 6122*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_INM(x, mask) \ 6123*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), mask) 6124*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_OUT(x, val) \ 6125*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), val) 6126*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_OUTM(x, mask, val) \ 6127*5113495bSYour Name do {\ 6128*5113495bSYour Name HWIO_INTLOCK(); \ 6129*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_IN(x)); \ 6130*5113495bSYour Name HWIO_INTFREE();\ 6131*5113495bSYour Name } while (0) 6132*5113495bSYour Name 6133*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_READ_IDX_BMSK 0x000003ff 6134*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_READ_IDX_SHFT 0x0 6135*5113495bSYour Name 6136*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS //// 6137*5113495bSYour Name 6138*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x) (x+0x00001058) 6139*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_PHYS(x) (x+0x00001058) 6140*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_RMSK 0x007fffff 6141*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_SHFT 0 6142*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_IN(x) \ 6143*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_RMSK) 6144*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_INM(x, mask) \ 6145*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), mask) 6146*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_OUT(x, val) \ 6147*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), val) 6148*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_OUTM(x, mask, val) \ 6149*5113495bSYour Name do {\ 6150*5113495bSYour Name HWIO_INTLOCK(); \ 6151*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_IN(x)); \ 6152*5113495bSYour Name HWIO_INTFREE();\ 6153*5113495bSYour Name } while (0) 6154*5113495bSYour Name 6155*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_GST_IDX_BMSK 0x007ffff8 6156*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_GST_IDX_SHFT 0x3 6157*5113495bSYour Name 6158*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_CACHE_ONLY_BMSK 0x00000004 6159*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_CACHE_ONLY_SHFT 0x2 6160*5113495bSYour Name 6161*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_DIRTY_BMSK 0x00000002 6162*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_DIRTY_SHFT 0x1 6163*5113495bSYour Name 6164*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_VALID_BMSK 0x00000001 6165*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_VALID_SHFT 0x0 6166*5113495bSYour Name 6167*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG_ENTRY_n //// 6168*5113495bSYour Name 6169*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n) (base+0x105C+0x4*n) 6170*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_PHYS(base, n) (base+0x105C+0x4*n) 6171*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_RMSK 0xffffffff 6172*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_SHFT 0 6173*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_MAXn 31 6174*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INI(base, n) \ 6175*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_RMSK) 6176*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INMI(base, n, mask) \ 6177*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), mask) 6178*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_OUTI(base, n, val) \ 6179*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), val) 6180*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_OUTMI(base, n, mask, val) \ 6181*5113495bSYour Name do {\ 6182*5113495bSYour Name HWIO_INTLOCK(); \ 6183*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INI(base, n)); \ 6184*5113495bSYour Name HWIO_INTFREE();\ 6185*5113495bSYour Name } while (0) 6186*5113495bSYour Name 6187*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_VAL_BMSK 0xffffffff 6188*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_VAL_SHFT 0x0 6189*5113495bSYour Name 6190*5113495bSYour Name //// Register TCL_R2_SW2TCL1_RING_HP //// 6191*5113495bSYour Name 6192*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x) (x+0x00002000) 6193*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_PHYS(x) (x+0x00002000) 6194*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_RMSK 0x000fffff 6195*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_SHFT 0 6196*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_IN(x) \ 6197*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL1_RING_HP_RMSK) 6198*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_INM(x, mask) \ 6199*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), mask) 6200*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_OUT(x, val) \ 6201*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), val) 6202*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_OUTM(x, mask, val) \ 6203*5113495bSYour Name do {\ 6204*5113495bSYour Name HWIO_INTLOCK(); \ 6205*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL1_RING_HP_IN(x)); \ 6206*5113495bSYour Name HWIO_INTFREE();\ 6207*5113495bSYour Name } while (0) 6208*5113495bSYour Name 6209*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_HEAD_PTR_BMSK 0x000fffff 6210*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_HEAD_PTR_SHFT 0x0 6211*5113495bSYour Name 6212*5113495bSYour Name //// Register TCL_R2_SW2TCL1_RING_TP //// 6213*5113495bSYour Name 6214*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x) (x+0x00002004) 6215*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_PHYS(x) (x+0x00002004) 6216*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_RMSK 0x000fffff 6217*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_SHFT 0 6218*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_IN(x) \ 6219*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL1_RING_TP_RMSK) 6220*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_INM(x, mask) \ 6221*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), mask) 6222*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_OUT(x, val) \ 6223*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), val) 6224*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_OUTM(x, mask, val) \ 6225*5113495bSYour Name do {\ 6226*5113495bSYour Name HWIO_INTLOCK(); \ 6227*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL1_RING_TP_IN(x)); \ 6228*5113495bSYour Name HWIO_INTFREE();\ 6229*5113495bSYour Name } while (0) 6230*5113495bSYour Name 6231*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_TAIL_PTR_BMSK 0x000fffff 6232*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_TAIL_PTR_SHFT 0x0 6233*5113495bSYour Name 6234*5113495bSYour Name //// Register TCL_R2_SW2TCL2_RING_HP //// 6235*5113495bSYour Name 6236*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x) (x+0x00002008) 6237*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_PHYS(x) (x+0x00002008) 6238*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_RMSK 0x000fffff 6239*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_SHFT 0 6240*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_IN(x) \ 6241*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL2_RING_HP_RMSK) 6242*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_INM(x, mask) \ 6243*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), mask) 6244*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_OUT(x, val) \ 6245*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), val) 6246*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_OUTM(x, mask, val) \ 6247*5113495bSYour Name do {\ 6248*5113495bSYour Name HWIO_INTLOCK(); \ 6249*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL2_RING_HP_IN(x)); \ 6250*5113495bSYour Name HWIO_INTFREE();\ 6251*5113495bSYour Name } while (0) 6252*5113495bSYour Name 6253*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_HEAD_PTR_BMSK 0x000fffff 6254*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_HEAD_PTR_SHFT 0x0 6255*5113495bSYour Name 6256*5113495bSYour Name //// Register TCL_R2_SW2TCL2_RING_TP //// 6257*5113495bSYour Name 6258*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x) (x+0x0000200c) 6259*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_PHYS(x) (x+0x0000200c) 6260*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_RMSK 0x000fffff 6261*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_SHFT 0 6262*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_IN(x) \ 6263*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL2_RING_TP_RMSK) 6264*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_INM(x, mask) \ 6265*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), mask) 6266*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_OUT(x, val) \ 6267*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), val) 6268*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_OUTM(x, mask, val) \ 6269*5113495bSYour Name do {\ 6270*5113495bSYour Name HWIO_INTLOCK(); \ 6271*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL2_RING_TP_IN(x)); \ 6272*5113495bSYour Name HWIO_INTFREE();\ 6273*5113495bSYour Name } while (0) 6274*5113495bSYour Name 6275*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_TAIL_PTR_BMSK 0x000fffff 6276*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_TAIL_PTR_SHFT 0x0 6277*5113495bSYour Name 6278*5113495bSYour Name //// Register TCL_R2_SW2TCL3_RING_HP //// 6279*5113495bSYour Name 6280*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x) (x+0x00002010) 6281*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_PHYS(x) (x+0x00002010) 6282*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_RMSK 0x000fffff 6283*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_SHFT 0 6284*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_IN(x) \ 6285*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL3_RING_HP_RMSK) 6286*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_INM(x, mask) \ 6287*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), mask) 6288*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_OUT(x, val) \ 6289*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), val) 6290*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_OUTM(x, mask, val) \ 6291*5113495bSYour Name do {\ 6292*5113495bSYour Name HWIO_INTLOCK(); \ 6293*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL3_RING_HP_IN(x)); \ 6294*5113495bSYour Name HWIO_INTFREE();\ 6295*5113495bSYour Name } while (0) 6296*5113495bSYour Name 6297*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_HEAD_PTR_BMSK 0x000fffff 6298*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_HEAD_PTR_SHFT 0x0 6299*5113495bSYour Name 6300*5113495bSYour Name //// Register TCL_R2_SW2TCL3_RING_TP //// 6301*5113495bSYour Name 6302*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x) (x+0x00002014) 6303*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_PHYS(x) (x+0x00002014) 6304*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_RMSK 0x000fffff 6305*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_SHFT 0 6306*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_IN(x) \ 6307*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL3_RING_TP_RMSK) 6308*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_INM(x, mask) \ 6309*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), mask) 6310*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_OUT(x, val) \ 6311*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), val) 6312*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_OUTM(x, mask, val) \ 6313*5113495bSYour Name do {\ 6314*5113495bSYour Name HWIO_INTLOCK(); \ 6315*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL3_RING_TP_IN(x)); \ 6316*5113495bSYour Name HWIO_INTFREE();\ 6317*5113495bSYour Name } while (0) 6318*5113495bSYour Name 6319*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_TAIL_PTR_BMSK 0x000fffff 6320*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_TAIL_PTR_SHFT 0x0 6321*5113495bSYour Name 6322*5113495bSYour Name //// Register TCL_R2_SW2TCL_CREDIT_RING_HP //// 6323*5113495bSYour Name 6324*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x) (x+0x00002018) 6325*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_PHYS(x) (x+0x00002018) 6326*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_RMSK 0x000fffff 6327*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_SHFT 0 6328*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_IN(x) \ 6329*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_RMSK) 6330*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_INM(x, mask) \ 6331*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), mask) 6332*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_OUT(x, val) \ 6333*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), val) 6334*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_OUTM(x, mask, val) \ 6335*5113495bSYour Name do {\ 6336*5113495bSYour Name HWIO_INTLOCK(); \ 6337*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_IN(x)); \ 6338*5113495bSYour Name HWIO_INTFREE();\ 6339*5113495bSYour Name } while (0) 6340*5113495bSYour Name 6341*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_HEAD_PTR_BMSK 0x000fffff 6342*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_HEAD_PTR_SHFT 0x0 6343*5113495bSYour Name 6344*5113495bSYour Name //// Register TCL_R2_SW2TCL_CREDIT_RING_TP //// 6345*5113495bSYour Name 6346*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x) (x+0x0000201c) 6347*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_PHYS(x) (x+0x0000201c) 6348*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_RMSK 0x000fffff 6349*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_SHFT 0 6350*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_IN(x) \ 6351*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_RMSK) 6352*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_INM(x, mask) \ 6353*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), mask) 6354*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_OUT(x, val) \ 6355*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), val) 6356*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_OUTM(x, mask, val) \ 6357*5113495bSYour Name do {\ 6358*5113495bSYour Name HWIO_INTLOCK(); \ 6359*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_IN(x)); \ 6360*5113495bSYour Name HWIO_INTFREE();\ 6361*5113495bSYour Name } while (0) 6362*5113495bSYour Name 6363*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_TAIL_PTR_BMSK 0x000fffff 6364*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_TAIL_PTR_SHFT 0x0 6365*5113495bSYour Name 6366*5113495bSYour Name //// Register TCL_R2_FW2TCL1_RING_HP //// 6367*5113495bSYour Name 6368*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x) (x+0x00002020) 6369*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_PHYS(x) (x+0x00002020) 6370*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_RMSK 0x0000ffff 6371*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_SHFT 0 6372*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_IN(x) \ 6373*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), HWIO_TCL_R2_FW2TCL1_RING_HP_RMSK) 6374*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_INM(x, mask) \ 6375*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), mask) 6376*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_OUT(x, val) \ 6377*5113495bSYour Name out_dword( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), val) 6378*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_OUTM(x, mask, val) \ 6379*5113495bSYour Name do {\ 6380*5113495bSYour Name HWIO_INTLOCK(); \ 6381*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_FW2TCL1_RING_HP_IN(x)); \ 6382*5113495bSYour Name HWIO_INTFREE();\ 6383*5113495bSYour Name } while (0) 6384*5113495bSYour Name 6385*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6386*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_HEAD_PTR_SHFT 0x0 6387*5113495bSYour Name 6388*5113495bSYour Name //// Register TCL_R2_FW2TCL1_RING_TP //// 6389*5113495bSYour Name 6390*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x) (x+0x00002024) 6391*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_PHYS(x) (x+0x00002024) 6392*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_RMSK 0x0000ffff 6393*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_SHFT 0 6394*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_IN(x) \ 6395*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), HWIO_TCL_R2_FW2TCL1_RING_TP_RMSK) 6396*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_INM(x, mask) \ 6397*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), mask) 6398*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_OUT(x, val) \ 6399*5113495bSYour Name out_dword( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), val) 6400*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_OUTM(x, mask, val) \ 6401*5113495bSYour Name do {\ 6402*5113495bSYour Name HWIO_INTLOCK(); \ 6403*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_FW2TCL1_RING_TP_IN(x)); \ 6404*5113495bSYour Name HWIO_INTFREE();\ 6405*5113495bSYour Name } while (0) 6406*5113495bSYour Name 6407*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6408*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_TAIL_PTR_SHFT 0x0 6409*5113495bSYour Name 6410*5113495bSYour Name //// Register TCL_R2_TCL2TQM_RING_HP //// 6411*5113495bSYour Name 6412*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x) (x+0x00002028) 6413*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_PHYS(x) (x+0x00002028) 6414*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_RMSK 0x0000ffff 6415*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_SHFT 0 6416*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_IN(x) \ 6417*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), HWIO_TCL_R2_TCL2TQM_RING_HP_RMSK) 6418*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_INM(x, mask) \ 6419*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), mask) 6420*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_OUT(x, val) \ 6421*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), val) 6422*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_OUTM(x, mask, val) \ 6423*5113495bSYour Name do {\ 6424*5113495bSYour Name HWIO_INTLOCK(); \ 6425*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2TQM_RING_HP_IN(x)); \ 6426*5113495bSYour Name HWIO_INTFREE();\ 6427*5113495bSYour Name } while (0) 6428*5113495bSYour Name 6429*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6430*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_HEAD_PTR_SHFT 0x0 6431*5113495bSYour Name 6432*5113495bSYour Name //// Register TCL_R2_TCL2TQM_RING_TP //// 6433*5113495bSYour Name 6434*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x) (x+0x0000202c) 6435*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_PHYS(x) (x+0x0000202c) 6436*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_RMSK 0x0000ffff 6437*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_SHFT 0 6438*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_IN(x) \ 6439*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), HWIO_TCL_R2_TCL2TQM_RING_TP_RMSK) 6440*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_INM(x, mask) \ 6441*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), mask) 6442*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_OUT(x, val) \ 6443*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), val) 6444*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_OUTM(x, mask, val) \ 6445*5113495bSYour Name do {\ 6446*5113495bSYour Name HWIO_INTLOCK(); \ 6447*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2TQM_RING_TP_IN(x)); \ 6448*5113495bSYour Name HWIO_INTFREE();\ 6449*5113495bSYour Name } while (0) 6450*5113495bSYour Name 6451*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6452*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_TAIL_PTR_SHFT 0x0 6453*5113495bSYour Name 6454*5113495bSYour Name //// Register TCL_R2_TCL_STATUS1_RING_HP //// 6455*5113495bSYour Name 6456*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x) (x+0x00002030) 6457*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_PHYS(x) (x+0x00002030) 6458*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_RMSK 0x0000ffff 6459*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_SHFT 0 6460*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_IN(x) \ 6461*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), HWIO_TCL_R2_TCL_STATUS1_RING_HP_RMSK) 6462*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_INM(x, mask) \ 6463*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), mask) 6464*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_OUT(x, val) \ 6465*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), val) 6466*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_OUTM(x, mask, val) \ 6467*5113495bSYour Name do {\ 6468*5113495bSYour Name HWIO_INTLOCK(); \ 6469*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS1_RING_HP_IN(x)); \ 6470*5113495bSYour Name HWIO_INTFREE();\ 6471*5113495bSYour Name } while (0) 6472*5113495bSYour Name 6473*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6474*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_HEAD_PTR_SHFT 0x0 6475*5113495bSYour Name 6476*5113495bSYour Name //// Register TCL_R2_TCL_STATUS1_RING_TP //// 6477*5113495bSYour Name 6478*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x) (x+0x00002034) 6479*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_PHYS(x) (x+0x00002034) 6480*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_RMSK 0x0000ffff 6481*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_SHFT 0 6482*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_IN(x) \ 6483*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), HWIO_TCL_R2_TCL_STATUS1_RING_TP_RMSK) 6484*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_INM(x, mask) \ 6485*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), mask) 6486*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_OUT(x, val) \ 6487*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), val) 6488*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_OUTM(x, mask, val) \ 6489*5113495bSYour Name do {\ 6490*5113495bSYour Name HWIO_INTLOCK(); \ 6491*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS1_RING_TP_IN(x)); \ 6492*5113495bSYour Name HWIO_INTFREE();\ 6493*5113495bSYour Name } while (0) 6494*5113495bSYour Name 6495*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6496*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_TAIL_PTR_SHFT 0x0 6497*5113495bSYour Name 6498*5113495bSYour Name //// Register TCL_R2_TCL_STATUS2_RING_HP //// 6499*5113495bSYour Name 6500*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x) (x+0x00002038) 6501*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_PHYS(x) (x+0x00002038) 6502*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_RMSK 0x0000ffff 6503*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_SHFT 0 6504*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_IN(x) \ 6505*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), HWIO_TCL_R2_TCL_STATUS2_RING_HP_RMSK) 6506*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_INM(x, mask) \ 6507*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), mask) 6508*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_OUT(x, val) \ 6509*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), val) 6510*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_OUTM(x, mask, val) \ 6511*5113495bSYour Name do {\ 6512*5113495bSYour Name HWIO_INTLOCK(); \ 6513*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS2_RING_HP_IN(x)); \ 6514*5113495bSYour Name HWIO_INTFREE();\ 6515*5113495bSYour Name } while (0) 6516*5113495bSYour Name 6517*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6518*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_HEAD_PTR_SHFT 0x0 6519*5113495bSYour Name 6520*5113495bSYour Name //// Register TCL_R2_TCL_STATUS2_RING_TP //// 6521*5113495bSYour Name 6522*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x) (x+0x0000203c) 6523*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_PHYS(x) (x+0x0000203c) 6524*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_RMSK 0x0000ffff 6525*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_SHFT 0 6526*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_IN(x) \ 6527*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), HWIO_TCL_R2_TCL_STATUS2_RING_TP_RMSK) 6528*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_INM(x, mask) \ 6529*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), mask) 6530*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_OUT(x, val) \ 6531*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), val) 6532*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_OUTM(x, mask, val) \ 6533*5113495bSYour Name do {\ 6534*5113495bSYour Name HWIO_INTLOCK(); \ 6535*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS2_RING_TP_IN(x)); \ 6536*5113495bSYour Name HWIO_INTFREE();\ 6537*5113495bSYour Name } while (0) 6538*5113495bSYour Name 6539*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6540*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_TAIL_PTR_SHFT 0x0 6541*5113495bSYour Name 6542*5113495bSYour Name //// Register TCL_R2_TCL2FW_RING_HP //// 6543*5113495bSYour Name 6544*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x) (x+0x00002040) 6545*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_PHYS(x) (x+0x00002040) 6546*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_RMSK 0x0000ffff 6547*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_SHFT 0 6548*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_IN(x) \ 6549*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), HWIO_TCL_R2_TCL2FW_RING_HP_RMSK) 6550*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_INM(x, mask) \ 6551*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), mask) 6552*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_OUT(x, val) \ 6553*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), val) 6554*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_OUTM(x, mask, val) \ 6555*5113495bSYour Name do {\ 6556*5113495bSYour Name HWIO_INTLOCK(); \ 6557*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2FW_RING_HP_IN(x)); \ 6558*5113495bSYour Name HWIO_INTFREE();\ 6559*5113495bSYour Name } while (0) 6560*5113495bSYour Name 6561*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6562*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_HEAD_PTR_SHFT 0x0 6563*5113495bSYour Name 6564*5113495bSYour Name //// Register TCL_R2_TCL2FW_RING_TP //// 6565*5113495bSYour Name 6566*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x) (x+0x00002044) 6567*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_PHYS(x) (x+0x00002044) 6568*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_RMSK 0x0000ffff 6569*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_SHFT 0 6570*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_IN(x) \ 6571*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), HWIO_TCL_R2_TCL2FW_RING_TP_RMSK) 6572*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_INM(x, mask) \ 6573*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), mask) 6574*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_OUT(x, val) \ 6575*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), val) 6576*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_OUTM(x, mask, val) \ 6577*5113495bSYour Name do {\ 6578*5113495bSYour Name HWIO_INTLOCK(); \ 6579*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2FW_RING_TP_IN(x)); \ 6580*5113495bSYour Name HWIO_INTFREE();\ 6581*5113495bSYour Name } while (0) 6582*5113495bSYour Name 6583*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6584*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_TAIL_PTR_SHFT 0x0 6585*5113495bSYour Name 6586*5113495bSYour Name 6587*5113495bSYour Name #endif 6588*5113495bSYour Name 6589