xref: /wlan-driver/fw-api/hw/qcn6122/reo_update_rx_reo_queue.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _REO_UPDATE_RX_REO_QUEUE_H_
18 #define _REO_UPDATE_RX_REO_QUEUE_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #include "uniform_reo_cmd_header.h"
23 
24 // ################ START SUMMARY #################
25 //
26 //	Dword	Fields
27 //	0	struct uniform_reo_cmd_header cmd_header;
28 //	1	rx_reo_queue_desc_addr_31_0[31:0]
29 //	2	rx_reo_queue_desc_addr_39_32[7:0], update_receive_queue_number[8], update_vld[9], update_associated_link_descriptor_counter[10], update_disable_duplicate_detection[11], update_soft_reorder_enable[12], update_ac[13], update_bar[14], update_rty[15], update_chk_2k_mode[16], update_oor_mode[17], update_ba_window_size[18], update_pn_check_needed[19], update_pn_shall_be_even[20], update_pn_shall_be_uneven[21], update_pn_handling_enable[22], update_pn_size[23], update_ignore_ampdu_flag[24], update_svld[25], update_ssn[26], update_seq_2k_error_detected_flag[27], update_pn_error_detected_flag[28], update_pn_valid[29], update_pn[30], clear_stat_counters[31]
30 //	3	receive_queue_number[15:0], vld[16], associated_link_descriptor_counter[18:17], disable_duplicate_detection[19], soft_reorder_enable[20], ac[22:21], bar[23], rty[24], chk_2k_mode[25], oor_mode[26], pn_check_needed[27], pn_shall_be_even[28], pn_shall_be_uneven[29], pn_handling_enable[30], ignore_ampdu_flag[31]
31 //	4	ba_window_size[7:0], pn_size[9:8], svld[10], ssn[22:11], seq_2k_error_detected_flag[23], pn_error_detected_flag[24], pn_valid[25], flush_from_cache[26], reserved_4a[31:27]
32 //	5	pn_31_0[31:0]
33 //	6	pn_63_32[31:0]
34 //	7	pn_95_64[31:0]
35 //	8	pn_127_96[31:0]
36 //
37 // ################ END SUMMARY #################
38 
39 #define NUM_OF_DWORDS_REO_UPDATE_RX_REO_QUEUE 9
40 
41 struct reo_update_rx_reo_queue {
42     struct            uniform_reo_cmd_header                       cmd_header;
43              uint32_t rx_reo_queue_desc_addr_31_0     : 32; //[31:0]
44              uint32_t rx_reo_queue_desc_addr_39_32    :  8, //[7:0]
45                       update_receive_queue_number     :  1, //[8]
46                       update_vld                      :  1, //[9]
47                       update_associated_link_descriptor_counter:  1, //[10]
48                       update_disable_duplicate_detection:  1, //[11]
49                       update_soft_reorder_enable      :  1, //[12]
50                       update_ac                       :  1, //[13]
51                       update_bar                      :  1, //[14]
52                       update_rty                      :  1, //[15]
53                       update_chk_2k_mode              :  1, //[16]
54                       update_oor_mode                 :  1, //[17]
55                       update_ba_window_size           :  1, //[18]
56                       update_pn_check_needed          :  1, //[19]
57                       update_pn_shall_be_even         :  1, //[20]
58                       update_pn_shall_be_uneven       :  1, //[21]
59                       update_pn_handling_enable       :  1, //[22]
60                       update_pn_size                  :  1, //[23]
61                       update_ignore_ampdu_flag        :  1, //[24]
62                       update_svld                     :  1, //[25]
63                       update_ssn                      :  1, //[26]
64                       update_seq_2k_error_detected_flag:  1, //[27]
65                       update_pn_error_detected_flag   :  1, //[28]
66                       update_pn_valid                 :  1, //[29]
67                       update_pn                       :  1, //[30]
68                       clear_stat_counters             :  1; //[31]
69              uint32_t receive_queue_number            : 16, //[15:0]
70                       vld                             :  1, //[16]
71                       associated_link_descriptor_counter:  2, //[18:17]
72                       disable_duplicate_detection     :  1, //[19]
73                       soft_reorder_enable             :  1, //[20]
74                       ac                              :  2, //[22:21]
75                       bar                             :  1, //[23]
76                       rty                             :  1, //[24]
77                       chk_2k_mode                     :  1, //[25]
78                       oor_mode                        :  1, //[26]
79                       pn_check_needed                 :  1, //[27]
80                       pn_shall_be_even                :  1, //[28]
81                       pn_shall_be_uneven              :  1, //[29]
82                       pn_handling_enable              :  1, //[30]
83                       ignore_ampdu_flag               :  1; //[31]
84              uint32_t ba_window_size                  :  8, //[7:0]
85                       pn_size                         :  2, //[9:8]
86                       svld                            :  1, //[10]
87                       ssn                             : 12, //[22:11]
88                       seq_2k_error_detected_flag      :  1, //[23]
89                       pn_error_detected_flag          :  1, //[24]
90                       pn_valid                        :  1, //[25]
91                       flush_from_cache                :  1, //[26]
92                       reserved_4a                     :  5; //[31:27]
93              uint32_t pn_31_0                         : 32; //[31:0]
94              uint32_t pn_63_32                        : 32; //[31:0]
95              uint32_t pn_95_64                        : 32; //[31:0]
96              uint32_t pn_127_96                       : 32; //[31:0]
97 };
98 
99 /*
100 
101 struct uniform_reo_cmd_header cmd_header
102 
103 			Consumer: REO
104 
105 			Producer: SW
106 
107 
108 
109 			Details for command execution tracking purposes.
110 
111 rx_reo_queue_desc_addr_31_0
112 
113 			Consumer: REO
114 
115 			Producer: SW
116 
117 
118 
119 			Address (lower 32 bits) of the REO queue descriptor
120 
121 			<legal all>
122 
123 rx_reo_queue_desc_addr_39_32
124 
125 			Consumer: REO
126 
127 			Producer: SW
128 
129 
130 
131 			Address (upper 8 bits) of the REO queue descriptor
132 
133 			<legal all>
134 
135 update_receive_queue_number
136 
137 			Consumer: REO
138 
139 			Producer: SW
140 
141 			When set, receive_queue_number from this command will be
142 			updated in the descriptor.
143 
144 			<legal all>
145 
146 update_vld
147 
148 			Consumer: REO
149 
150 			Producer: SW
151 
152 
153 
154 			When clear, REO will NOT update the VLD bit setting. For
155 			this setting, SW MUST set the Flush_from_cache bit in this
156 			command.
157 
158 
159 
160 			When set, VLD from this command will be updated in the
161 			descriptor.
162 
163 			<legal all>
164 
165 update_associated_link_descriptor_counter
166 
167 			Consumer: REO
168 
169 			Producer: SW
170 
171 			When set, Associated_link_descriptor_counter from this
172 			command will be updated in the descriptor.
173 
174 			<legal all>
175 
176 update_disable_duplicate_detection
177 
178 			Consumer: REO
179 
180 			Producer: SW
181 
182 			When set, Disable_duplicate_detection from this command
183 			will be updated in the descriptor.
184 
185 			<legal all>
186 
187 update_soft_reorder_enable
188 
189 			Consumer: REO
190 
191 			Producer: SW
192 
193 			When set, Soft_reorder_enable from this command will be
194 			updated in the descriptor.
195 
196 			<legal all>
197 
198 update_ac
199 
200 			Consumer: REO
201 
202 			Producer: SW
203 
204 			When set, AC from this command will be updated in the
205 			descriptor.
206 
207 			<legal all>
208 
209 update_bar
210 
211 			Consumer: REO
212 
213 			Producer: SW
214 
215 			When set, BAR from this command will be updated in the
216 			descriptor.
217 
218 			<legal all>
219 
220 update_rty
221 
222 			Consumer: REO
223 
224 			Producer: SW
225 
226 			When set, RTY from this command will be updated in the
227 			descriptor.
228 
229 			<legal all>
230 
231 update_chk_2k_mode
232 
233 			Consumer: REO
234 
235 			Producer: SW
236 
237 			When set, Chk_2k_mode from this command will be updated
238 			in the descriptor.
239 
240 			<legal all>
241 
242 update_oor_mode
243 
244 			Consumer: REO
245 
246 			Producer: SW
247 
248 			When set, OOR_Mode from this command will be updated in
249 			the descriptor.
250 
251 			<legal all>
252 
253 update_ba_window_size
254 
255 			Consumer: REO
256 
257 			Producer: SW
258 
259 			When set, BA_window_size from this command will be
260 			updated in the descriptor.
261 
262 			<legal all>
263 
264 update_pn_check_needed
265 
266 			Consumer: REO
267 
268 			Producer: SW
269 
270 			When set, Pn_check_needed from this command will be
271 			updated in the descriptor.
272 
273 			<legal all>
274 
275 update_pn_shall_be_even
276 
277 			Consumer: REO
278 
279 			Producer: SW
280 
281 			When set, Pn_shall_be_even from this command will be
282 			updated in the descriptor.
283 
284 			<legal all>
285 
286 update_pn_shall_be_uneven
287 
288 			Consumer: REO
289 
290 			Producer: SW
291 
292 			When set, Pn_shall_be_uneven from this command will be
293 			updated in the descriptor.
294 
295 			<legal all>
296 
297 update_pn_handling_enable
298 
299 			Consumer: REO
300 
301 			Producer: SW
302 
303 			When set, Pn_handling_enable from this command will be
304 			updated in the descriptor.
305 
306 			<legal all>
307 
308 update_pn_size
309 
310 			Consumer: REO
311 
312 			Producer: SW
313 
314 			When set, Pn_size from this command will be updated in
315 			the descriptor.
316 
317 			<legal all>
318 
319 update_ignore_ampdu_flag
320 
321 			Consumer: REO
322 
323 			Producer: SW
324 
325 			When set, Ignore_ampdu_flag from this command will be
326 			updated in the descriptor.
327 
328 			<legal all>
329 
330 update_svld
331 
332 			Consumer: REO
333 
334 			Producer: SW
335 
336 			When set, Svld from this command will be updated in the
337 			descriptor.
338 
339 			<legal all>
340 
341 update_ssn
342 
343 			Consumer: REO
344 
345 			Producer: SW
346 
347 			When set, SSN from this command will be updated in the
348 			descriptor.
349 
350 			<legal all>
351 
352 update_seq_2k_error_detected_flag
353 
354 			Consumer: REO
355 
356 			Producer: SW
357 
358 			When set, Seq_2k_error_detected_flag from this command
359 			will be updated in the descriptor.
360 
361 			<legal all>
362 
363 update_pn_error_detected_flag
364 
365 			Consumer: REO
366 
367 			Producer: SW
368 
369 			When set, pn_error_detected_flag from this command will
370 			be updated in the descriptor.
371 
372 			<legal all>
373 
374 update_pn_valid
375 
376 			Consumer: REO
377 
378 			Producer: SW
379 
380 			When set, pn_valid from this command will be updated in
381 			the descriptor.
382 
383 			<legal all>
384 
385 update_pn
386 
387 			Consumer: REO
388 
389 			Producer: SW
390 
391 			When set, all pn_... fields from this command will be
392 			updated in the descriptor.
393 
394 			<legal all>
395 
396 clear_stat_counters
397 
398 			Consumer: REO
399 
400 			Producer: SW
401 
402 			When set, REO will clear (=> set to 0) the following
403 			stat counters in the REO_QUEUE_STRUCT
404 
405 
406 
407 			Last_rx_enqueue_TimeStamp
408 
409 			Last_rx_dequeue_Timestamp
410 
411 			Rx_bitmap (not a counter, but bitmap is cleared)
412 
413 			Timeout_count
414 
415 			Forward_due_to_bar_count
416 
417 			Duplicate_count
418 
419 			Frames_in_order_count
420 
421 			BAR_received_count
422 
423 			MPDU_Frames_processed_count
424 
425 			MSDU_Frames_processed_count
426 
427 			Total_processed_byte_count
428 
429 			Late_receive_MPDU_count
430 
431 			window_jump_2k
432 
433 			Hole_count
434 
435 
436 
437 			<legal all>
438 
439 receive_queue_number
440 
441 
442 
443 
444 			Field value to be copied over into the RX_REO_QUEUE
445 			descriptor.
446 
447 			<legal all>
448 
449 vld
450 
451 			Field only valid when Update_VLD is set
452 
453 
454 
455 			For Update_VLD set and VLD clear, SW MUST set the
456 			Flush_from_cache bit in this command.
457 
458 
459 
460 			Field value to be copied over into the RX_REO_QUEUE
461 			descriptor.
462 
463 			<legal all>
464 
465 associated_link_descriptor_counter
466 
467 			Field only valid when
468 			Update_Associated_link_descriptor_counter is set
469 
470 
471 
472 			Field value to be copied over into the RX_REO_QUEUE
473 			descriptor.
474 
475 			<legal all>
476 
477 disable_duplicate_detection
478 
479 			Field only valid when Update_Disable_duplicate_detection
480 			is set
481 
482 
483 
484 			Field value to be copied over into the RX_REO_QUEUE
485 			descriptor.
486 
487 			<legal all>
488 
489 soft_reorder_enable
490 
491 			Field only valid when Update_Soft_reorder_enable is set
492 
493 
494 
495 			Field value to be copied over into the RX_REO_QUEUE
496 			descriptor.
497 
498 			<legal all>
499 
500 ac
501 
502 			Field only valid when Update_AC is set
503 
504 
505 
506 			Field value to be copied over into the RX_REO_QUEUE
507 			descriptor.
508 
509 			<legal all>
510 
511 bar
512 
513 			Field only valid when Update_BAR is set
514 
515 
516 
517 			Field value to be copied over into the RX_REO_QUEUE
518 			descriptor.
519 
520 			<legal all>
521 
522 rty
523 
524 			Field only valid when Update_RTY is set
525 
526 
527 
528 			Field value to be copied over into the RX_REO_QUEUE
529 			descriptor.
530 
531 			<legal all>
532 
533 chk_2k_mode
534 
535 			Field only valid when Update_Chk_2k_Mode is set
536 
537 
538 
539 			Field value to be copied over into the RX_REO_QUEUE
540 			descriptor.
541 
542 			<legal all>
543 
544 oor_mode
545 
546 			Field only valid when Update_OOR_Mode is set
547 
548 
549 
550 			Field value to be copied over into the RX_REO_QUEUE
551 			descriptor.
552 
553 			<legal all>
554 
555 pn_check_needed
556 
557 			Field only valid when Update_Pn_check_needed is set
558 
559 
560 
561 			Field value to be copied over into the RX_REO_QUEUE
562 			descriptor.
563 
564 			<legal all>
565 
566 pn_shall_be_even
567 
568 			Field only valid when Update_Pn_shall_be_even is set
569 
570 
571 
572 			Field value to be copied over into the RX_REO_QUEUE
573 			descriptor.
574 
575 			<legal all>
576 
577 pn_shall_be_uneven
578 
579 			Field only valid when Update_Pn_shall_be_uneven is set
580 
581 
582 
583 			Field value to be copied over into the RX_REO_QUEUE
584 			descriptor.
585 
586 			<legal all>
587 
588 pn_handling_enable
589 
590 			Field only valid when Update_Pn_handling_enable is set
591 
592 
593 
594 			Field value to be copied over into the RX_REO_QUEUE
595 			descriptor.
596 
597 			<legal all>
598 
599 ignore_ampdu_flag
600 
601 			Field only valid when Update_Ignore_ampdu_flag is set
602 
603 
604 
605 			Field value to be copied over into the RX_REO_QUEUE
606 			descriptor.
607 
608 			<legal all>
609 
610 ba_window_size
611 
612 			Field only valid when Update_BA_window_size is set
613 
614 
615 
616 			Field value to be copied over into the RX_REO_QUEUE
617 			descriptor.
618 
619 			<legal all>
620 
621 pn_size
622 
623 			Field only valid when Update_Pn_size is set
624 
625 
626 
627 			Field value to be copied over into the RX_REO_QUEUE
628 			descriptor.
629 
630 
631 
632 			<enum 0     pn_size_24>
633 
634 			<enum 1     pn_size_48>
635 
636 			<enum 2     pn_size_128>
637 
638 
639 
640 			<legal 0-2>
641 
642 svld
643 
644 			Field only valid when Update_Svld is set
645 
646 
647 
648 			Field value to be copied over into the RX_REO_QUEUE
649 			descriptor.
650 
651 			<legal all>
652 
653 ssn
654 
655 			Field only valid when Update_SSN is set
656 
657 
658 
659 			Field value to be copied over into the RX_REO_QUEUE
660 			descriptor.
661 
662 			<legal all>
663 
664 seq_2k_error_detected_flag
665 
666 			Field only valid when Update_Seq_2k_error_detected_flag
667 			is set
668 
669 
670 
671 			Field value to be copied over into the RX_REO_QUEUE
672 			descriptor.
673 
674 			<legal all>
675 
676 pn_error_detected_flag
677 
678 			Field only valid when Update_pn_error_detected_flag is
679 			set
680 
681 
682 
683 			Field value to be copied over into the RX_REO_QUEUE
684 			descriptor.
685 
686 			<legal all>
687 
688 pn_valid
689 
690 			Field only valid when Update_pn_valid is set
691 
692 
693 
694 			Field value to be copied over into the RX_REO_QUEUE
695 			descriptor.
696 
697 			<legal all>
698 
699 flush_from_cache
700 
701 			When set, REO shall, after finishing the execution of
702 			this command, flush the related descriptor from the cache.
703 
704 			<legal all>
705 
706 reserved_4a
707 
708 			<legal 0>
709 
710 pn_31_0
711 
712 			Field only valid when Update_Pn is set
713 
714 
715 
716 			Field value to be copied over into the RX_REO_QUEUE
717 			descriptor.
718 
719 			<legal all>
720 
721 pn_63_32
722 
723 			Field only valid when Update_pn is set
724 
725 
726 
727 			Field value to be copied over into the RX_REO_QUEUE
728 			descriptor.
729 
730 			<legal all>
731 
732 pn_95_64
733 
734 			Field only valid when Update_pn is set
735 
736 
737 
738 			Field value to be copied over into the RX_REO_QUEUE
739 			descriptor.
740 
741 			<legal all>
742 
743 pn_127_96
744 
745 			Field only valid when Update_pn is set
746 
747 
748 
749 			Field value to be copied over into the RX_REO_QUEUE
750 			descriptor.
751 
752 			<legal all>
753 */
754 
755 
756  /* EXTERNAL REFERENCE : struct uniform_reo_cmd_header cmd_header */
757 
758 
759 /* Description		REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER
760 
761 			Consumer: REO/SW/DEBUG
762 
763 			Producer: SW
764 
765 
766 
767 			This number can be used by SW to track, identify and
768 			link the created commands with the command statusses
769 
770 
771 
772 
773 
774 			<legal all>
775 */
776 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_OFFSET   0x00000000
777 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_LSB      0
778 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_MASK     0x0000ffff
779 
780 /* Description		REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED
781 
782 			Consumer: REO
783 
784 			Producer: SW
785 
786 
787 
788 			<enum 0 NoStatus> REO does not need to generate a status
789 			TLV for the execution of this command
790 
791 			<enum 1 StatusRequired> REO shall generate a status TLV
792 			for the execution of this command
793 
794 
795 
796 			<legal all>
797 */
798 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET 0x00000000
799 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_LSB 16
800 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_MASK 0x00010000
801 
802 /* Description		REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A
803 
804 			<legal 0>
805 */
806 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_OFFSET      0x00000000
807 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_LSB         17
808 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_MASK        0xfffe0000
809 
810 /* Description		REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0
811 
812 			Consumer: REO
813 
814 			Producer: SW
815 
816 
817 
818 			Address (lower 32 bits) of the REO queue descriptor
819 
820 			<legal all>
821 */
822 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000004
823 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_LSB    0
824 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_MASK   0xffffffff
825 
826 /* Description		REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32
827 
828 			Consumer: REO
829 
830 			Producer: SW
831 
832 
833 
834 			Address (upper 8 bits) of the REO queue descriptor
835 
836 			<legal all>
837 */
838 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000008
839 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_LSB   0
840 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_MASK  0x000000ff
841 
842 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER
843 
844 			Consumer: REO
845 
846 			Producer: SW
847 
848 			When set, receive_queue_number from this command will be
849 			updated in the descriptor.
850 
851 			<legal all>
852 */
853 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_OFFSET 0x00000008
854 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_LSB    8
855 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_MASK   0x00000100
856 
857 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD
858 
859 			Consumer: REO
860 
861 			Producer: SW
862 
863 
864 
865 			When clear, REO will NOT update the VLD bit setting. For
866 			this setting, SW MUST set the Flush_from_cache bit in this
867 			command.
868 
869 
870 
871 			When set, VLD from this command will be updated in the
872 			descriptor.
873 
874 			<legal all>
875 */
876 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_OFFSET                  0x00000008
877 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_LSB                     9
878 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_MASK                    0x00000200
879 
880 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER
881 
882 			Consumer: REO
883 
884 			Producer: SW
885 
886 			When set, Associated_link_descriptor_counter from this
887 			command will be updated in the descriptor.
888 
889 			<legal all>
890 */
891 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x00000008
892 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 10
893 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x00000400
894 
895 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION
896 
897 			Consumer: REO
898 
899 			Producer: SW
900 
901 			When set, Disable_duplicate_detection from this command
902 			will be updated in the descriptor.
903 
904 			<legal all>
905 */
906 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_OFFSET 0x00000008
907 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_LSB 11
908 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_MASK 0x00000800
909 
910 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE
911 
912 			Consumer: REO
913 
914 			Producer: SW
915 
916 			When set, Soft_reorder_enable from this command will be
917 			updated in the descriptor.
918 
919 			<legal all>
920 */
921 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_OFFSET  0x00000008
922 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_LSB     12
923 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_MASK    0x00001000
924 
925 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC
926 
927 			Consumer: REO
928 
929 			Producer: SW
930 
931 			When set, AC from this command will be updated in the
932 			descriptor.
933 
934 			<legal all>
935 */
936 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_OFFSET                   0x00000008
937 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_LSB                      13
938 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_MASK                     0x00002000
939 
940 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR
941 
942 			Consumer: REO
943 
944 			Producer: SW
945 
946 			When set, BAR from this command will be updated in the
947 			descriptor.
948 
949 			<legal all>
950 */
951 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_OFFSET                  0x00000008
952 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_LSB                     14
953 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_MASK                    0x00004000
954 
955 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY
956 
957 			Consumer: REO
958 
959 			Producer: SW
960 
961 			When set, RTY from this command will be updated in the
962 			descriptor.
963 
964 			<legal all>
965 */
966 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_OFFSET                  0x00000008
967 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_LSB                     15
968 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_MASK                    0x00008000
969 
970 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE
971 
972 			Consumer: REO
973 
974 			Producer: SW
975 
976 			When set, Chk_2k_mode from this command will be updated
977 			in the descriptor.
978 
979 			<legal all>
980 */
981 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_OFFSET          0x00000008
982 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_LSB             16
983 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_MASK            0x00010000
984 
985 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE
986 
987 			Consumer: REO
988 
989 			Producer: SW
990 
991 			When set, OOR_Mode from this command will be updated in
992 			the descriptor.
993 
994 			<legal all>
995 */
996 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_OFFSET             0x00000008
997 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_LSB                17
998 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_MASK               0x00020000
999 
1000 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE
1001 
1002 			Consumer: REO
1003 
1004 			Producer: SW
1005 
1006 			When set, BA_window_size from this command will be
1007 			updated in the descriptor.
1008 
1009 			<legal all>
1010 */
1011 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_OFFSET       0x00000008
1012 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_LSB          18
1013 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_MASK         0x00040000
1014 
1015 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED
1016 
1017 			Consumer: REO
1018 
1019 			Producer: SW
1020 
1021 			When set, Pn_check_needed from this command will be
1022 			updated in the descriptor.
1023 
1024 			<legal all>
1025 */
1026 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_OFFSET      0x00000008
1027 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_LSB         19
1028 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_MASK        0x00080000
1029 
1030 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN
1031 
1032 			Consumer: REO
1033 
1034 			Producer: SW
1035 
1036 			When set, Pn_shall_be_even from this command will be
1037 			updated in the descriptor.
1038 
1039 			<legal all>
1040 */
1041 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_OFFSET     0x00000008
1042 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_LSB        20
1043 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_MASK       0x00100000
1044 
1045 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN
1046 
1047 			Consumer: REO
1048 
1049 			Producer: SW
1050 
1051 			When set, Pn_shall_be_uneven from this command will be
1052 			updated in the descriptor.
1053 
1054 			<legal all>
1055 */
1056 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_OFFSET   0x00000008
1057 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_LSB      21
1058 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_MASK     0x00200000
1059 
1060 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE
1061 
1062 			Consumer: REO
1063 
1064 			Producer: SW
1065 
1066 			When set, Pn_handling_enable from this command will be
1067 			updated in the descriptor.
1068 
1069 			<legal all>
1070 */
1071 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_OFFSET   0x00000008
1072 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_LSB      22
1073 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_MASK     0x00400000
1074 
1075 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE
1076 
1077 			Consumer: REO
1078 
1079 			Producer: SW
1080 
1081 			When set, Pn_size from this command will be updated in
1082 			the descriptor.
1083 
1084 			<legal all>
1085 */
1086 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_OFFSET              0x00000008
1087 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_LSB                 23
1088 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_MASK                0x00800000
1089 
1090 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG
1091 
1092 			Consumer: REO
1093 
1094 			Producer: SW
1095 
1096 			When set, Ignore_ampdu_flag from this command will be
1097 			updated in the descriptor.
1098 
1099 			<legal all>
1100 */
1101 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_OFFSET    0x00000008
1102 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_LSB       24
1103 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_MASK      0x01000000
1104 
1105 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD
1106 
1107 			Consumer: REO
1108 
1109 			Producer: SW
1110 
1111 			When set, Svld from this command will be updated in the
1112 			descriptor.
1113 
1114 			<legal all>
1115 */
1116 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_OFFSET                 0x00000008
1117 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_LSB                    25
1118 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_MASK                   0x02000000
1119 
1120 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN
1121 
1122 			Consumer: REO
1123 
1124 			Producer: SW
1125 
1126 			When set, SSN from this command will be updated in the
1127 			descriptor.
1128 
1129 			<legal all>
1130 */
1131 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_OFFSET                  0x00000008
1132 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_LSB                     26
1133 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_MASK                    0x04000000
1134 
1135 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG
1136 
1137 			Consumer: REO
1138 
1139 			Producer: SW
1140 
1141 			When set, Seq_2k_error_detected_flag from this command
1142 			will be updated in the descriptor.
1143 
1144 			<legal all>
1145 */
1146 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x00000008
1147 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_LSB 27
1148 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x08000000
1149 
1150 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG
1151 
1152 			Consumer: REO
1153 
1154 			Producer: SW
1155 
1156 			When set, pn_error_detected_flag from this command will
1157 			be updated in the descriptor.
1158 
1159 			<legal all>
1160 */
1161 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_OFFSET 0x00000008
1162 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_LSB  28
1163 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_MASK 0x10000000
1164 
1165 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID
1166 
1167 			Consumer: REO
1168 
1169 			Producer: SW
1170 
1171 			When set, pn_valid from this command will be updated in
1172 			the descriptor.
1173 
1174 			<legal all>
1175 */
1176 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_OFFSET             0x00000008
1177 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_LSB                29
1178 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_MASK               0x20000000
1179 
1180 /* Description		REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN
1181 
1182 			Consumer: REO
1183 
1184 			Producer: SW
1185 
1186 			When set, all pn_... fields from this command will be
1187 			updated in the descriptor.
1188 
1189 			<legal all>
1190 */
1191 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_OFFSET                   0x00000008
1192 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_LSB                      30
1193 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_MASK                     0x40000000
1194 
1195 /* Description		REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS
1196 
1197 			Consumer: REO
1198 
1199 			Producer: SW
1200 
1201 			When set, REO will clear (=> set to 0) the following
1202 			stat counters in the REO_QUEUE_STRUCT
1203 
1204 
1205 
1206 			Last_rx_enqueue_TimeStamp
1207 
1208 			Last_rx_dequeue_Timestamp
1209 
1210 			Rx_bitmap (not a counter, but bitmap is cleared)
1211 
1212 			Timeout_count
1213 
1214 			Forward_due_to_bar_count
1215 
1216 			Duplicate_count
1217 
1218 			Frames_in_order_count
1219 
1220 			BAR_received_count
1221 
1222 			MPDU_Frames_processed_count
1223 
1224 			MSDU_Frames_processed_count
1225 
1226 			Total_processed_byte_count
1227 
1228 			Late_receive_MPDU_count
1229 
1230 			window_jump_2k
1231 
1232 			Hole_count
1233 
1234 
1235 
1236 			<legal all>
1237 */
1238 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_OFFSET         0x00000008
1239 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_LSB            31
1240 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_MASK           0x80000000
1241 
1242 /* Description		REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER
1243 
1244 
1245 
1246 
1247 			Field value to be copied over into the RX_REO_QUEUE
1248 			descriptor.
1249 
1250 			<legal all>
1251 */
1252 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_OFFSET        0x0000000c
1253 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_LSB           0
1254 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_MASK          0x0000ffff
1255 
1256 /* Description		REO_UPDATE_RX_REO_QUEUE_3_VLD
1257 
1258 			Field only valid when Update_VLD is set
1259 
1260 
1261 
1262 			For Update_VLD set and VLD clear, SW MUST set the
1263 			Flush_from_cache bit in this command.
1264 
1265 
1266 
1267 			Field value to be copied over into the RX_REO_QUEUE
1268 			descriptor.
1269 
1270 			<legal all>
1271 */
1272 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_OFFSET                         0x0000000c
1273 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_LSB                            16
1274 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_MASK                           0x00010000
1275 
1276 /* Description		REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER
1277 
1278 			Field only valid when
1279 			Update_Associated_link_descriptor_counter is set
1280 
1281 
1282 
1283 			Field value to be copied over into the RX_REO_QUEUE
1284 			descriptor.
1285 
1286 			<legal all>
1287 */
1288 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x0000000c
1289 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 17
1290 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x00060000
1291 
1292 /* Description		REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION
1293 
1294 			Field only valid when Update_Disable_duplicate_detection
1295 			is set
1296 
1297 
1298 
1299 			Field value to be copied over into the RX_REO_QUEUE
1300 			descriptor.
1301 
1302 			<legal all>
1303 */
1304 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_OFFSET 0x0000000c
1305 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_LSB    19
1306 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_MASK   0x00080000
1307 
1308 /* Description		REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE
1309 
1310 			Field only valid when Update_Soft_reorder_enable is set
1311 
1312 
1313 
1314 			Field value to be copied over into the RX_REO_QUEUE
1315 			descriptor.
1316 
1317 			<legal all>
1318 */
1319 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_OFFSET         0x0000000c
1320 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_LSB            20
1321 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_MASK           0x00100000
1322 
1323 /* Description		REO_UPDATE_RX_REO_QUEUE_3_AC
1324 
1325 			Field only valid when Update_AC is set
1326 
1327 
1328 
1329 			Field value to be copied over into the RX_REO_QUEUE
1330 			descriptor.
1331 
1332 			<legal all>
1333 */
1334 #define REO_UPDATE_RX_REO_QUEUE_3_AC_OFFSET                          0x0000000c
1335 #define REO_UPDATE_RX_REO_QUEUE_3_AC_LSB                             21
1336 #define REO_UPDATE_RX_REO_QUEUE_3_AC_MASK                            0x00600000
1337 
1338 /* Description		REO_UPDATE_RX_REO_QUEUE_3_BAR
1339 
1340 			Field only valid when Update_BAR is set
1341 
1342 
1343 
1344 			Field value to be copied over into the RX_REO_QUEUE
1345 			descriptor.
1346 
1347 			<legal all>
1348 */
1349 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_OFFSET                         0x0000000c
1350 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_LSB                            23
1351 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_MASK                           0x00800000
1352 
1353 /* Description		REO_UPDATE_RX_REO_QUEUE_3_RTY
1354 
1355 			Field only valid when Update_RTY is set
1356 
1357 
1358 
1359 			Field value to be copied over into the RX_REO_QUEUE
1360 			descriptor.
1361 
1362 			<legal all>
1363 */
1364 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_OFFSET                         0x0000000c
1365 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_LSB                            24
1366 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_MASK                           0x01000000
1367 
1368 /* Description		REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE
1369 
1370 			Field only valid when Update_Chk_2k_Mode is set
1371 
1372 
1373 
1374 			Field value to be copied over into the RX_REO_QUEUE
1375 			descriptor.
1376 
1377 			<legal all>
1378 */
1379 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_OFFSET                 0x0000000c
1380 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_LSB                    25
1381 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_MASK                   0x02000000
1382 
1383 /* Description		REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE
1384 
1385 			Field only valid when Update_OOR_Mode is set
1386 
1387 
1388 
1389 			Field value to be copied over into the RX_REO_QUEUE
1390 			descriptor.
1391 
1392 			<legal all>
1393 */
1394 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_OFFSET                    0x0000000c
1395 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_LSB                       26
1396 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_MASK                      0x04000000
1397 
1398 /* Description		REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED
1399 
1400 			Field only valid when Update_Pn_check_needed is set
1401 
1402 
1403 
1404 			Field value to be copied over into the RX_REO_QUEUE
1405 			descriptor.
1406 
1407 			<legal all>
1408 */
1409 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_OFFSET             0x0000000c
1410 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_LSB                27
1411 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_MASK               0x08000000
1412 
1413 /* Description		REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN
1414 
1415 			Field only valid when Update_Pn_shall_be_even is set
1416 
1417 
1418 
1419 			Field value to be copied over into the RX_REO_QUEUE
1420 			descriptor.
1421 
1422 			<legal all>
1423 */
1424 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_OFFSET            0x0000000c
1425 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_LSB               28
1426 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_MASK              0x10000000
1427 
1428 /* Description		REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN
1429 
1430 			Field only valid when Update_Pn_shall_be_uneven is set
1431 
1432 
1433 
1434 			Field value to be copied over into the RX_REO_QUEUE
1435 			descriptor.
1436 
1437 			<legal all>
1438 */
1439 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_OFFSET          0x0000000c
1440 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_LSB             29
1441 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_MASK            0x20000000
1442 
1443 /* Description		REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE
1444 
1445 			Field only valid when Update_Pn_handling_enable is set
1446 
1447 
1448 
1449 			Field value to be copied over into the RX_REO_QUEUE
1450 			descriptor.
1451 
1452 			<legal all>
1453 */
1454 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_OFFSET          0x0000000c
1455 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_LSB             30
1456 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_MASK            0x40000000
1457 
1458 /* Description		REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG
1459 
1460 			Field only valid when Update_Ignore_ampdu_flag is set
1461 
1462 
1463 
1464 			Field value to be copied over into the RX_REO_QUEUE
1465 			descriptor.
1466 
1467 			<legal all>
1468 */
1469 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_OFFSET           0x0000000c
1470 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_LSB              31
1471 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_MASK             0x80000000
1472 
1473 /* Description		REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE
1474 
1475 			Field only valid when Update_BA_window_size is set
1476 
1477 
1478 
1479 			Field value to be copied over into the RX_REO_QUEUE
1480 			descriptor.
1481 
1482 			<legal all>
1483 */
1484 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_OFFSET              0x00000010
1485 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_LSB                 0
1486 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_MASK                0x000000ff
1487 
1488 /* Description		REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE
1489 
1490 			Field only valid when Update_Pn_size is set
1491 
1492 
1493 
1494 			Field value to be copied over into the RX_REO_QUEUE
1495 			descriptor.
1496 
1497 
1498 
1499 			<enum 0     pn_size_24>
1500 
1501 			<enum 1     pn_size_48>
1502 
1503 			<enum 2     pn_size_128>
1504 
1505 
1506 
1507 			<legal 0-2>
1508 */
1509 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_OFFSET                     0x00000010
1510 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_LSB                        8
1511 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_MASK                       0x00000300
1512 
1513 /* Description		REO_UPDATE_RX_REO_QUEUE_4_SVLD
1514 
1515 			Field only valid when Update_Svld is set
1516 
1517 
1518 
1519 			Field value to be copied over into the RX_REO_QUEUE
1520 			descriptor.
1521 
1522 			<legal all>
1523 */
1524 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_OFFSET                        0x00000010
1525 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_LSB                           10
1526 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_MASK                          0x00000400
1527 
1528 /* Description		REO_UPDATE_RX_REO_QUEUE_4_SSN
1529 
1530 			Field only valid when Update_SSN is set
1531 
1532 
1533 
1534 			Field value to be copied over into the RX_REO_QUEUE
1535 			descriptor.
1536 
1537 			<legal all>
1538 */
1539 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_OFFSET                         0x00000010
1540 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_LSB                            11
1541 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_MASK                           0x007ff800
1542 
1543 /* Description		REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG
1544 
1545 			Field only valid when Update_Seq_2k_error_detected_flag
1546 			is set
1547 
1548 
1549 
1550 			Field value to be copied over into the RX_REO_QUEUE
1551 			descriptor.
1552 
1553 			<legal all>
1554 */
1555 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET  0x00000010
1556 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_LSB     23
1557 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_MASK    0x00800000
1558 
1559 /* Description		REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG
1560 
1561 			Field only valid when Update_pn_error_detected_flag is
1562 			set
1563 
1564 
1565 
1566 			Field value to be copied over into the RX_REO_QUEUE
1567 			descriptor.
1568 
1569 			<legal all>
1570 */
1571 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_OFFSET      0x00000010
1572 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_LSB         24
1573 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_MASK        0x01000000
1574 
1575 /* Description		REO_UPDATE_RX_REO_QUEUE_4_PN_VALID
1576 
1577 			Field only valid when Update_pn_valid is set
1578 
1579 
1580 
1581 			Field value to be copied over into the RX_REO_QUEUE
1582 			descriptor.
1583 
1584 			<legal all>
1585 */
1586 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_OFFSET                    0x00000010
1587 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_LSB                       25
1588 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_MASK                      0x02000000
1589 
1590 /* Description		REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE
1591 
1592 			When set, REO shall, after finishing the execution of
1593 			this command, flush the related descriptor from the cache.
1594 
1595 			<legal all>
1596 */
1597 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_OFFSET            0x00000010
1598 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_LSB               26
1599 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_MASK              0x04000000
1600 
1601 /* Description		REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A
1602 
1603 			<legal 0>
1604 */
1605 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_OFFSET                 0x00000010
1606 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_LSB                    27
1607 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_MASK                   0xf8000000
1608 
1609 /* Description		REO_UPDATE_RX_REO_QUEUE_5_PN_31_0
1610 
1611 			Field only valid when Update_Pn is set
1612 
1613 
1614 
1615 			Field value to be copied over into the RX_REO_QUEUE
1616 			descriptor.
1617 
1618 			<legal all>
1619 */
1620 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_OFFSET                     0x00000014
1621 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_LSB                        0
1622 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_MASK                       0xffffffff
1623 
1624 /* Description		REO_UPDATE_RX_REO_QUEUE_6_PN_63_32
1625 
1626 			Field only valid when Update_pn is set
1627 
1628 
1629 
1630 			Field value to be copied over into the RX_REO_QUEUE
1631 			descriptor.
1632 
1633 			<legal all>
1634 */
1635 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_OFFSET                    0x00000018
1636 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_LSB                       0
1637 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_MASK                      0xffffffff
1638 
1639 /* Description		REO_UPDATE_RX_REO_QUEUE_7_PN_95_64
1640 
1641 			Field only valid when Update_pn is set
1642 
1643 
1644 
1645 			Field value to be copied over into the RX_REO_QUEUE
1646 			descriptor.
1647 
1648 			<legal all>
1649 */
1650 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_OFFSET                    0x0000001c
1651 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_LSB                       0
1652 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_MASK                      0xffffffff
1653 
1654 /* Description		REO_UPDATE_RX_REO_QUEUE_8_PN_127_96
1655 
1656 			Field only valid when Update_pn is set
1657 
1658 
1659 
1660 			Field value to be copied over into the RX_REO_QUEUE
1661 			descriptor.
1662 
1663 			<legal all>
1664 */
1665 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_OFFSET                   0x00000020
1666 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_LSB                      0
1667 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_MASK                     0xffffffff
1668 
1669 
1670 #endif // _REO_UPDATE_RX_REO_QUEUE_H_
1671