xref: /wlan-driver/fw-api/hw/qcn6122/rx_ppdu_end_user_stats.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _RX_PPDU_END_USER_STATS_H_
18 #define _RX_PPDU_END_USER_STATS_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #include "rx_rxpcu_classification_overview.h"
23 
24 // ################ START SUMMARY #################
25 //
26 //	Dword	Fields
27 //	0	struct rx_rxpcu_classification_overview rxpcu_classification_details;
28 //	1	sta_full_aid[12:0], mcs[16:13], nss[19:17], ofdma_info_valid[20], dl_ofdma_ru_start_index[27:21], reserved_1a[31:28]
29 //	2	dl_ofdma_ru_width[6:0], reserved_2a[7], user_receive_quality[15:8], mpdu_cnt_fcs_err[25:16], wbm2rxdma_buf_source_used[26], fw2rxdma_buf_source_used[27], sw2rxdma_buf_source_used[28], reserved_2b[31:29]
30 //	3	mpdu_cnt_fcs_ok[8:0], frame_control_info_valid[9], qos_control_info_valid[10], ht_control_info_valid[11], data_sequence_control_info_valid[12], ht_control_info_null_valid[13], reserved_3a[15:14], rxdma2reo_ring_used[16], rxdma2fw_ring_used[17], rxdma2sw_ring_used[18], rxdma_release_ring_used[19], ht_control_field_pkt_type[23:20], reserved_3b[31:24]
31 //	4	ast_index[15:0], frame_control_field[31:16]
32 //	5	first_data_seq_ctrl[15:0], qos_control_field[31:16]
33 //	6	ht_control_field[31:0]
34 //	7	fcs_ok_bitmap_31_0[31:0]
35 //	8	fcs_ok_bitmap_63_32[31:0]
36 //	9	udp_msdu_count[15:0], tcp_msdu_count[31:16]
37 //	10	other_msdu_count[15:0], tcp_ack_msdu_count[31:16]
38 //	11	sw_response_reference_ptr[31:0]
39 //	12	received_qos_data_tid_bitmap[15:0], received_qos_data_tid_eosp_bitmap[31:16]
40 //	13	qosctrl_15_8_tid0[7:0], qosctrl_15_8_tid1[15:8], qosctrl_15_8_tid2[23:16], qosctrl_15_8_tid3[31:24]
41 //	14	qosctrl_15_8_tid4[7:0], qosctrl_15_8_tid5[15:8], qosctrl_15_8_tid6[23:16], qosctrl_15_8_tid7[31:24]
42 //	15	qosctrl_15_8_tid8[7:0], qosctrl_15_8_tid9[15:8], qosctrl_15_8_tid10[23:16], qosctrl_15_8_tid11[31:24]
43 //	16	qosctrl_15_8_tid12[7:0], qosctrl_15_8_tid13[15:8], qosctrl_15_8_tid14[23:16], qosctrl_15_8_tid15[31:24]
44 //	17	mpdu_ok_byte_count[24:0], ampdu_delim_ok_count_6_0[31:25]
45 //	18	ampdu_delim_err_count[24:0], ampdu_delim_ok_count_13_7[31:25]
46 //	19	mpdu_err_byte_count[24:0], ampdu_delim_ok_count_20_14[31:25]
47 //	20	non_consecutive_delimiter_err[15:0], reserved_20a[31:16]
48 //	21	ht_control_null_field[31:0]
49 //	22	sw_response_reference_ptr_ext[31:0]
50 //
51 // ################ END SUMMARY #################
52 
53 #define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS 23
54 
55 struct rx_ppdu_end_user_stats {
56     struct            rx_rxpcu_classification_overview                       rxpcu_classification_details;
57              uint32_t sta_full_aid                    : 13, //[12:0]
58                       mcs                             :  4, //[16:13]
59                       nss                             :  3, //[19:17]
60                       ofdma_info_valid                :  1, //[20]
61                       dl_ofdma_ru_start_index         :  7, //[27:21]
62                       reserved_1a                     :  4; //[31:28]
63              uint32_t dl_ofdma_ru_width               :  7, //[6:0]
64                       reserved_2a                     :  1, //[7]
65                       user_receive_quality            :  8, //[15:8]
66                       mpdu_cnt_fcs_err                : 10, //[25:16]
67                       wbm2rxdma_buf_source_used       :  1, //[26]
68                       fw2rxdma_buf_source_used        :  1, //[27]
69                       sw2rxdma_buf_source_used        :  1, //[28]
70                       reserved_2b                     :  3; //[31:29]
71              uint32_t mpdu_cnt_fcs_ok                 :  9, //[8:0]
72                       frame_control_info_valid        :  1, //[9]
73                       qos_control_info_valid          :  1, //[10]
74                       ht_control_info_valid           :  1, //[11]
75                       data_sequence_control_info_valid:  1, //[12]
76                       ht_control_info_null_valid      :  1, //[13]
77                       reserved_3a                     :  2, //[15:14]
78                       rxdma2reo_ring_used             :  1, //[16]
79                       rxdma2fw_ring_used              :  1, //[17]
80                       rxdma2sw_ring_used              :  1, //[18]
81                       rxdma_release_ring_used         :  1, //[19]
82                       ht_control_field_pkt_type       :  4, //[23:20]
83                       reserved_3b                     :  8; //[31:24]
84              uint32_t ast_index                       : 16, //[15:0]
85                       frame_control_field             : 16; //[31:16]
86              uint32_t first_data_seq_ctrl             : 16, //[15:0]
87                       qos_control_field               : 16; //[31:16]
88              uint32_t ht_control_field                : 32; //[31:0]
89              uint32_t fcs_ok_bitmap_31_0              : 32; //[31:0]
90              uint32_t fcs_ok_bitmap_63_32             : 32; //[31:0]
91              uint32_t udp_msdu_count                  : 16, //[15:0]
92                       tcp_msdu_count                  : 16; //[31:16]
93              uint32_t other_msdu_count                : 16, //[15:0]
94                       tcp_ack_msdu_count              : 16; //[31:16]
95              uint32_t sw_response_reference_ptr       : 32; //[31:0]
96              uint32_t received_qos_data_tid_bitmap    : 16, //[15:0]
97                       received_qos_data_tid_eosp_bitmap: 16; //[31:16]
98              uint32_t qosctrl_15_8_tid0               :  8, //[7:0]
99                       qosctrl_15_8_tid1               :  8, //[15:8]
100                       qosctrl_15_8_tid2               :  8, //[23:16]
101                       qosctrl_15_8_tid3               :  8; //[31:24]
102              uint32_t qosctrl_15_8_tid4               :  8, //[7:0]
103                       qosctrl_15_8_tid5               :  8, //[15:8]
104                       qosctrl_15_8_tid6               :  8, //[23:16]
105                       qosctrl_15_8_tid7               :  8; //[31:24]
106              uint32_t qosctrl_15_8_tid8               :  8, //[7:0]
107                       qosctrl_15_8_tid9               :  8, //[15:8]
108                       qosctrl_15_8_tid10              :  8, //[23:16]
109                       qosctrl_15_8_tid11              :  8; //[31:24]
110              uint32_t qosctrl_15_8_tid12              :  8, //[7:0]
111                       qosctrl_15_8_tid13              :  8, //[15:8]
112                       qosctrl_15_8_tid14              :  8, //[23:16]
113                       qosctrl_15_8_tid15              :  8; //[31:24]
114              uint32_t mpdu_ok_byte_count              : 25, //[24:0]
115                       ampdu_delim_ok_count_6_0        :  7; //[31:25]
116              uint32_t ampdu_delim_err_count           : 25, //[24:0]
117                       ampdu_delim_ok_count_13_7       :  7; //[31:25]
118              uint32_t mpdu_err_byte_count             : 25, //[24:0]
119                       ampdu_delim_ok_count_20_14      :  7; //[31:25]
120              uint32_t non_consecutive_delimiter_err   : 16, //[15:0]
121                       reserved_20a                    : 16; //[31:16]
122              uint32_t ht_control_null_field           : 32; //[31:0]
123              uint32_t sw_response_reference_ptr_ext   : 32; //[31:0]
124 };
125 
126 /*
127 
128 struct rx_rxpcu_classification_overview rxpcu_classification_details
129 
130 			Details related to what RXPCU classification types of
131 			MPDUs have been received
132 
133 sta_full_aid
134 
135 			Consumer: FW
136 
137 			Producer: RXPCU
138 
139 
140 
141 			The full AID of this station.
142 
143 
144 
145 			<legal all>
146 
147 mcs
148 
149 			MCS of the received frame
150 
151 
152 
153 			For details, refer to  MCS_TYPE description
154 
155 			Note: This is rate in case of 11a/11b
156 
157 
158 
159 			<legal all>
160 
161 nss
162 
163 			Number of spatial streams.
164 
165 
166 
167 			NOTE: RXPCU derives this from the 'Mimo_ss_bitmap'
168 
169 
170 
171 			<enum 0 1_spatial_stream>Single spatial stream
172 
173 			<enum 1 2_spatial_streams>2 spatial streams
174 
175 			<enum 2 3_spatial_streams>3 spatial streams
176 
177 			<enum 3 4_spatial_streams>4 spatial streams
178 
179 			<enum 4 5_spatial_streams>5 spatial streams
180 
181 			<enum 5 6_spatial_streams>6 spatial streams
182 
183 			<enum 6 7_spatial_streams>7 spatial streams
184 
185 			<enum 7 8_spatial_streams>8 spatial streams
186 
187 ofdma_info_valid
188 
189 			When set, ofdma RU related info in the following fields
190 			is valid
191 
192 			<legal all>
193 
194 dl_ofdma_ru_start_index
195 
196 			Field only valid when Ofdma_info_valid is set
197 
198 
199 
200 			RU index number to which User is assigned
201 
202 			RU numbering is over the entire BW, starting from 0
203 
204 			<legal 0-73>
205 
206 reserved_1a
207 
208 			<legal 0>
209 
210 dl_ofdma_ru_width
211 
212 			The size of the RU for this user.
213 
214 			In units of 1 (26 tone) RU
215 
216 			<legal 1-74>
217 
218 reserved_2a
219 
220 			<legal 0>
221 
222 user_receive_quality
223 
224 			DO NOT USE
225 
226 
227 
228 			Field not populated by MAC HW
229 
230 			<legal all>
231 
232 mpdu_cnt_fcs_err
233 
234 			The number of MPDUs received from this STA in this PPDU
235 			with FCS errors
236 
237 			<legal all>
238 
239 wbm2rxdma_buf_source_used
240 
241 			Field filled in by RXDMA
242 
243 
244 
245 			When set, RXDMA has used the wbm2rxdma_buf ring as
246 			source for at least one of the frames in this PPDU.
247 
248 fw2rxdma_buf_source_used
249 
250 			Field filled in by RXDMA
251 
252 
253 
254 			When set, RXDMA has used the fw2rxdma_buf ring as source
255 			for at least one of the frames in this PPDU.
256 
257 sw2rxdma_buf_source_used
258 
259 			Field filled in by RXDMA
260 
261 
262 
263 			When set, RXDMA has used the sw2rxdma_buf ring as source
264 			for at least one of the frames in this PPDU.
265 
266 reserved_2b
267 
268 			<legal 0>
269 
270 mpdu_cnt_fcs_ok
271 
272 			The number of MPDUs received from this STA in this PPDU
273 			with correct FCS
274 
275 			<legal all>
276 
277 frame_control_info_valid
278 
279 			When set, the frame_control_info field contains valid
280 			information
281 
282 			<legal all>
283 
284 qos_control_info_valid
285 
286 			When set, the QoS_control_info field contains valid
287 			information
288 
289 			<legal all>
290 
291 ht_control_info_valid
292 
293 			When set, the HT_control_field contains valid
294 			information
295 
296 			<legal all>
297 
298 data_sequence_control_info_valid
299 
300 			When set, the First_data_seq_ctrl field contains valid
301 			information
302 
303 			<legal all>
304 
305 ht_control_info_null_valid
306 
307 			When set, the HT_control_NULL_field contains valid
308 			information
309 
310 			<legal all>
311 
312 reserved_3a
313 
314 			<legal 0>
315 
316 rxdma2reo_ring_used
317 
318 			Field filled in by RXDMA
319 
320 
321 
322 			Set when at least one frame during this PPDU got pushed
323 			to this ring by RXDMA
324 
325 rxdma2fw_ring_used
326 
327 			Field filled in by RXDMA
328 
329 
330 
331 			Set when at least one frame during this PPDU got pushed
332 			to this ring by RXDMA
333 
334 rxdma2sw_ring_used
335 
336 			Field filled in by RXDMA
337 
338 
339 
340 			Set when at least one frame during this PPDU got pushed
341 			to this ring by RXDMA
342 
343 rxdma_release_ring_used
344 
345 			Field filled in by RXDMA
346 
347 
348 
349 			Set when at least one frame during this PPDU got pushed
350 			to this ring by RXDMA
351 
352 ht_control_field_pkt_type
353 
354 			Field only valid when HT_control_info_valid or
355 			HT_control_info_NULL_valid    is set.
356 
357 
358 
359 			Indicates what the PHY receive type was for receiving
360 			this frame. Can help determine if the HT_CONTROL field shall
361 			be interpreted as HT/VHT or HE.
362 
363 
364 
365 			NOTE: later on in the 11ax IEEE spec a bit within the HT
366 			control field was introduced that explicitly indicated how
367 			to interpret the HT control field.... As HT, VHT, or HE.
368 
369 
370 
371 			<enum 0 dot11a>802.11a PPDU type
372 
373 			<enum 1 dot11b>802.11b PPDU type
374 
375 			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
376 
377 			<enum 3 dot11ac>802.11ac PPDU type
378 
379 			<enum 4 dot11ax>802.11ax PPDU type
380 
381 			<enum 5 dot11ba>802.11ba (WUR) PPDU type
382 
383 reserved_3b
384 
385 			<legal 0>
386 
387 ast_index
388 
389 			This field indicates the index of the AST entry
390 			corresponding to this MPDU. It is provided by the GSE module
391 			instantiated in RXPCU.
392 
393 			A value of 0xFFFF indicates an invalid AST index,
394 			meaning that No AST entry was found or NO AST search was
395 			performed
396 
397 			<legal all>
398 
399 frame_control_field
400 
401 			Field only valid when Frame_control_info_valid is set.
402 
403 
404 
405 			Last successfully received Frame_control field of data
406 			frame (excluding Data NULL/ QoS Null) for this user
407 
408 			Mainly used to track the PM state of the transmitted
409 			device
410 
411 
412 
413 			NOTE: only data frame info is needed, as control and
414 			management frames are already routed to the FW.
415 
416 			<legal all>
417 
418 first_data_seq_ctrl
419 
420 			Field only valid when Data_sequence_control_info_valid
421 			is set.
422 
423 
424 
425 			Sequence control field of the first data frame
426 			(excluding Data NULL or QoS Data null) received for this
427 			user with correct FCS
428 
429 
430 
431 			NOTE: only data frame info is needed, as control and
432 			management frames are already routed to the FW.
433 
434 			<legal all>
435 
436 qos_control_field
437 
438 			Field only valid when QoS_control_info_valid is set.
439 
440 
441 
442 			Last successfully received QoS_control field of data
443 			frame (excluding Data NULL/ QoS Null) for this user
444 
445 
446 
447 			Note that in case of multi TID, this field can only
448 			reflect the last properly received MPDU, and thus can not
449 			indicate all potentially different TIDs that had been
450 			received earlier.
451 
452 
453 
454 			There are however per TID fields, that will contain
455 			among other things all buffer status info: See
456 
457 			QoSCtrl_15_8_tid???
458 
459 			<legal all>
460 
461 ht_control_field
462 
463 			Field only valid when HT_control_info_valid is set.
464 
465 
466 
467 			Last successfully received
468 			HT_CONTROL/VHT_CONTROL/HE_CONTROL  field of data frames,
469 			excluding QoS Null frames for this user.
470 
471 
472 
473 			NOTE: HT control fields  from QoS Null frames are
474 			captured in field HT_control_NULL_field
475 
476 			<legal all>
477 
478 fcs_ok_bitmap_31_0
479 
480 			Bitmap indicates in order of received MPDUs, which MPDUs
481 			had an passing FCS or had an error.
482 
483 			1: FCS OK
484 
485 			0: FCS error
486 
487 			<legal all>
488 
489 fcs_ok_bitmap_63_32
490 
491 			Bitmap indicates in order of received MPDUs, which MPDUs
492 			had an passing FCS or had an error.
493 
494 			1: FCS OK
495 
496 			0: FCS error
497 
498 
499 
500 			NOTE: for users 0, 1, 2 and 3, additional bitmap info
501 			(up to 256 bitmap window) is provided in
502 			RX_PPDU_END_USER_STATS_EXT TLV
503 
504 			<legal all>
505 
506 udp_msdu_count
507 
508 			Field filled in by RX OLE
509 
510 			Set to 0 by RXPCU
511 
512 
513 
514 			The number of MSDUs that are part of MPDUs without FCS
515 			error, that contain UDP frames.
516 
517 			<legal all>
518 
519 tcp_msdu_count
520 
521 			Field filled in by RX OLE
522 
523 			Set to 0 by RXPCU
524 
525 
526 
527 			The number of MSDUs that are part of MPDUs without FCS
528 			error, that contain TCP frames.
529 
530 
531 
532 			(Note: This does NOT include TCP-ACK)
533 
534 			<legal all>
535 
536 other_msdu_count
537 
538 			Field filled in by RX OLE
539 
540 			Set to 0 by RXPCU
541 
542 
543 
544 			The number of MSDUs that are part of MPDUs without FCS
545 			error, that contain neither UDP or TCP frames.
546 
547 
548 
549 			Includes Management and control frames.
550 
551 
552 
553 			<legal all>
554 
555 tcp_ack_msdu_count
556 
557 			Field filled in by RX OLE
558 
559 			Set to 0 by RXPCU
560 
561 
562 
563 			The number of MSDUs that are part of MPDUs without FCS
564 			error, that contain TCP ack frames.
565 
566 			<legal all>
567 
568 sw_response_reference_ptr
569 
570 			Pointer that SW uses to refer back to an expected
571 			response reception. Used for Rate adaptation purposes.
572 
573 			When a reception occurs that is not tied to an expected
574 			response, this field is set to 0x0.
575 
576 
577 
578 			Note: further on in this TLV there is also the field:
579 			Sw_response_reference_ptr_ext.
580 
581 			<legal all>
582 
583 received_qos_data_tid_bitmap
584 
585 			Whenever a frame is received that contains a QoS control
586 			field (that includes QoS Data and/or QoS Null), the bit in
587 			this field that corresponds to the received TID shall be
588 			set.
589 
590 			...Bitmap[0] = TID0
591 
592 			...Bitmap[1] = TID1
593 
594 			Etc.
595 
596 			<legal all>
597 
598 received_qos_data_tid_eosp_bitmap
599 
600 			Field initialized to 0
601 
602 			For every QoS Data frame that is correctly received, the
603 			EOSP bit of that frame is copied over into the corresponding
604 			TID related field.
605 
606 			Note that this implies that the bits here represent the
607 			EOSP bit status for each TID of the last MPDU received for
608 			that TID.
609 
610 
611 
612 			received TID shall be set.
613 
614 			...eosp_bitmap[0] = eosp of TID0
615 
616 			...eosp_bitmap[1] = eosp of TID1
617 
618 			Etc.
619 
620 			<legal all>
621 
622 qosctrl_15_8_tid0
623 
624 			Field only valid when Received_qos_data_tid_bitmap[0] is
625 			set
626 
627 
628 
629 			QoS control field bits 15-8 of the last properly
630 			received MPDU with a QoS control field embedded, with  TID
631 			== 0
632 
633 qosctrl_15_8_tid1
634 
635 			Field only valid when Received_qos_data_tid_bitmap[1] is
636 			set
637 
638 
639 
640 			QoS control field bits 15-8 of the last properly
641 			received MPDU with a QoS control field embedded, with  TID
642 			== 1
643 
644 qosctrl_15_8_tid2
645 
646 			Field only valid when Received_qos_data_tid_bitmap[2] is
647 			set
648 
649 
650 
651 			QoS control field bits 15-8 of the last properly
652 			received MPDU with a QoS control field embedded, with  TID
653 			== 2
654 
655 qosctrl_15_8_tid3
656 
657 			Field only valid when Received_qos_data_tid_bitmap[3] is
658 			set
659 
660 
661 
662 			QoS control field bits 15-8 of the last properly
663 			received MPDU with a QoS control field embedded, with  TID
664 			== 3
665 
666 qosctrl_15_8_tid4
667 
668 			Field only valid when Received_qos_data_tid_bitmap[4] is
669 			set
670 
671 
672 
673 			QoS control field bits 15-8 of the last properly
674 			received MPDU with a QoS control field embedded, with  TID
675 			== 4
676 
677 qosctrl_15_8_tid5
678 
679 			Field only valid when Received_qos_data_tid_bitmap[5] is
680 			set
681 
682 
683 
684 			QoS control field bits 15-8 of the last properly
685 			received MPDU with a QoS control field embedded, with  TID
686 			== 5
687 
688 qosctrl_15_8_tid6
689 
690 			Field only valid when Received_qos_data_tid_bitmap[6] is
691 			set
692 
693 
694 
695 			QoS control field bits 15-8 of the last properly
696 			received MPDU with a QoS control field embedded, with  TID
697 			== 6
698 
699 qosctrl_15_8_tid7
700 
701 			Field only valid when Received_qos_data_tid_bitmap[7] is
702 			set
703 
704 
705 
706 			QoS control field bits 15-8 of the last properly
707 			received MPDU with a QoS control field embedded, with  TID
708 			== 7
709 
710 qosctrl_15_8_tid8
711 
712 			Field only valid when Received_qos_data_tid_bitmap[8] is
713 			set
714 
715 
716 
717 			QoS control field bits 15-8 of the last properly
718 			received MPDU with a QoS control field embedded, with  TID
719 			== 8
720 
721 qosctrl_15_8_tid9
722 
723 			Field only valid when Received_qos_data_tid_bitmap[9] is
724 			set
725 
726 
727 
728 			QoS control field bits 15-8 of the last properly
729 			received MPDU with a QoS control field embedded, with  TID
730 			== 9
731 
732 qosctrl_15_8_tid10
733 
734 			Field only valid when Received_qos_data_tid_bitmap[10]
735 			is set
736 
737 
738 
739 			QoS control field bits 15-8 of the last properly
740 			received MPDU with a QoS control field embedded, with  TID
741 			== 10
742 
743 qosctrl_15_8_tid11
744 
745 			Field only valid when Received_qos_data_tid_bitmap[11]
746 			is set
747 
748 
749 
750 			QoS control field bits 15-8 of the last properly
751 			received MPDU with a QoS control field embedded, with  TID
752 			== 11
753 
754 qosctrl_15_8_tid12
755 
756 			Field only valid when Received_qos_data_tid_bitmap[12]
757 			is set
758 
759 
760 
761 			QoS control field bits 15-8 of the last properly
762 			received MPDU with a QoS control field embedded, with  TID
763 			== 12
764 
765 qosctrl_15_8_tid13
766 
767 			Field only valid when Received_qos_data_tid_bitmap[13]
768 			is set
769 
770 
771 
772 			QoS control field bits 15-8 of the last properly
773 			received MPDU with a QoS control field embedded, with  TID
774 			== 13
775 
776 qosctrl_15_8_tid14
777 
778 			Field only valid when Received_qos_data_tid_bitmap[14]
779 			is set
780 
781 
782 
783 			QoS control field bits 15-8 of the last properly
784 			received MPDU with a QoS control field embedded, with  TID
785 			== 14
786 
787 qosctrl_15_8_tid15
788 
789 			Field only valid when Received_qos_data_tid_bitmap[15]
790 			is set
791 
792 
793 
794 			QoS control field bits 15-8 of the last properly
795 			received MPDU with a QoS control field embedded, with  TID
796 			== 15
797 
798 mpdu_ok_byte_count
799 
800 			The number of bytes received within an MPDU for this
801 			user with correct FCS. This includes the FCS field
802 
803 
804 
805 			NOTE:
806 
807 			The sum of the four fields.....
808 
809 			Mpdu_ok_byte_count +
810 
811 			mpdu_err_byte_count +
812 
813 
814 			.....is the total number of bytes that were received for
815 			this user from the PHY.
816 
817 
818 
819 			<legal all>
820 
821 ampdu_delim_ok_count_6_0
822 
823 			Number of AMPDU delimiter received with correct
824 			structure
825 
826 			LSB 7 bits from this counter
827 
828 
829 
830 			Note that this is a delimiter count and not byte count.
831 			To get to the number of bytes occupied by these delimiters,
832 			multiply this number by 4
833 
834 
835 
836 			<legal all>
837 
838 ampdu_delim_err_count
839 
840 			The number of MPDU delimiter errors counted for this
841 			user.
842 
843 
844 
845 			Note that this is a delimiter count and not byte count.
846 			To get to the number of bytes occupied by these delimiters,
847 			multiply this number by 4
848 
849 			<legal all>
850 
851 ampdu_delim_ok_count_13_7
852 
853 			Number of AMPDU delimiters received with correct
854 			structure
855 
856 			Bits 13-7 from this counter
857 
858 
859 
860 			Note that this is a delimiter count and not byte count.
861 			To get to the number of bytes occupied by these delimiters,
862 			multiply this number by 4
863 
864 			<legal all>
865 
866 mpdu_err_byte_count
867 
868 			The number of bytes belonging to MPDUs with an FCS
869 			error. This includes the FCS field.
870 
871 
872 
873 			<legal all>
874 
875 ampdu_delim_ok_count_20_14
876 
877 			Number of AMPDU delimiters received with correct
878 			structure
879 
880 			Bits 20-14 from this counter
881 
882 
883 
884 			Note that this is a delimiter count and not byte count.
885 			To get to the number of bytes occupied by these delimiters,
886 			multiply this number by 4
887 
888 
889 
890 			<legal all>
891 
892 non_consecutive_delimiter_err
893 
894 			The number of times an MPDU delimiter error is detected
895 			that is not immediately preceded by another MPDU delimiter
896 			also with FCS error.
897 
898 
899 
900 			The counter saturates at 0xFFFF
901 
902 
903 
904 			<legal all>
905 
906 reserved_20a
907 
908 			<legal 0>
909 
910 ht_control_null_field
911 
912 
913 
914 
915 			Last successfully received
916 			HT_CONTROL/VHT_CONTROL/HE_CONTROL  field from QoS Null frame
917 			for this user.
918 
919 			<legal all>
920 
921 sw_response_reference_ptr_ext
922 
923 			Extended Pointer info that SW uses to refer back to an
924 			expected response transmission. Used for Rate adaptation
925 			purposes.
926 
927 			When a reception occurs that is not tied to an expected
928 			response, this field is set to 0x0.
929 
930 
931 
932 			Note: earlier on in this TLV there is also the field:
933 			Sw_response_reference_ptr.
934 
935 			<legal all>
936 */
937 
938 
939  /* EXTERNAL REFERENCE : struct rx_rxpcu_classification_overview rxpcu_classification_details */
940 
941 
942 /* Description		RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS
943 
944 			When set, at least one Filter Pass MPDU has been
945 			received. FCS might or might not have been passing.
946 
947 
948 
949 			For MU UL, in  TLVs RX_PPDU_END and
950 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
951 			users.
952 
953 			<legal all>
954 */
955 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_OFFSET 0x00000000
956 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_LSB 0
957 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_MASK 0x00000001
958 
959 /* Description		RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK
960 
961 			When set, at least one Filter Pass MPDU has been
962 			received that has a correct FCS.
963 
964 
965 
966 			For MU UL, in  TLVs RX_PPDU_END and
967 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
968 			users.
969 
970 
971 
972 			<legal all>
973 */
974 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000
975 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_LSB 1
976 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002
977 
978 /* Description		RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS
979 
980 			When set, at least one Monitor Direct MPDU has been
981 			received. FCS might or might not have been passing
982 
983 
984 
985 			For MU UL, in  TLVs RX_PPDU_END and
986 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
987 			users.
988 
989 			<legal all>
990 */
991 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000
992 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_LSB 2
993 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_MASK 0x00000004
994 
995 /* Description		RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK
996 
997 			When set, at least one Monitor Direct MPDU has been
998 			received that has a correct FCS.
999 
1000 
1001 
1002 			For MU UL, in  TLVs RX_PPDU_END and
1003 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
1004 			users.
1005 
1006 
1007 
1008 			<legal all>
1009 */
1010 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000
1011 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3
1012 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008
1013 
1014 /* Description		RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS
1015 
1016 			When set, at least one Monitor Direct MPDU has been
1017 			received. FCS might or might not have been passing.
1018 
1019 
1020 
1021 			For MU UL, in  TLVs RX_PPDU_END and
1022 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
1023 			users.
1024 
1025 			<legal all>
1026 */
1027 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_OFFSET 0x00000000
1028 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_LSB 4
1029 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_MASK 0x00000010
1030 
1031 /* Description		RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK
1032 
1033 			When set, at least one Monitor Direct MPDU has been
1034 			received that has a correct FCS.
1035 
1036 
1037 
1038 			For MU UL, in  TLVs RX_PPDU_END and
1039 			RX_PPDU_END_STATUS_DONE, this field is the OR of all the
1040 			users.
1041 
1042 			<legal all>
1043 */
1044 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000
1045 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5
1046 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020
1047 
1048 /* Description		RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED
1049 
1050 			When set, PPDU reception was aborted by the PHY
1051 
1052 			<legal all>
1053 */
1054 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_OFFSET 0x00000000
1055 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_LSB 6
1056 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHYRX_ABORT_RECEIVED_MASK 0x00000040
1057 
1058 /* Description		RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0
1059 
1060 			<legal 0>
1061 */
1062 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_OFFSET 0x00000000
1063 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_LSB 7
1064 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_RESERVED_0_MASK 0x0000ff80
1065 
1066 /* Description		RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID
1067 
1068 			A ppdu counter value that PHY increments for every PPDU
1069 			received. The counter value wraps around
1070 
1071 			<legal all>
1072 */
1073 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_OFFSET 0x00000000
1074 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_LSB 16
1075 #define RX_PPDU_END_USER_STATS_0_RXPCU_CLASSIFICATION_DETAILS_PHY_PPDU_ID_MASK 0xffff0000
1076 
1077 /* Description		RX_PPDU_END_USER_STATS_1_STA_FULL_AID
1078 
1079 			Consumer: FW
1080 
1081 			Producer: RXPCU
1082 
1083 
1084 
1085 			The full AID of this station.
1086 
1087 
1088 
1089 			<legal all>
1090 */
1091 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_OFFSET                 0x00000004
1092 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_LSB                    0
1093 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_MASK                   0x00001fff
1094 
1095 /* Description		RX_PPDU_END_USER_STATS_1_MCS
1096 
1097 			MCS of the received frame
1098 
1099 
1100 
1101 			For details, refer to  MCS_TYPE description
1102 
1103 			Note: This is rate in case of 11a/11b
1104 
1105 
1106 
1107 			<legal all>
1108 */
1109 #define RX_PPDU_END_USER_STATS_1_MCS_OFFSET                          0x00000004
1110 #define RX_PPDU_END_USER_STATS_1_MCS_LSB                             13
1111 #define RX_PPDU_END_USER_STATS_1_MCS_MASK                            0x0001e000
1112 
1113 /* Description		RX_PPDU_END_USER_STATS_1_NSS
1114 
1115 			Number of spatial streams.
1116 
1117 
1118 
1119 			NOTE: RXPCU derives this from the 'Mimo_ss_bitmap'
1120 
1121 
1122 
1123 			<enum 0 1_spatial_stream>Single spatial stream
1124 
1125 			<enum 1 2_spatial_streams>2 spatial streams
1126 
1127 			<enum 2 3_spatial_streams>3 spatial streams
1128 
1129 			<enum 3 4_spatial_streams>4 spatial streams
1130 
1131 			<enum 4 5_spatial_streams>5 spatial streams
1132 
1133 			<enum 5 6_spatial_streams>6 spatial streams
1134 
1135 			<enum 6 7_spatial_streams>7 spatial streams
1136 
1137 			<enum 7 8_spatial_streams>8 spatial streams
1138 */
1139 #define RX_PPDU_END_USER_STATS_1_NSS_OFFSET                          0x00000004
1140 #define RX_PPDU_END_USER_STATS_1_NSS_LSB                             17
1141 #define RX_PPDU_END_USER_STATS_1_NSS_MASK                            0x000e0000
1142 
1143 /* Description		RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID
1144 
1145 			When set, ofdma RU related info in the following fields
1146 			is valid
1147 
1148 			<legal all>
1149 */
1150 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_OFFSET             0x00000004
1151 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_LSB                20
1152 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_MASK               0x00100000
1153 
1154 /* Description		RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX
1155 
1156 			Field only valid when Ofdma_info_valid is set
1157 
1158 
1159 
1160 			RU index number to which User is assigned
1161 
1162 			RU numbering is over the entire BW, starting from 0
1163 
1164 			<legal 0-73>
1165 */
1166 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_OFFSET      0x00000004
1167 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_LSB         21
1168 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_MASK        0x0fe00000
1169 
1170 /* Description		RX_PPDU_END_USER_STATS_1_RESERVED_1A
1171 
1172 			<legal 0>
1173 */
1174 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_OFFSET                  0x00000004
1175 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_LSB                     28
1176 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_MASK                    0xf0000000
1177 
1178 /* Description		RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH
1179 
1180 			The size of the RU for this user.
1181 
1182 			In units of 1 (26 tone) RU
1183 
1184 			<legal 1-74>
1185 */
1186 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_OFFSET            0x00000008
1187 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_LSB               0
1188 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_MASK              0x0000007f
1189 
1190 /* Description		RX_PPDU_END_USER_STATS_2_RESERVED_2A
1191 
1192 			<legal 0>
1193 */
1194 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_OFFSET                  0x00000008
1195 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_LSB                     7
1196 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_MASK                    0x00000080
1197 
1198 /* Description		RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY
1199 
1200 			DO NOT USE
1201 
1202 
1203 
1204 			Field not populated by MAC HW
1205 
1206 			<legal all>
1207 */
1208 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_OFFSET         0x00000008
1209 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_LSB            8
1210 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_MASK           0x0000ff00
1211 
1212 /* Description		RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR
1213 
1214 			The number of MPDUs received from this STA in this PPDU
1215 			with FCS errors
1216 
1217 			<legal all>
1218 */
1219 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_OFFSET             0x00000008
1220 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_LSB                16
1221 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_MASK               0x03ff0000
1222 
1223 /* Description		RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED
1224 
1225 			Field filled in by RXDMA
1226 
1227 
1228 
1229 			When set, RXDMA has used the wbm2rxdma_buf ring as
1230 			source for at least one of the frames in this PPDU.
1231 */
1232 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_OFFSET    0x00000008
1233 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_LSB       26
1234 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_MASK      0x04000000
1235 
1236 /* Description		RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED
1237 
1238 			Field filled in by RXDMA
1239 
1240 
1241 
1242 			When set, RXDMA has used the fw2rxdma_buf ring as source
1243 			for at least one of the frames in this PPDU.
1244 */
1245 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_OFFSET     0x00000008
1246 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_LSB        27
1247 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_MASK       0x08000000
1248 
1249 /* Description		RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED
1250 
1251 			Field filled in by RXDMA
1252 
1253 
1254 
1255 			When set, RXDMA has used the sw2rxdma_buf ring as source
1256 			for at least one of the frames in this PPDU.
1257 */
1258 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_OFFSET     0x00000008
1259 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_LSB        28
1260 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_MASK       0x10000000
1261 
1262 /* Description		RX_PPDU_END_USER_STATS_2_RESERVED_2B
1263 
1264 			<legal 0>
1265 */
1266 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_OFFSET                  0x00000008
1267 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_LSB                     29
1268 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_MASK                    0xe0000000
1269 
1270 /* Description		RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK
1271 
1272 			The number of MPDUs received from this STA in this PPDU
1273 			with correct FCS
1274 
1275 			<legal all>
1276 */
1277 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_OFFSET              0x0000000c
1278 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_LSB                 0
1279 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_MASK                0x000001ff
1280 
1281 /* Description		RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID
1282 
1283 			When set, the frame_control_info field contains valid
1284 			information
1285 
1286 			<legal all>
1287 */
1288 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_OFFSET     0x0000000c
1289 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_LSB        9
1290 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_MASK       0x00000200
1291 
1292 /* Description		RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID
1293 
1294 			When set, the QoS_control_info field contains valid
1295 			information
1296 
1297 			<legal all>
1298 */
1299 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_OFFSET       0x0000000c
1300 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_LSB          10
1301 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_MASK         0x00000400
1302 
1303 /* Description		RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID
1304 
1305 			When set, the HT_control_field contains valid
1306 			information
1307 
1308 			<legal all>
1309 */
1310 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_OFFSET        0x0000000c
1311 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_LSB           11
1312 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_MASK          0x00000800
1313 
1314 /* Description		RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID
1315 
1316 			When set, the First_data_seq_ctrl field contains valid
1317 			information
1318 
1319 			<legal all>
1320 */
1321 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_OFFSET 0x0000000c
1322 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_LSB 12
1323 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_MASK 0x00001000
1324 
1325 /* Description		RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID
1326 
1327 			When set, the HT_control_NULL_field contains valid
1328 			information
1329 
1330 			<legal all>
1331 */
1332 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_OFFSET   0x0000000c
1333 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_LSB      13
1334 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_MASK     0x00002000
1335 
1336 /* Description		RX_PPDU_END_USER_STATS_3_RESERVED_3A
1337 
1338 			<legal 0>
1339 */
1340 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_OFFSET                  0x0000000c
1341 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_LSB                     14
1342 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_MASK                    0x0000c000
1343 
1344 /* Description		RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED
1345 
1346 			Field filled in by RXDMA
1347 
1348 
1349 
1350 			Set when at least one frame during this PPDU got pushed
1351 			to this ring by RXDMA
1352 */
1353 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_OFFSET          0x0000000c
1354 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_LSB             16
1355 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_MASK            0x00010000
1356 
1357 /* Description		RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED
1358 
1359 			Field filled in by RXDMA
1360 
1361 
1362 
1363 			Set when at least one frame during this PPDU got pushed
1364 			to this ring by RXDMA
1365 */
1366 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_OFFSET           0x0000000c
1367 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_LSB              17
1368 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_MASK             0x00020000
1369 
1370 /* Description		RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED
1371 
1372 			Field filled in by RXDMA
1373 
1374 
1375 
1376 			Set when at least one frame during this PPDU got pushed
1377 			to this ring by RXDMA
1378 */
1379 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_OFFSET           0x0000000c
1380 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_LSB              18
1381 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_MASK             0x00040000
1382 
1383 /* Description		RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED
1384 
1385 			Field filled in by RXDMA
1386 
1387 
1388 
1389 			Set when at least one frame during this PPDU got pushed
1390 			to this ring by RXDMA
1391 */
1392 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_OFFSET      0x0000000c
1393 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_LSB         19
1394 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_MASK        0x00080000
1395 
1396 /* Description		RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE
1397 
1398 			Field only valid when HT_control_info_valid or
1399 			HT_control_info_NULL_valid    is set.
1400 
1401 
1402 
1403 			Indicates what the PHY receive type was for receiving
1404 			this frame. Can help determine if the HT_CONTROL field shall
1405 			be interpreted as HT/VHT or HE.
1406 
1407 
1408 
1409 			NOTE: later on in the 11ax IEEE spec a bit within the HT
1410 			control field was introduced that explicitly indicated how
1411 			to interpret the HT control field.... As HT, VHT, or HE.
1412 
1413 
1414 
1415 			<enum 0 dot11a>802.11a PPDU type
1416 
1417 			<enum 1 dot11b>802.11b PPDU type
1418 
1419 			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
1420 
1421 			<enum 3 dot11ac>802.11ac PPDU type
1422 
1423 			<enum 4 dot11ax>802.11ax PPDU type
1424 
1425 			<enum 5 dot11ba>802.11ba (WUR) PPDU type
1426 */
1427 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_OFFSET    0x0000000c
1428 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_LSB       20
1429 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_MASK      0x00f00000
1430 
1431 /* Description		RX_PPDU_END_USER_STATS_3_RESERVED_3B
1432 
1433 			<legal 0>
1434 */
1435 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_OFFSET                  0x0000000c
1436 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_LSB                     24
1437 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_MASK                    0xff000000
1438 
1439 /* Description		RX_PPDU_END_USER_STATS_4_AST_INDEX
1440 
1441 			This field indicates the index of the AST entry
1442 			corresponding to this MPDU. It is provided by the GSE module
1443 			instantiated in RXPCU.
1444 
1445 			A value of 0xFFFF indicates an invalid AST index,
1446 			meaning that No AST entry was found or NO AST search was
1447 			performed
1448 
1449 			<legal all>
1450 */
1451 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_OFFSET                    0x00000010
1452 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_LSB                       0
1453 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_MASK                      0x0000ffff
1454 
1455 /* Description		RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD
1456 
1457 			Field only valid when Frame_control_info_valid is set.
1458 
1459 
1460 
1461 			Last successfully received Frame_control field of data
1462 			frame (excluding Data NULL/ QoS Null) for this user
1463 
1464 			Mainly used to track the PM state of the transmitted
1465 			device
1466 
1467 
1468 
1469 			NOTE: only data frame info is needed, as control and
1470 			management frames are already routed to the FW.
1471 
1472 			<legal all>
1473 */
1474 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_OFFSET          0x00000010
1475 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_LSB             16
1476 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_MASK            0xffff0000
1477 
1478 /* Description		RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL
1479 
1480 			Field only valid when Data_sequence_control_info_valid
1481 			is set.
1482 
1483 
1484 
1485 			Sequence control field of the first data frame
1486 			(excluding Data NULL or QoS Data null) received for this
1487 			user with correct FCS
1488 
1489 
1490 
1491 			NOTE: only data frame info is needed, as control and
1492 			management frames are already routed to the FW.
1493 
1494 			<legal all>
1495 */
1496 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_OFFSET          0x00000014
1497 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_LSB             0
1498 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_MASK            0x0000ffff
1499 
1500 /* Description		RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD
1501 
1502 			Field only valid when QoS_control_info_valid is set.
1503 
1504 
1505 
1506 			Last successfully received QoS_control field of data
1507 			frame (excluding Data NULL/ QoS Null) for this user
1508 
1509 
1510 
1511 			Note that in case of multi TID, this field can only
1512 			reflect the last properly received MPDU, and thus can not
1513 			indicate all potentially different TIDs that had been
1514 			received earlier.
1515 
1516 
1517 
1518 			There are however per TID fields, that will contain
1519 			among other things all buffer status info: See
1520 
1521 			QoSCtrl_15_8_tid???
1522 
1523 			<legal all>
1524 */
1525 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_OFFSET            0x00000014
1526 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_LSB               16
1527 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_MASK              0xffff0000
1528 
1529 /* Description		RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD
1530 
1531 			Field only valid when HT_control_info_valid is set.
1532 
1533 
1534 
1535 			Last successfully received
1536 			HT_CONTROL/VHT_CONTROL/HE_CONTROL  field of data frames,
1537 			excluding QoS Null frames for this user.
1538 
1539 
1540 
1541 			NOTE: HT control fields  from QoS Null frames are
1542 			captured in field HT_control_NULL_field
1543 
1544 			<legal all>
1545 */
1546 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_OFFSET             0x00000018
1547 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_LSB                0
1548 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_MASK               0xffffffff
1549 
1550 /* Description		RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0
1551 
1552 			Bitmap indicates in order of received MPDUs, which MPDUs
1553 			had an passing FCS or had an error.
1554 
1555 			1: FCS OK
1556 
1557 			0: FCS error
1558 
1559 			<legal all>
1560 */
1561 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_OFFSET           0x0000001c
1562 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_LSB              0
1563 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_MASK             0xffffffff
1564 
1565 /* Description		RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32
1566 
1567 			Bitmap indicates in order of received MPDUs, which MPDUs
1568 			had an passing FCS or had an error.
1569 
1570 			1: FCS OK
1571 
1572 			0: FCS error
1573 
1574 
1575 
1576 			NOTE: for users 0, 1, 2 and 3, additional bitmap info
1577 			(up to 256 bitmap window) is provided in
1578 			RX_PPDU_END_USER_STATS_EXT TLV
1579 
1580 			<legal all>
1581 */
1582 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_OFFSET          0x00000020
1583 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_LSB             0
1584 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_MASK            0xffffffff
1585 
1586 /* Description		RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT
1587 
1588 			Field filled in by RX OLE
1589 
1590 			Set to 0 by RXPCU
1591 
1592 
1593 
1594 			The number of MSDUs that are part of MPDUs without FCS
1595 			error, that contain UDP frames.
1596 
1597 			<legal all>
1598 */
1599 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_OFFSET               0x00000024
1600 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_LSB                  0
1601 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_MASK                 0x0000ffff
1602 
1603 /* Description		RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT
1604 
1605 			Field filled in by RX OLE
1606 
1607 			Set to 0 by RXPCU
1608 
1609 
1610 
1611 			The number of MSDUs that are part of MPDUs without FCS
1612 			error, that contain TCP frames.
1613 
1614 
1615 
1616 			(Note: This does NOT include TCP-ACK)
1617 
1618 			<legal all>
1619 */
1620 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_OFFSET               0x00000024
1621 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_LSB                  16
1622 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_MASK                 0xffff0000
1623 
1624 /* Description		RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT
1625 
1626 			Field filled in by RX OLE
1627 
1628 			Set to 0 by RXPCU
1629 
1630 
1631 
1632 			The number of MSDUs that are part of MPDUs without FCS
1633 			error, that contain neither UDP or TCP frames.
1634 
1635 
1636 
1637 			Includes Management and control frames.
1638 
1639 
1640 
1641 			<legal all>
1642 */
1643 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_OFFSET            0x00000028
1644 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_LSB               0
1645 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_MASK              0x0000ffff
1646 
1647 /* Description		RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT
1648 
1649 			Field filled in by RX OLE
1650 
1651 			Set to 0 by RXPCU
1652 
1653 
1654 
1655 			The number of MSDUs that are part of MPDUs without FCS
1656 			error, that contain TCP ack frames.
1657 
1658 			<legal all>
1659 */
1660 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_OFFSET          0x00000028
1661 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_LSB             16
1662 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_MASK            0xffff0000
1663 
1664 /* Description		RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR
1665 
1666 			Pointer that SW uses to refer back to an expected
1667 			response reception. Used for Rate adaptation purposes.
1668 
1669 			When a reception occurs that is not tied to an expected
1670 			response, this field is set to 0x0.
1671 
1672 
1673 
1674 			Note: further on in this TLV there is also the field:
1675 			Sw_response_reference_ptr_ext.
1676 
1677 			<legal all>
1678 */
1679 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_OFFSET   0x0000002c
1680 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_LSB      0
1681 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_MASK     0xffffffff
1682 
1683 /* Description		RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP
1684 
1685 			Whenever a frame is received that contains a QoS control
1686 			field (that includes QoS Data and/or QoS Null), the bit in
1687 			this field that corresponds to the received TID shall be
1688 			set.
1689 
1690 			...Bitmap[0] = TID0
1691 
1692 			...Bitmap[1] = TID1
1693 
1694 			Etc.
1695 
1696 			<legal all>
1697 */
1698 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_OFFSET 0x00000030
1699 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_LSB   0
1700 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_MASK  0x0000ffff
1701 
1702 /* Description		RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP
1703 
1704 			Field initialized to 0
1705 
1706 			For every QoS Data frame that is correctly received, the
1707 			EOSP bit of that frame is copied over into the corresponding
1708 			TID related field.
1709 
1710 			Note that this implies that the bits here represent the
1711 			EOSP bit status for each TID of the last MPDU received for
1712 			that TID.
1713 
1714 
1715 
1716 			received TID shall be set.
1717 
1718 			...eosp_bitmap[0] = eosp of TID0
1719 
1720 			...eosp_bitmap[1] = eosp of TID1
1721 
1722 			Etc.
1723 
1724 			<legal all>
1725 */
1726 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_OFFSET 0x00000030
1727 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_LSB 16
1728 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_MASK 0xffff0000
1729 
1730 /* Description		RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0
1731 
1732 			Field only valid when Received_qos_data_tid_bitmap[0] is
1733 			set
1734 
1735 
1736 
1737 			QoS control field bits 15-8 of the last properly
1738 			received MPDU with a QoS control field embedded, with  TID
1739 			== 0
1740 */
1741 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_OFFSET           0x00000034
1742 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_LSB              0
1743 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_MASK             0x000000ff
1744 
1745 /* Description		RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1
1746 
1747 			Field only valid when Received_qos_data_tid_bitmap[1] is
1748 			set
1749 
1750 
1751 
1752 			QoS control field bits 15-8 of the last properly
1753 			received MPDU with a QoS control field embedded, with  TID
1754 			== 1
1755 */
1756 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_OFFSET           0x00000034
1757 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_LSB              8
1758 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_MASK             0x0000ff00
1759 
1760 /* Description		RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2
1761 
1762 			Field only valid when Received_qos_data_tid_bitmap[2] is
1763 			set
1764 
1765 
1766 
1767 			QoS control field bits 15-8 of the last properly
1768 			received MPDU with a QoS control field embedded, with  TID
1769 			== 2
1770 */
1771 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_OFFSET           0x00000034
1772 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_LSB              16
1773 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_MASK             0x00ff0000
1774 
1775 /* Description		RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3
1776 
1777 			Field only valid when Received_qos_data_tid_bitmap[3] is
1778 			set
1779 
1780 
1781 
1782 			QoS control field bits 15-8 of the last properly
1783 			received MPDU with a QoS control field embedded, with  TID
1784 			== 3
1785 */
1786 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_OFFSET           0x00000034
1787 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_LSB              24
1788 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_MASK             0xff000000
1789 
1790 /* Description		RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4
1791 
1792 			Field only valid when Received_qos_data_tid_bitmap[4] is
1793 			set
1794 
1795 
1796 
1797 			QoS control field bits 15-8 of the last properly
1798 			received MPDU with a QoS control field embedded, with  TID
1799 			== 4
1800 */
1801 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_OFFSET           0x00000038
1802 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_LSB              0
1803 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_MASK             0x000000ff
1804 
1805 /* Description		RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5
1806 
1807 			Field only valid when Received_qos_data_tid_bitmap[5] is
1808 			set
1809 
1810 
1811 
1812 			QoS control field bits 15-8 of the last properly
1813 			received MPDU with a QoS control field embedded, with  TID
1814 			== 5
1815 */
1816 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_OFFSET           0x00000038
1817 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_LSB              8
1818 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_MASK             0x0000ff00
1819 
1820 /* Description		RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6
1821 
1822 			Field only valid when Received_qos_data_tid_bitmap[6] is
1823 			set
1824 
1825 
1826 
1827 			QoS control field bits 15-8 of the last properly
1828 			received MPDU with a QoS control field embedded, with  TID
1829 			== 6
1830 */
1831 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_OFFSET           0x00000038
1832 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_LSB              16
1833 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_MASK             0x00ff0000
1834 
1835 /* Description		RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7
1836 
1837 			Field only valid when Received_qos_data_tid_bitmap[7] is
1838 			set
1839 
1840 
1841 
1842 			QoS control field bits 15-8 of the last properly
1843 			received MPDU with a QoS control field embedded, with  TID
1844 			== 7
1845 */
1846 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_OFFSET           0x00000038
1847 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_LSB              24
1848 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_MASK             0xff000000
1849 
1850 /* Description		RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8
1851 
1852 			Field only valid when Received_qos_data_tid_bitmap[8] is
1853 			set
1854 
1855 
1856 
1857 			QoS control field bits 15-8 of the last properly
1858 			received MPDU with a QoS control field embedded, with  TID
1859 			== 8
1860 */
1861 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_OFFSET           0x0000003c
1862 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_LSB              0
1863 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_MASK             0x000000ff
1864 
1865 /* Description		RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9
1866 
1867 			Field only valid when Received_qos_data_tid_bitmap[9] is
1868 			set
1869 
1870 
1871 
1872 			QoS control field bits 15-8 of the last properly
1873 			received MPDU with a QoS control field embedded, with  TID
1874 			== 9
1875 */
1876 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_OFFSET           0x0000003c
1877 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_LSB              8
1878 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_MASK             0x0000ff00
1879 
1880 /* Description		RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10
1881 
1882 			Field only valid when Received_qos_data_tid_bitmap[10]
1883 			is set
1884 
1885 
1886 
1887 			QoS control field bits 15-8 of the last properly
1888 			received MPDU with a QoS control field embedded, with  TID
1889 			== 10
1890 */
1891 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_OFFSET          0x0000003c
1892 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_LSB             16
1893 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_MASK            0x00ff0000
1894 
1895 /* Description		RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11
1896 
1897 			Field only valid when Received_qos_data_tid_bitmap[11]
1898 			is set
1899 
1900 
1901 
1902 			QoS control field bits 15-8 of the last properly
1903 			received MPDU with a QoS control field embedded, with  TID
1904 			== 11
1905 */
1906 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_OFFSET          0x0000003c
1907 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_LSB             24
1908 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_MASK            0xff000000
1909 
1910 /* Description		RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12
1911 
1912 			Field only valid when Received_qos_data_tid_bitmap[12]
1913 			is set
1914 
1915 
1916 
1917 			QoS control field bits 15-8 of the last properly
1918 			received MPDU with a QoS control field embedded, with  TID
1919 			== 12
1920 */
1921 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_OFFSET          0x00000040
1922 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_LSB             0
1923 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_MASK            0x000000ff
1924 
1925 /* Description		RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13
1926 
1927 			Field only valid when Received_qos_data_tid_bitmap[13]
1928 			is set
1929 
1930 
1931 
1932 			QoS control field bits 15-8 of the last properly
1933 			received MPDU with a QoS control field embedded, with  TID
1934 			== 13
1935 */
1936 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_OFFSET          0x00000040
1937 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_LSB             8
1938 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_MASK            0x0000ff00
1939 
1940 /* Description		RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14
1941 
1942 			Field only valid when Received_qos_data_tid_bitmap[14]
1943 			is set
1944 
1945 
1946 
1947 			QoS control field bits 15-8 of the last properly
1948 			received MPDU with a QoS control field embedded, with  TID
1949 			== 14
1950 */
1951 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_OFFSET          0x00000040
1952 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_LSB             16
1953 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_MASK            0x00ff0000
1954 
1955 /* Description		RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15
1956 
1957 			Field only valid when Received_qos_data_tid_bitmap[15]
1958 			is set
1959 
1960 
1961 
1962 			QoS control field bits 15-8 of the last properly
1963 			received MPDU with a QoS control field embedded, with  TID
1964 			== 15
1965 */
1966 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_OFFSET          0x00000040
1967 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_LSB             24
1968 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_MASK            0xff000000
1969 
1970 /* Description		RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT
1971 
1972 			The number of bytes received within an MPDU for this
1973 			user with correct FCS. This includes the FCS field
1974 
1975 
1976 
1977 			NOTE:
1978 
1979 			The sum of the four fields.....
1980 
1981 			Mpdu_ok_byte_count +
1982 
1983 			mpdu_err_byte_count +
1984 
1985 
1986 			.....is the total number of bytes that were received for
1987 			this user from the PHY.
1988 
1989 
1990 
1991 			<legal all>
1992 */
1993 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_OFFSET          0x00000044
1994 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_LSB             0
1995 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_MASK            0x01ffffff
1996 
1997 /* Description		RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0
1998 
1999 			Number of AMPDU delimiter received with correct
2000 			structure
2001 
2002 			LSB 7 bits from this counter
2003 
2004 
2005 
2006 			Note that this is a delimiter count and not byte count.
2007 			To get to the number of bytes occupied by these delimiters,
2008 			multiply this number by 4
2009 
2010 
2011 
2012 			<legal all>
2013 */
2014 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_OFFSET    0x00000044
2015 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_LSB       25
2016 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_MASK      0xfe000000
2017 
2018 /* Description		RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT
2019 
2020 			The number of MPDU delimiter errors counted for this
2021 			user.
2022 
2023 
2024 
2025 			Note that this is a delimiter count and not byte count.
2026 			To get to the number of bytes occupied by these delimiters,
2027 			multiply this number by 4
2028 
2029 			<legal all>
2030 */
2031 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_OFFSET       0x00000048
2032 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_LSB          0
2033 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_MASK         0x01ffffff
2034 
2035 /* Description		RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7
2036 
2037 			Number of AMPDU delimiters received with correct
2038 			structure
2039 
2040 			Bits 13-7 from this counter
2041 
2042 
2043 
2044 			Note that this is a delimiter count and not byte count.
2045 			To get to the number of bytes occupied by these delimiters,
2046 			multiply this number by 4
2047 
2048 			<legal all>
2049 */
2050 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_OFFSET   0x00000048
2051 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_LSB      25
2052 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_MASK     0xfe000000
2053 
2054 /* Description		RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT
2055 
2056 			The number of bytes belonging to MPDUs with an FCS
2057 			error. This includes the FCS field.
2058 
2059 
2060 
2061 			<legal all>
2062 */
2063 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_OFFSET         0x0000004c
2064 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_LSB            0
2065 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_MASK           0x01ffffff
2066 
2067 /* Description		RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14
2068 
2069 			Number of AMPDU delimiters received with correct
2070 			structure
2071 
2072 			Bits 20-14 from this counter
2073 
2074 
2075 
2076 			Note that this is a delimiter count and not byte count.
2077 			To get to the number of bytes occupied by these delimiters,
2078 			multiply this number by 4
2079 
2080 
2081 
2082 			<legal all>
2083 */
2084 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_OFFSET  0x0000004c
2085 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_LSB     25
2086 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_MASK    0xfe000000
2087 
2088 /* Description		RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR
2089 
2090 			The number of times an MPDU delimiter error is detected
2091 			that is not immediately preceded by another MPDU delimiter
2092 			also with FCS error.
2093 
2094 
2095 
2096 			The counter saturates at 0xFFFF
2097 
2098 
2099 
2100 			<legal all>
2101 */
2102 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_OFFSET 0x00000050
2103 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_LSB  0
2104 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_MASK 0x0000ffff
2105 
2106 /* Description		RX_PPDU_END_USER_STATS_20_RESERVED_20A
2107 
2108 			<legal 0>
2109 */
2110 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_OFFSET                0x00000050
2111 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_LSB                   16
2112 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_MASK                  0xffff0000
2113 
2114 /* Description		RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD
2115 
2116 
2117 
2118 
2119 			Last successfully received
2120 			HT_CONTROL/VHT_CONTROL/HE_CONTROL  field from QoS Null frame
2121 			for this user.
2122 
2123 			<legal all>
2124 */
2125 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_OFFSET       0x00000054
2126 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_LSB          0
2127 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_MASK         0xffffffff
2128 
2129 /* Description		RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT
2130 
2131 			Extended Pointer info that SW uses to refer back to an
2132 			expected response transmission. Used for Rate adaptation
2133 			purposes.
2134 
2135 			When a reception occurs that is not tied to an expected
2136 			response, this field is set to 0x0.
2137 
2138 
2139 
2140 			Note: earlier on in this TLV there is also the field:
2141 			Sw_response_reference_ptr.
2142 
2143 			<legal all>
2144 */
2145 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_OFFSET 0x00000058
2146 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_LSB  0
2147 #define RX_PPDU_END_USER_STATS_22_SW_RESPONSE_REFERENCE_PTR_EXT_MASK 0xffffffff
2148 
2149 
2150 #endif // _RX_PPDU_END_USER_STATS_H_
2151