xref: /wlan-driver/fw-api/hw/qcn6122/rx_ppdu_start.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _RX_PPDU_START_H_
18 #define _RX_PPDU_START_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 
23 // ################ START SUMMARY #################
24 //
25 //	Dword	Fields
26 //	0	phy_ppdu_id[15:0], reserved_15[31:16]
27 //	1	sw_phy_meta_data[31:0]
28 //	2	ppdu_start_timestamp[31:0]
29 //
30 // ################ END SUMMARY #################
31 
32 #define NUM_OF_DWORDS_RX_PPDU_START 3
33 
34 struct rx_ppdu_start {
35              uint32_t phy_ppdu_id                     : 16, //[15:0]
36                       reserved_15                     : 16; //[31:16]
37              uint32_t sw_phy_meta_data                : 32; //[31:0]
38              uint32_t ppdu_start_timestamp            : 32; //[31:0]
39 };
40 
41 /*
42 
43 phy_ppdu_id
44 
45 			A ppdu counter value that PHY increments for every PPDU
46 			received. The counter value wraps around
47 
48 			<legal all>
49 
50 reserved_15
51 
52 			Reserved
53 
54 			<legal 0>
55 
56 sw_phy_meta_data
57 
58 			SW programmed Meta data provided by the PHY.
59 
60 
61 
62 			Can be used for SW to indicate the channel the device is
63 			on.
64 
65 ppdu_start_timestamp
66 
67 			Timestamp that indicates when the PPDU that contained
68 			this MPDU started on the medium.
69 
70 
71 
72 			The timestamp is captured by the PHY and given to the
73 			MAC in PHYRX_RSSI_LEGACY.ppdu_start_timestamp
74 
75 			<legal all>
76 */
77 
78 
79 /* Description		RX_PPDU_START_0_PHY_PPDU_ID
80 
81 			A ppdu counter value that PHY increments for every PPDU
82 			received. The counter value wraps around
83 
84 			<legal all>
85 */
86 #define RX_PPDU_START_0_PHY_PPDU_ID_OFFSET                           0x00000000
87 #define RX_PPDU_START_0_PHY_PPDU_ID_LSB                              0
88 #define RX_PPDU_START_0_PHY_PPDU_ID_MASK                             0x0000ffff
89 
90 /* Description		RX_PPDU_START_0_RESERVED_15
91 
92 			Reserved
93 
94 			<legal 0>
95 */
96 #define RX_PPDU_START_0_RESERVED_15_OFFSET                           0x00000000
97 #define RX_PPDU_START_0_RESERVED_15_LSB                              16
98 #define RX_PPDU_START_0_RESERVED_15_MASK                             0xffff0000
99 
100 /* Description		RX_PPDU_START_1_SW_PHY_META_DATA
101 
102 			SW programmed Meta data provided by the PHY.
103 
104 
105 
106 			Can be used for SW to indicate the channel the device is
107 			on.
108 */
109 #define RX_PPDU_START_1_SW_PHY_META_DATA_OFFSET                      0x00000004
110 #define RX_PPDU_START_1_SW_PHY_META_DATA_LSB                         0
111 #define RX_PPDU_START_1_SW_PHY_META_DATA_MASK                        0xffffffff
112 
113 /* Description		RX_PPDU_START_2_PPDU_START_TIMESTAMP
114 
115 			Timestamp that indicates when the PPDU that contained
116 			this MPDU started on the medium.
117 
118 
119 
120 			The timestamp is captured by the PHY and given to the
121 			MAC in PHYRX_RSSI_LEGACY.ppdu_start_timestamp
122 
123 			<legal all>
124 */
125 #define RX_PPDU_START_2_PPDU_START_TIMESTAMP_OFFSET                  0x00000008
126 #define RX_PPDU_START_2_PPDU_START_TIMESTAMP_LSB                     0
127 #define RX_PPDU_START_2_PPDU_START_TIMESTAMP_MASK                    0xffffffff
128 
129 
130 #endif // _RX_PPDU_START_H_
131