xref: /wlan-driver/fw-api/hw/qcn6122/rx_reo_queue_ext.h (revision 5113495b16420b49004c444715d2daae2066e7dc) 
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
3*5113495bSYour Name  *
4*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for any
5*5113495bSYour Name  * purpose with or without fee is hereby granted, provided that the above
6*5113495bSYour Name  * copyright notice and this permission notice appear in all copies.
7*5113495bSYour Name  *
8*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*5113495bSYour Name  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*5113495bSYour Name  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*5113495bSYour Name  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*5113495bSYour Name  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*5113495bSYour Name  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*5113495bSYour Name  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*5113495bSYour Name  */
16*5113495bSYour Name 
17*5113495bSYour Name #ifndef _RX_REO_QUEUE_EXT_H_
18*5113495bSYour Name #define _RX_REO_QUEUE_EXT_H_
19*5113495bSYour Name #if !defined(__ASSEMBLER__)
20*5113495bSYour Name #endif
21*5113495bSYour Name 
22*5113495bSYour Name #include "uniform_descriptor_header.h"
23*5113495bSYour Name #include "rx_mpdu_link_ptr.h"
24*5113495bSYour Name 
25*5113495bSYour Name // ################ START SUMMARY #################
26*5113495bSYour Name //
27*5113495bSYour Name //	Dword	Fields
28*5113495bSYour Name //	0	struct uniform_descriptor_header descriptor_header;
29*5113495bSYour Name //	1	reserved_1a[31:0]
30*5113495bSYour Name //	2-3	struct rx_mpdu_link_ptr mpdu_link_pointer_0;
31*5113495bSYour Name //	4-5	struct rx_mpdu_link_ptr mpdu_link_pointer_1;
32*5113495bSYour Name //	6-7	struct rx_mpdu_link_ptr mpdu_link_pointer_2;
33*5113495bSYour Name //	8-9	struct rx_mpdu_link_ptr mpdu_link_pointer_3;
34*5113495bSYour Name //	10-11	struct rx_mpdu_link_ptr mpdu_link_pointer_4;
35*5113495bSYour Name //	12-13	struct rx_mpdu_link_ptr mpdu_link_pointer_5;
36*5113495bSYour Name //	14-15	struct rx_mpdu_link_ptr mpdu_link_pointer_6;
37*5113495bSYour Name //	16-17	struct rx_mpdu_link_ptr mpdu_link_pointer_7;
38*5113495bSYour Name //	18-19	struct rx_mpdu_link_ptr mpdu_link_pointer_8;
39*5113495bSYour Name //	20-21	struct rx_mpdu_link_ptr mpdu_link_pointer_9;
40*5113495bSYour Name //	22-23	struct rx_mpdu_link_ptr mpdu_link_pointer_10;
41*5113495bSYour Name //	24-25	struct rx_mpdu_link_ptr mpdu_link_pointer_11;
42*5113495bSYour Name //	26-27	struct rx_mpdu_link_ptr mpdu_link_pointer_12;
43*5113495bSYour Name //	28-29	struct rx_mpdu_link_ptr mpdu_link_pointer_13;
44*5113495bSYour Name //	30-31	struct rx_mpdu_link_ptr mpdu_link_pointer_14;
45*5113495bSYour Name //
46*5113495bSYour Name // ################ END SUMMARY #################
47*5113495bSYour Name 
48*5113495bSYour Name #define NUM_OF_DWORDS_RX_REO_QUEUE_EXT 32
49*5113495bSYour Name 
50*5113495bSYour Name struct rx_reo_queue_ext {
51*5113495bSYour Name     struct            uniform_descriptor_header                       descriptor_header;
52*5113495bSYour Name              uint32_t reserved_1a                     : 32; //[31:0]
53*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_0;
54*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_1;
55*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_2;
56*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_3;
57*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_4;
58*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_5;
59*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_6;
60*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_7;
61*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_8;
62*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_9;
63*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_10;
64*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_11;
65*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_12;
66*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_13;
67*5113495bSYour Name     struct            rx_mpdu_link_ptr                       mpdu_link_pointer_14;
68*5113495bSYour Name };
69*5113495bSYour Name 
70*5113495bSYour Name /*
71*5113495bSYour Name 
72*5113495bSYour Name struct uniform_descriptor_header descriptor_header
73*5113495bSYour Name 
74*5113495bSYour Name 			Details about which module owns this struct.
75*5113495bSYour Name 
76*5113495bSYour Name 			Note that sub field Buffer_type shall be set to
77*5113495bSYour Name 			Receive_REO_queue_ext_descriptor
78*5113495bSYour Name 
79*5113495bSYour Name reserved_1a
80*5113495bSYour Name 
81*5113495bSYour Name 			<legal 0>
82*5113495bSYour Name 
83*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_0
84*5113495bSYour Name 
85*5113495bSYour Name 			Consumer: REO
86*5113495bSYour Name 
87*5113495bSYour Name 			Producer: REO
88*5113495bSYour Name 
89*5113495bSYour Name 
90*5113495bSYour Name 
91*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
92*5113495bSYour Name 			queue
93*5113495bSYour Name 
94*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_1
95*5113495bSYour Name 
96*5113495bSYour Name 			Consumer: REO
97*5113495bSYour Name 
98*5113495bSYour Name 			Producer: REO
99*5113495bSYour Name 
100*5113495bSYour Name 
101*5113495bSYour Name 
102*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
103*5113495bSYour Name 			queue
104*5113495bSYour Name 
105*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_2
106*5113495bSYour Name 
107*5113495bSYour Name 			Consumer: REO
108*5113495bSYour Name 
109*5113495bSYour Name 			Producer: REO
110*5113495bSYour Name 
111*5113495bSYour Name 
112*5113495bSYour Name 
113*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
114*5113495bSYour Name 			queue
115*5113495bSYour Name 
116*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_3
117*5113495bSYour Name 
118*5113495bSYour Name 			Consumer: REO
119*5113495bSYour Name 
120*5113495bSYour Name 			Producer: REO
121*5113495bSYour Name 
122*5113495bSYour Name 
123*5113495bSYour Name 
124*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
125*5113495bSYour Name 			queue
126*5113495bSYour Name 
127*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_4
128*5113495bSYour Name 
129*5113495bSYour Name 			Consumer: REO
130*5113495bSYour Name 
131*5113495bSYour Name 			Producer: REO
132*5113495bSYour Name 
133*5113495bSYour Name 
134*5113495bSYour Name 
135*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
136*5113495bSYour Name 			queue
137*5113495bSYour Name 
138*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_5
139*5113495bSYour Name 
140*5113495bSYour Name 			Consumer: REO
141*5113495bSYour Name 
142*5113495bSYour Name 			Producer: REO
143*5113495bSYour Name 
144*5113495bSYour Name 
145*5113495bSYour Name 
146*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
147*5113495bSYour Name 			queue
148*5113495bSYour Name 
149*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_6
150*5113495bSYour Name 
151*5113495bSYour Name 			Consumer: REO
152*5113495bSYour Name 
153*5113495bSYour Name 			Producer: REO
154*5113495bSYour Name 
155*5113495bSYour Name 
156*5113495bSYour Name 
157*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
158*5113495bSYour Name 			queue
159*5113495bSYour Name 
160*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_7
161*5113495bSYour Name 
162*5113495bSYour Name 			Consumer: REO
163*5113495bSYour Name 
164*5113495bSYour Name 			Producer: REO
165*5113495bSYour Name 
166*5113495bSYour Name 
167*5113495bSYour Name 
168*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
169*5113495bSYour Name 			queue
170*5113495bSYour Name 
171*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_8
172*5113495bSYour Name 
173*5113495bSYour Name 			Consumer: REO
174*5113495bSYour Name 
175*5113495bSYour Name 			Producer: REO
176*5113495bSYour Name 
177*5113495bSYour Name 
178*5113495bSYour Name 
179*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
180*5113495bSYour Name 			queue
181*5113495bSYour Name 
182*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_9
183*5113495bSYour Name 
184*5113495bSYour Name 			Consumer: REO
185*5113495bSYour Name 
186*5113495bSYour Name 			Producer: REO
187*5113495bSYour Name 
188*5113495bSYour Name 
189*5113495bSYour Name 
190*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
191*5113495bSYour Name 			queue
192*5113495bSYour Name 
193*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_10
194*5113495bSYour Name 
195*5113495bSYour Name 			Consumer: REO
196*5113495bSYour Name 
197*5113495bSYour Name 			Producer: REO
198*5113495bSYour Name 
199*5113495bSYour Name 
200*5113495bSYour Name 
201*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
202*5113495bSYour Name 			queue
203*5113495bSYour Name 
204*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_11
205*5113495bSYour Name 
206*5113495bSYour Name 			Consumer: REO
207*5113495bSYour Name 
208*5113495bSYour Name 			Producer: REO
209*5113495bSYour Name 
210*5113495bSYour Name 
211*5113495bSYour Name 
212*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
213*5113495bSYour Name 			queue
214*5113495bSYour Name 
215*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_12
216*5113495bSYour Name 
217*5113495bSYour Name 			Consumer: REO
218*5113495bSYour Name 
219*5113495bSYour Name 			Producer: REO
220*5113495bSYour Name 
221*5113495bSYour Name 
222*5113495bSYour Name 
223*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
224*5113495bSYour Name 			queue
225*5113495bSYour Name 
226*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_13
227*5113495bSYour Name 
228*5113495bSYour Name 			Consumer: REO
229*5113495bSYour Name 
230*5113495bSYour Name 			Producer: REO
231*5113495bSYour Name 
232*5113495bSYour Name 
233*5113495bSYour Name 
234*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
235*5113495bSYour Name 			queue
236*5113495bSYour Name 
237*5113495bSYour Name struct rx_mpdu_link_ptr mpdu_link_pointer_14
238*5113495bSYour Name 
239*5113495bSYour Name 			Consumer: REO
240*5113495bSYour Name 
241*5113495bSYour Name 			Producer: REO
242*5113495bSYour Name 
243*5113495bSYour Name 
244*5113495bSYour Name 
245*5113495bSYour Name 			Pointer to the next MPDU_link descriptor in the MPDU
246*5113495bSYour Name 			queue
247*5113495bSYour Name */
248*5113495bSYour Name 
249*5113495bSYour Name 
250*5113495bSYour Name  /* EXTERNAL REFERENCE : struct uniform_descriptor_header descriptor_header */
251*5113495bSYour Name 
252*5113495bSYour Name 
253*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_OWNER
254*5113495bSYour Name 
255*5113495bSYour Name 			Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
256*5113495bSYour Name 
257*5113495bSYour Name 			Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
258*5113495bSYour Name 
259*5113495bSYour Name 
260*5113495bSYour Name 
261*5113495bSYour Name 			The owner of this data structure:
262*5113495bSYour Name 
263*5113495bSYour Name 			<enum 0 WBM_owned> Buffer Manager currently owns this
264*5113495bSYour Name 			data structure.
265*5113495bSYour Name 
266*5113495bSYour Name 			<enum 1 SW_OR_FW_owned> Software of FW currently owns
267*5113495bSYour Name 			this data structure.
268*5113495bSYour Name 
269*5113495bSYour Name 			<enum 2 TQM_owned> Transmit Queue Manager currently owns
270*5113495bSYour Name 			this data structure.
271*5113495bSYour Name 
272*5113495bSYour Name 			<enum 3 RXDMA_owned> Receive DMA currently owns this
273*5113495bSYour Name 			data structure.
274*5113495bSYour Name 
275*5113495bSYour Name 			<enum 4 REO_owned> Reorder currently owns this data
276*5113495bSYour Name 			structure.
277*5113495bSYour Name 
278*5113495bSYour Name 			<enum 5 SWITCH_owned> SWITCH currently owns this data
279*5113495bSYour Name 			structure.
280*5113495bSYour Name 
281*5113495bSYour Name 
282*5113495bSYour Name 
283*5113495bSYour Name 			<legal 0-5>
284*5113495bSYour Name */
285*5113495bSYour Name #define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_OWNER_OFFSET            0x00000000
286*5113495bSYour Name #define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_OWNER_LSB               0
287*5113495bSYour Name #define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_OWNER_MASK              0x0000000f
288*5113495bSYour Name 
289*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_BUFFER_TYPE
290*5113495bSYour Name 
291*5113495bSYour Name 			Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
292*5113495bSYour Name 
293*5113495bSYour Name 			Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
294*5113495bSYour Name 
295*5113495bSYour Name 
296*5113495bSYour Name 
297*5113495bSYour Name 			Field describing what contents format is of this
298*5113495bSYour Name 			descriptor
299*5113495bSYour Name 
300*5113495bSYour Name 
301*5113495bSYour Name 
302*5113495bSYour Name 			<enum 0 Transmit_MSDU_Link_descriptor >
303*5113495bSYour Name 
304*5113495bSYour Name 			<enum 1 Transmit_MPDU_Link_descriptor >
305*5113495bSYour Name 
306*5113495bSYour Name 			<enum 2 Transmit_MPDU_Queue_head_descriptor>
307*5113495bSYour Name 
308*5113495bSYour Name 			<enum 3 Transmit_MPDU_Queue_ext_descriptor>
309*5113495bSYour Name 
310*5113495bSYour Name 			<enum 4 Transmit_flow_descriptor>
311*5113495bSYour Name 
312*5113495bSYour Name 			<enum 5 Transmit_buffer > NOT TO BE USED:
313*5113495bSYour Name 
314*5113495bSYour Name 
315*5113495bSYour Name 
316*5113495bSYour Name 			<enum 6 Receive_MSDU_Link_descriptor >
317*5113495bSYour Name 
318*5113495bSYour Name 			<enum 7 Receive_MPDU_Link_descriptor >
319*5113495bSYour Name 
320*5113495bSYour Name 			<enum 8 Receive_REO_queue_descriptor >
321*5113495bSYour Name 
322*5113495bSYour Name 			<enum 9 Receive_REO_queue_ext_descriptor >
323*5113495bSYour Name 
324*5113495bSYour Name 
325*5113495bSYour Name 
326*5113495bSYour Name 			<enum 10 Receive_buffer >
327*5113495bSYour Name 
328*5113495bSYour Name 
329*5113495bSYour Name 
330*5113495bSYour Name 			<enum 11 Idle_link_list_entry>
331*5113495bSYour Name 
332*5113495bSYour Name 
333*5113495bSYour Name 
334*5113495bSYour Name 			<legal 0-11>
335*5113495bSYour Name */
336*5113495bSYour Name #define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_BUFFER_TYPE_OFFSET      0x00000000
337*5113495bSYour Name #define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_BUFFER_TYPE_LSB         4
338*5113495bSYour Name #define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_BUFFER_TYPE_MASK        0x000000f0
339*5113495bSYour Name 
340*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_RESERVED_0A
341*5113495bSYour Name 
342*5113495bSYour Name 			<legal 0>
343*5113495bSYour Name */
344*5113495bSYour Name #define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_RESERVED_0A_OFFSET      0x00000000
345*5113495bSYour Name #define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_RESERVED_0A_LSB         8
346*5113495bSYour Name #define RX_REO_QUEUE_EXT_0_DESCRIPTOR_HEADER_RESERVED_0A_MASK        0xffffff00
347*5113495bSYour Name 
348*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_1_RESERVED_1A
349*5113495bSYour Name 
350*5113495bSYour Name 			<legal 0>
351*5113495bSYour Name */
352*5113495bSYour Name #define RX_REO_QUEUE_EXT_1_RESERVED_1A_OFFSET                        0x00000004
353*5113495bSYour Name #define RX_REO_QUEUE_EXT_1_RESERVED_1A_LSB                           0
354*5113495bSYour Name #define RX_REO_QUEUE_EXT_1_RESERVED_1A_MASK                          0xffffffff
355*5113495bSYour Name 
356*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_0 */
357*5113495bSYour Name 
358*5113495bSYour Name 
359*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
360*5113495bSYour Name 
361*5113495bSYour Name 
362*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_2_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
363*5113495bSYour Name 
364*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
365*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
366*5113495bSYour Name 
367*5113495bSYour Name 
368*5113495bSYour Name 
369*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
370*5113495bSYour Name 
371*5113495bSYour Name 			<legal all>
372*5113495bSYour Name */
373*5113495bSYour Name #define RX_REO_QUEUE_EXT_2_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000008
374*5113495bSYour Name #define RX_REO_QUEUE_EXT_2_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
375*5113495bSYour Name #define RX_REO_QUEUE_EXT_2_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
376*5113495bSYour Name 
377*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
378*5113495bSYour Name 
379*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
380*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
381*5113495bSYour Name 
382*5113495bSYour Name 
383*5113495bSYour Name 
384*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
385*5113495bSYour Name 
386*5113495bSYour Name 			<legal all>
387*5113495bSYour Name */
388*5113495bSYour Name #define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000000c
389*5113495bSYour Name #define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
390*5113495bSYour Name #define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
391*5113495bSYour Name 
392*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
393*5113495bSYour Name 
394*5113495bSYour Name 			Consumer: WBM
395*5113495bSYour Name 
396*5113495bSYour Name 			Producer: SW/FW
397*5113495bSYour Name 
398*5113495bSYour Name 
399*5113495bSYour Name 
400*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
401*5113495bSYour Name 
402*5113495bSYour Name 
403*5113495bSYour Name 
404*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
405*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
406*5113495bSYour Name 			pointed to shall be returned after the frame has been
407*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
408*5113495bSYour Name 
409*5113495bSYour Name 
410*5113495bSYour Name 
411*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
412*5113495bSYour Name 			to the WMB buffer idle list
413*5113495bSYour Name 
414*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
415*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
416*5113495bSYour Name 
417*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
418*5113495bSYour Name 
419*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
420*5113495bSYour Name 			ring 0
421*5113495bSYour Name 
422*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
423*5113495bSYour Name 			ring 1
424*5113495bSYour Name 
425*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
426*5113495bSYour Name 			ring 2
427*5113495bSYour Name 
428*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
429*5113495bSYour Name 			ring 3
430*5113495bSYour Name 
431*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
432*5113495bSYour Name 			ring 4
433*5113495bSYour Name 
434*5113495bSYour Name 
435*5113495bSYour Name 
436*5113495bSYour Name 			<legal all>
437*5113495bSYour Name */
438*5113495bSYour Name #define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000000c
439*5113495bSYour Name #define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
440*5113495bSYour Name #define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
441*5113495bSYour Name 
442*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
443*5113495bSYour Name 
444*5113495bSYour Name 			Cookie field exclusively used by SW.
445*5113495bSYour Name 
446*5113495bSYour Name 
447*5113495bSYour Name 
448*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
449*5113495bSYour Name 
450*5113495bSYour Name 
451*5113495bSYour Name 
452*5113495bSYour Name 			HW ignores the contents, accept that it passes the
453*5113495bSYour Name 			programmed value on to other descriptors together with the
454*5113495bSYour Name 			physical address
455*5113495bSYour Name 
456*5113495bSYour Name 
457*5113495bSYour Name 
458*5113495bSYour Name 			Field can be used by SW to for example associate the
459*5113495bSYour Name 			buffers physical address with the virtual address
460*5113495bSYour Name 
461*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
462*5113495bSYour Name 			specification
463*5113495bSYour Name 
464*5113495bSYour Name 
465*5113495bSYour Name 
466*5113495bSYour Name 			NOTE1:
467*5113495bSYour Name 
468*5113495bSYour Name 			The three most significant bits can have a special
469*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
470*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
471*5113495bSYour Name 
472*5113495bSYour Name 
473*5113495bSYour Name 
474*5113495bSYour Name 			In case of NON punctured transmission:
475*5113495bSYour Name 
476*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
477*5113495bSYour Name 
478*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
479*5113495bSYour Name 
480*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
481*5113495bSYour Name 
482*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
483*5113495bSYour Name 
484*5113495bSYour Name 
485*5113495bSYour Name 
486*5113495bSYour Name 			In case of punctured transmission:
487*5113495bSYour Name 
488*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
489*5113495bSYour Name 
490*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
491*5113495bSYour Name 
492*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
493*5113495bSYour Name 
494*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
495*5113495bSYour Name 
496*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
497*5113495bSYour Name 
498*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
499*5113495bSYour Name 
500*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
501*5113495bSYour Name 
502*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
503*5113495bSYour Name 
504*5113495bSYour Name 
505*5113495bSYour Name 
506*5113495bSYour Name 			Note: a punctured transmission is indicated by the
507*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
508*5113495bSYour Name 			TLV
509*5113495bSYour Name 
510*5113495bSYour Name 
511*5113495bSYour Name 
512*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
513*5113495bSYour Name 			meaning in case this struct is embedded in an
514*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
515*5113495bSYour Name 			configured for passing on the additional info
516*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
517*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
518*5113495bSYour Name 			Moselle.
519*5113495bSYour Name 
520*5113495bSYour Name 
521*5113495bSYour Name 
522*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
523*5113495bSYour Name 			control field
524*5113495bSYour Name 
525*5113495bSYour Name 
526*5113495bSYour Name 
527*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
528*5113495bSYour Name 			indicates MPDUs with a QoS control field.
529*5113495bSYour Name 
530*5113495bSYour Name 
531*5113495bSYour Name 
532*5113495bSYour Name 
533*5113495bSYour Name 
534*5113495bSYour Name 			<legal all>
535*5113495bSYour Name */
536*5113495bSYour Name #define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000000c
537*5113495bSYour Name #define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
538*5113495bSYour Name #define RX_REO_QUEUE_EXT_3_MPDU_LINK_POINTER_0_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
539*5113495bSYour Name 
540*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_1 */
541*5113495bSYour Name 
542*5113495bSYour Name 
543*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
544*5113495bSYour Name 
545*5113495bSYour Name 
546*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_4_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
547*5113495bSYour Name 
548*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
549*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
550*5113495bSYour Name 
551*5113495bSYour Name 
552*5113495bSYour Name 
553*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
554*5113495bSYour Name 
555*5113495bSYour Name 			<legal all>
556*5113495bSYour Name */
557*5113495bSYour Name #define RX_REO_QUEUE_EXT_4_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000010
558*5113495bSYour Name #define RX_REO_QUEUE_EXT_4_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
559*5113495bSYour Name #define RX_REO_QUEUE_EXT_4_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
560*5113495bSYour Name 
561*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
562*5113495bSYour Name 
563*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
564*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
565*5113495bSYour Name 
566*5113495bSYour Name 
567*5113495bSYour Name 
568*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
569*5113495bSYour Name 
570*5113495bSYour Name 			<legal all>
571*5113495bSYour Name */
572*5113495bSYour Name #define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000014
573*5113495bSYour Name #define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
574*5113495bSYour Name #define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
575*5113495bSYour Name 
576*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
577*5113495bSYour Name 
578*5113495bSYour Name 			Consumer: WBM
579*5113495bSYour Name 
580*5113495bSYour Name 			Producer: SW/FW
581*5113495bSYour Name 
582*5113495bSYour Name 
583*5113495bSYour Name 
584*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
585*5113495bSYour Name 
586*5113495bSYour Name 
587*5113495bSYour Name 
588*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
589*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
590*5113495bSYour Name 			pointed to shall be returned after the frame has been
591*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
592*5113495bSYour Name 
593*5113495bSYour Name 
594*5113495bSYour Name 
595*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
596*5113495bSYour Name 			to the WMB buffer idle list
597*5113495bSYour Name 
598*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
599*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
600*5113495bSYour Name 
601*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
602*5113495bSYour Name 
603*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
604*5113495bSYour Name 			ring 0
605*5113495bSYour Name 
606*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
607*5113495bSYour Name 			ring 1
608*5113495bSYour Name 
609*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
610*5113495bSYour Name 			ring 2
611*5113495bSYour Name 
612*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
613*5113495bSYour Name 			ring 3
614*5113495bSYour Name 
615*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
616*5113495bSYour Name 			ring 4
617*5113495bSYour Name 
618*5113495bSYour Name 
619*5113495bSYour Name 
620*5113495bSYour Name 			<legal all>
621*5113495bSYour Name */
622*5113495bSYour Name #define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000014
623*5113495bSYour Name #define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
624*5113495bSYour Name #define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
625*5113495bSYour Name 
626*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
627*5113495bSYour Name 
628*5113495bSYour Name 			Cookie field exclusively used by SW.
629*5113495bSYour Name 
630*5113495bSYour Name 
631*5113495bSYour Name 
632*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
633*5113495bSYour Name 
634*5113495bSYour Name 
635*5113495bSYour Name 
636*5113495bSYour Name 			HW ignores the contents, accept that it passes the
637*5113495bSYour Name 			programmed value on to other descriptors together with the
638*5113495bSYour Name 			physical address
639*5113495bSYour Name 
640*5113495bSYour Name 
641*5113495bSYour Name 
642*5113495bSYour Name 			Field can be used by SW to for example associate the
643*5113495bSYour Name 			buffers physical address with the virtual address
644*5113495bSYour Name 
645*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
646*5113495bSYour Name 			specification
647*5113495bSYour Name 
648*5113495bSYour Name 
649*5113495bSYour Name 
650*5113495bSYour Name 			NOTE1:
651*5113495bSYour Name 
652*5113495bSYour Name 			The three most significant bits can have a special
653*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
654*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
655*5113495bSYour Name 
656*5113495bSYour Name 
657*5113495bSYour Name 
658*5113495bSYour Name 			In case of NON punctured transmission:
659*5113495bSYour Name 
660*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
661*5113495bSYour Name 
662*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
663*5113495bSYour Name 
664*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
665*5113495bSYour Name 
666*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
667*5113495bSYour Name 
668*5113495bSYour Name 
669*5113495bSYour Name 
670*5113495bSYour Name 			In case of punctured transmission:
671*5113495bSYour Name 
672*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
673*5113495bSYour Name 
674*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
675*5113495bSYour Name 
676*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
677*5113495bSYour Name 
678*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
679*5113495bSYour Name 
680*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
681*5113495bSYour Name 
682*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
683*5113495bSYour Name 
684*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
685*5113495bSYour Name 
686*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
687*5113495bSYour Name 
688*5113495bSYour Name 
689*5113495bSYour Name 
690*5113495bSYour Name 			Note: a punctured transmission is indicated by the
691*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
692*5113495bSYour Name 			TLV
693*5113495bSYour Name 
694*5113495bSYour Name 
695*5113495bSYour Name 
696*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
697*5113495bSYour Name 			meaning in case this struct is embedded in an
698*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
699*5113495bSYour Name 			configured for passing on the additional info
700*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
701*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
702*5113495bSYour Name 			Moselle.
703*5113495bSYour Name 
704*5113495bSYour Name 
705*5113495bSYour Name 
706*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
707*5113495bSYour Name 			control field
708*5113495bSYour Name 
709*5113495bSYour Name 
710*5113495bSYour Name 
711*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
712*5113495bSYour Name 			indicates MPDUs with a QoS control field.
713*5113495bSYour Name 
714*5113495bSYour Name 
715*5113495bSYour Name 
716*5113495bSYour Name 
717*5113495bSYour Name 
718*5113495bSYour Name 			<legal all>
719*5113495bSYour Name */
720*5113495bSYour Name #define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000014
721*5113495bSYour Name #define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
722*5113495bSYour Name #define RX_REO_QUEUE_EXT_5_MPDU_LINK_POINTER_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
723*5113495bSYour Name 
724*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_2 */
725*5113495bSYour Name 
726*5113495bSYour Name 
727*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
728*5113495bSYour Name 
729*5113495bSYour Name 
730*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_6_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
731*5113495bSYour Name 
732*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
733*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
734*5113495bSYour Name 
735*5113495bSYour Name 
736*5113495bSYour Name 
737*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
738*5113495bSYour Name 
739*5113495bSYour Name 			<legal all>
740*5113495bSYour Name */
741*5113495bSYour Name #define RX_REO_QUEUE_EXT_6_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000018
742*5113495bSYour Name #define RX_REO_QUEUE_EXT_6_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
743*5113495bSYour Name #define RX_REO_QUEUE_EXT_6_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
744*5113495bSYour Name 
745*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
746*5113495bSYour Name 
747*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
748*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
749*5113495bSYour Name 
750*5113495bSYour Name 
751*5113495bSYour Name 
752*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
753*5113495bSYour Name 
754*5113495bSYour Name 			<legal all>
755*5113495bSYour Name */
756*5113495bSYour Name #define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000001c
757*5113495bSYour Name #define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
758*5113495bSYour Name #define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
759*5113495bSYour Name 
760*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
761*5113495bSYour Name 
762*5113495bSYour Name 			Consumer: WBM
763*5113495bSYour Name 
764*5113495bSYour Name 			Producer: SW/FW
765*5113495bSYour Name 
766*5113495bSYour Name 
767*5113495bSYour Name 
768*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
769*5113495bSYour Name 
770*5113495bSYour Name 
771*5113495bSYour Name 
772*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
773*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
774*5113495bSYour Name 			pointed to shall be returned after the frame has been
775*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
776*5113495bSYour Name 
777*5113495bSYour Name 
778*5113495bSYour Name 
779*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
780*5113495bSYour Name 			to the WMB buffer idle list
781*5113495bSYour Name 
782*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
783*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
784*5113495bSYour Name 
785*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
786*5113495bSYour Name 
787*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
788*5113495bSYour Name 			ring 0
789*5113495bSYour Name 
790*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
791*5113495bSYour Name 			ring 1
792*5113495bSYour Name 
793*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
794*5113495bSYour Name 			ring 2
795*5113495bSYour Name 
796*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
797*5113495bSYour Name 			ring 3
798*5113495bSYour Name 
799*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
800*5113495bSYour Name 			ring 4
801*5113495bSYour Name 
802*5113495bSYour Name 
803*5113495bSYour Name 
804*5113495bSYour Name 			<legal all>
805*5113495bSYour Name */
806*5113495bSYour Name #define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000001c
807*5113495bSYour Name #define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
808*5113495bSYour Name #define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
809*5113495bSYour Name 
810*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
811*5113495bSYour Name 
812*5113495bSYour Name 			Cookie field exclusively used by SW.
813*5113495bSYour Name 
814*5113495bSYour Name 
815*5113495bSYour Name 
816*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
817*5113495bSYour Name 
818*5113495bSYour Name 
819*5113495bSYour Name 
820*5113495bSYour Name 			HW ignores the contents, accept that it passes the
821*5113495bSYour Name 			programmed value on to other descriptors together with the
822*5113495bSYour Name 			physical address
823*5113495bSYour Name 
824*5113495bSYour Name 
825*5113495bSYour Name 
826*5113495bSYour Name 			Field can be used by SW to for example associate the
827*5113495bSYour Name 			buffers physical address with the virtual address
828*5113495bSYour Name 
829*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
830*5113495bSYour Name 			specification
831*5113495bSYour Name 
832*5113495bSYour Name 
833*5113495bSYour Name 
834*5113495bSYour Name 			NOTE1:
835*5113495bSYour Name 
836*5113495bSYour Name 			The three most significant bits can have a special
837*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
838*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
839*5113495bSYour Name 
840*5113495bSYour Name 
841*5113495bSYour Name 
842*5113495bSYour Name 			In case of NON punctured transmission:
843*5113495bSYour Name 
844*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
845*5113495bSYour Name 
846*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
847*5113495bSYour Name 
848*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
849*5113495bSYour Name 
850*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
851*5113495bSYour Name 
852*5113495bSYour Name 
853*5113495bSYour Name 
854*5113495bSYour Name 			In case of punctured transmission:
855*5113495bSYour Name 
856*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
857*5113495bSYour Name 
858*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
859*5113495bSYour Name 
860*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
861*5113495bSYour Name 
862*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
863*5113495bSYour Name 
864*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
865*5113495bSYour Name 
866*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
867*5113495bSYour Name 
868*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
869*5113495bSYour Name 
870*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
871*5113495bSYour Name 
872*5113495bSYour Name 
873*5113495bSYour Name 
874*5113495bSYour Name 			Note: a punctured transmission is indicated by the
875*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
876*5113495bSYour Name 			TLV
877*5113495bSYour Name 
878*5113495bSYour Name 
879*5113495bSYour Name 
880*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
881*5113495bSYour Name 			meaning in case this struct is embedded in an
882*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
883*5113495bSYour Name 			configured for passing on the additional info
884*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
885*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
886*5113495bSYour Name 			Moselle.
887*5113495bSYour Name 
888*5113495bSYour Name 
889*5113495bSYour Name 
890*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
891*5113495bSYour Name 			control field
892*5113495bSYour Name 
893*5113495bSYour Name 
894*5113495bSYour Name 
895*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
896*5113495bSYour Name 			indicates MPDUs with a QoS control field.
897*5113495bSYour Name 
898*5113495bSYour Name 
899*5113495bSYour Name 
900*5113495bSYour Name 
901*5113495bSYour Name 
902*5113495bSYour Name 			<legal all>
903*5113495bSYour Name */
904*5113495bSYour Name #define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000001c
905*5113495bSYour Name #define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
906*5113495bSYour Name #define RX_REO_QUEUE_EXT_7_MPDU_LINK_POINTER_2_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
907*5113495bSYour Name 
908*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_3 */
909*5113495bSYour Name 
910*5113495bSYour Name 
911*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
912*5113495bSYour Name 
913*5113495bSYour Name 
914*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_8_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
915*5113495bSYour Name 
916*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
917*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
918*5113495bSYour Name 
919*5113495bSYour Name 
920*5113495bSYour Name 
921*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
922*5113495bSYour Name 
923*5113495bSYour Name 			<legal all>
924*5113495bSYour Name */
925*5113495bSYour Name #define RX_REO_QUEUE_EXT_8_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000020
926*5113495bSYour Name #define RX_REO_QUEUE_EXT_8_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
927*5113495bSYour Name #define RX_REO_QUEUE_EXT_8_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
928*5113495bSYour Name 
929*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
930*5113495bSYour Name 
931*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
932*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
933*5113495bSYour Name 
934*5113495bSYour Name 
935*5113495bSYour Name 
936*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
937*5113495bSYour Name 
938*5113495bSYour Name 			<legal all>
939*5113495bSYour Name */
940*5113495bSYour Name #define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000024
941*5113495bSYour Name #define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
942*5113495bSYour Name #define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
943*5113495bSYour Name 
944*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
945*5113495bSYour Name 
946*5113495bSYour Name 			Consumer: WBM
947*5113495bSYour Name 
948*5113495bSYour Name 			Producer: SW/FW
949*5113495bSYour Name 
950*5113495bSYour Name 
951*5113495bSYour Name 
952*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
953*5113495bSYour Name 
954*5113495bSYour Name 
955*5113495bSYour Name 
956*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
957*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
958*5113495bSYour Name 			pointed to shall be returned after the frame has been
959*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
960*5113495bSYour Name 
961*5113495bSYour Name 
962*5113495bSYour Name 
963*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
964*5113495bSYour Name 			to the WMB buffer idle list
965*5113495bSYour Name 
966*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
967*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
968*5113495bSYour Name 
969*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
970*5113495bSYour Name 
971*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
972*5113495bSYour Name 			ring 0
973*5113495bSYour Name 
974*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
975*5113495bSYour Name 			ring 1
976*5113495bSYour Name 
977*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
978*5113495bSYour Name 			ring 2
979*5113495bSYour Name 
980*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
981*5113495bSYour Name 			ring 3
982*5113495bSYour Name 
983*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
984*5113495bSYour Name 			ring 4
985*5113495bSYour Name 
986*5113495bSYour Name 
987*5113495bSYour Name 
988*5113495bSYour Name 			<legal all>
989*5113495bSYour Name */
990*5113495bSYour Name #define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000024
991*5113495bSYour Name #define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
992*5113495bSYour Name #define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
993*5113495bSYour Name 
994*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
995*5113495bSYour Name 
996*5113495bSYour Name 			Cookie field exclusively used by SW.
997*5113495bSYour Name 
998*5113495bSYour Name 
999*5113495bSYour Name 
1000*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1001*5113495bSYour Name 
1002*5113495bSYour Name 
1003*5113495bSYour Name 
1004*5113495bSYour Name 			HW ignores the contents, accept that it passes the
1005*5113495bSYour Name 			programmed value on to other descriptors together with the
1006*5113495bSYour Name 			physical address
1007*5113495bSYour Name 
1008*5113495bSYour Name 
1009*5113495bSYour Name 
1010*5113495bSYour Name 			Field can be used by SW to for example associate the
1011*5113495bSYour Name 			buffers physical address with the virtual address
1012*5113495bSYour Name 
1013*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
1014*5113495bSYour Name 			specification
1015*5113495bSYour Name 
1016*5113495bSYour Name 
1017*5113495bSYour Name 
1018*5113495bSYour Name 			NOTE1:
1019*5113495bSYour Name 
1020*5113495bSYour Name 			The three most significant bits can have a special
1021*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
1022*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
1023*5113495bSYour Name 
1024*5113495bSYour Name 
1025*5113495bSYour Name 
1026*5113495bSYour Name 			In case of NON punctured transmission:
1027*5113495bSYour Name 
1028*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
1029*5113495bSYour Name 
1030*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
1031*5113495bSYour Name 
1032*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
1033*5113495bSYour Name 
1034*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
1035*5113495bSYour Name 
1036*5113495bSYour Name 
1037*5113495bSYour Name 
1038*5113495bSYour Name 			In case of punctured transmission:
1039*5113495bSYour Name 
1040*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
1041*5113495bSYour Name 
1042*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
1043*5113495bSYour Name 
1044*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
1045*5113495bSYour Name 
1046*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
1047*5113495bSYour Name 
1048*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
1049*5113495bSYour Name 
1050*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
1051*5113495bSYour Name 
1052*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
1053*5113495bSYour Name 
1054*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
1055*5113495bSYour Name 
1056*5113495bSYour Name 
1057*5113495bSYour Name 
1058*5113495bSYour Name 			Note: a punctured transmission is indicated by the
1059*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
1060*5113495bSYour Name 			TLV
1061*5113495bSYour Name 
1062*5113495bSYour Name 
1063*5113495bSYour Name 
1064*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
1065*5113495bSYour Name 			meaning in case this struct is embedded in an
1066*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
1067*5113495bSYour Name 			configured for passing on the additional info
1068*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
1069*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
1070*5113495bSYour Name 			Moselle.
1071*5113495bSYour Name 
1072*5113495bSYour Name 
1073*5113495bSYour Name 
1074*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
1075*5113495bSYour Name 			control field
1076*5113495bSYour Name 
1077*5113495bSYour Name 
1078*5113495bSYour Name 
1079*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
1080*5113495bSYour Name 			indicates MPDUs with a QoS control field.
1081*5113495bSYour Name 
1082*5113495bSYour Name 
1083*5113495bSYour Name 
1084*5113495bSYour Name 
1085*5113495bSYour Name 
1086*5113495bSYour Name 			<legal all>
1087*5113495bSYour Name */
1088*5113495bSYour Name #define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000024
1089*5113495bSYour Name #define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
1090*5113495bSYour Name #define RX_REO_QUEUE_EXT_9_MPDU_LINK_POINTER_3_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
1091*5113495bSYour Name 
1092*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_4 */
1093*5113495bSYour Name 
1094*5113495bSYour Name 
1095*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
1096*5113495bSYour Name 
1097*5113495bSYour Name 
1098*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_10_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
1099*5113495bSYour Name 
1100*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
1101*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
1102*5113495bSYour Name 
1103*5113495bSYour Name 
1104*5113495bSYour Name 
1105*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1106*5113495bSYour Name 
1107*5113495bSYour Name 			<legal all>
1108*5113495bSYour Name */
1109*5113495bSYour Name #define RX_REO_QUEUE_EXT_10_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000028
1110*5113495bSYour Name #define RX_REO_QUEUE_EXT_10_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
1111*5113495bSYour Name #define RX_REO_QUEUE_EXT_10_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
1112*5113495bSYour Name 
1113*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
1114*5113495bSYour Name 
1115*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
1116*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
1117*5113495bSYour Name 
1118*5113495bSYour Name 
1119*5113495bSYour Name 
1120*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1121*5113495bSYour Name 
1122*5113495bSYour Name 			<legal all>
1123*5113495bSYour Name */
1124*5113495bSYour Name #define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000002c
1125*5113495bSYour Name #define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
1126*5113495bSYour Name #define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
1127*5113495bSYour Name 
1128*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
1129*5113495bSYour Name 
1130*5113495bSYour Name 			Consumer: WBM
1131*5113495bSYour Name 
1132*5113495bSYour Name 			Producer: SW/FW
1133*5113495bSYour Name 
1134*5113495bSYour Name 
1135*5113495bSYour Name 
1136*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1137*5113495bSYour Name 
1138*5113495bSYour Name 
1139*5113495bSYour Name 
1140*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
1141*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
1142*5113495bSYour Name 			pointed to shall be returned after the frame has been
1143*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
1144*5113495bSYour Name 
1145*5113495bSYour Name 
1146*5113495bSYour Name 
1147*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
1148*5113495bSYour Name 			to the WMB buffer idle list
1149*5113495bSYour Name 
1150*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
1151*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
1152*5113495bSYour Name 
1153*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
1154*5113495bSYour Name 
1155*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
1156*5113495bSYour Name 			ring 0
1157*5113495bSYour Name 
1158*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
1159*5113495bSYour Name 			ring 1
1160*5113495bSYour Name 
1161*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
1162*5113495bSYour Name 			ring 2
1163*5113495bSYour Name 
1164*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
1165*5113495bSYour Name 			ring 3
1166*5113495bSYour Name 
1167*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
1168*5113495bSYour Name 			ring 4
1169*5113495bSYour Name 
1170*5113495bSYour Name 
1171*5113495bSYour Name 
1172*5113495bSYour Name 			<legal all>
1173*5113495bSYour Name */
1174*5113495bSYour Name #define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000002c
1175*5113495bSYour Name #define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
1176*5113495bSYour Name #define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
1177*5113495bSYour Name 
1178*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
1179*5113495bSYour Name 
1180*5113495bSYour Name 			Cookie field exclusively used by SW.
1181*5113495bSYour Name 
1182*5113495bSYour Name 
1183*5113495bSYour Name 
1184*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1185*5113495bSYour Name 
1186*5113495bSYour Name 
1187*5113495bSYour Name 
1188*5113495bSYour Name 			HW ignores the contents, accept that it passes the
1189*5113495bSYour Name 			programmed value on to other descriptors together with the
1190*5113495bSYour Name 			physical address
1191*5113495bSYour Name 
1192*5113495bSYour Name 
1193*5113495bSYour Name 
1194*5113495bSYour Name 			Field can be used by SW to for example associate the
1195*5113495bSYour Name 			buffers physical address with the virtual address
1196*5113495bSYour Name 
1197*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
1198*5113495bSYour Name 			specification
1199*5113495bSYour Name 
1200*5113495bSYour Name 
1201*5113495bSYour Name 
1202*5113495bSYour Name 			NOTE1:
1203*5113495bSYour Name 
1204*5113495bSYour Name 			The three most significant bits can have a special
1205*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
1206*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
1207*5113495bSYour Name 
1208*5113495bSYour Name 
1209*5113495bSYour Name 
1210*5113495bSYour Name 			In case of NON punctured transmission:
1211*5113495bSYour Name 
1212*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
1213*5113495bSYour Name 
1214*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
1215*5113495bSYour Name 
1216*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
1217*5113495bSYour Name 
1218*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
1219*5113495bSYour Name 
1220*5113495bSYour Name 
1221*5113495bSYour Name 
1222*5113495bSYour Name 			In case of punctured transmission:
1223*5113495bSYour Name 
1224*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
1225*5113495bSYour Name 
1226*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
1227*5113495bSYour Name 
1228*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
1229*5113495bSYour Name 
1230*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
1231*5113495bSYour Name 
1232*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
1233*5113495bSYour Name 
1234*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
1235*5113495bSYour Name 
1236*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
1237*5113495bSYour Name 
1238*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
1239*5113495bSYour Name 
1240*5113495bSYour Name 
1241*5113495bSYour Name 
1242*5113495bSYour Name 			Note: a punctured transmission is indicated by the
1243*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
1244*5113495bSYour Name 			TLV
1245*5113495bSYour Name 
1246*5113495bSYour Name 
1247*5113495bSYour Name 
1248*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
1249*5113495bSYour Name 			meaning in case this struct is embedded in an
1250*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
1251*5113495bSYour Name 			configured for passing on the additional info
1252*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
1253*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
1254*5113495bSYour Name 			Moselle.
1255*5113495bSYour Name 
1256*5113495bSYour Name 
1257*5113495bSYour Name 
1258*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
1259*5113495bSYour Name 			control field
1260*5113495bSYour Name 
1261*5113495bSYour Name 
1262*5113495bSYour Name 
1263*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
1264*5113495bSYour Name 			indicates MPDUs with a QoS control field.
1265*5113495bSYour Name 
1266*5113495bSYour Name 
1267*5113495bSYour Name 
1268*5113495bSYour Name 
1269*5113495bSYour Name 
1270*5113495bSYour Name 			<legal all>
1271*5113495bSYour Name */
1272*5113495bSYour Name #define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000002c
1273*5113495bSYour Name #define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
1274*5113495bSYour Name #define RX_REO_QUEUE_EXT_11_MPDU_LINK_POINTER_4_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
1275*5113495bSYour Name 
1276*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_5 */
1277*5113495bSYour Name 
1278*5113495bSYour Name 
1279*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
1280*5113495bSYour Name 
1281*5113495bSYour Name 
1282*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_12_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
1283*5113495bSYour Name 
1284*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
1285*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
1286*5113495bSYour Name 
1287*5113495bSYour Name 
1288*5113495bSYour Name 
1289*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1290*5113495bSYour Name 
1291*5113495bSYour Name 			<legal all>
1292*5113495bSYour Name */
1293*5113495bSYour Name #define RX_REO_QUEUE_EXT_12_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000030
1294*5113495bSYour Name #define RX_REO_QUEUE_EXT_12_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
1295*5113495bSYour Name #define RX_REO_QUEUE_EXT_12_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
1296*5113495bSYour Name 
1297*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
1298*5113495bSYour Name 
1299*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
1300*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
1301*5113495bSYour Name 
1302*5113495bSYour Name 
1303*5113495bSYour Name 
1304*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1305*5113495bSYour Name 
1306*5113495bSYour Name 			<legal all>
1307*5113495bSYour Name */
1308*5113495bSYour Name #define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000034
1309*5113495bSYour Name #define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
1310*5113495bSYour Name #define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
1311*5113495bSYour Name 
1312*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
1313*5113495bSYour Name 
1314*5113495bSYour Name 			Consumer: WBM
1315*5113495bSYour Name 
1316*5113495bSYour Name 			Producer: SW/FW
1317*5113495bSYour Name 
1318*5113495bSYour Name 
1319*5113495bSYour Name 
1320*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1321*5113495bSYour Name 
1322*5113495bSYour Name 
1323*5113495bSYour Name 
1324*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
1325*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
1326*5113495bSYour Name 			pointed to shall be returned after the frame has been
1327*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
1328*5113495bSYour Name 
1329*5113495bSYour Name 
1330*5113495bSYour Name 
1331*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
1332*5113495bSYour Name 			to the WMB buffer idle list
1333*5113495bSYour Name 
1334*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
1335*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
1336*5113495bSYour Name 
1337*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
1338*5113495bSYour Name 
1339*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
1340*5113495bSYour Name 			ring 0
1341*5113495bSYour Name 
1342*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
1343*5113495bSYour Name 			ring 1
1344*5113495bSYour Name 
1345*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
1346*5113495bSYour Name 			ring 2
1347*5113495bSYour Name 
1348*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
1349*5113495bSYour Name 			ring 3
1350*5113495bSYour Name 
1351*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
1352*5113495bSYour Name 			ring 4
1353*5113495bSYour Name 
1354*5113495bSYour Name 
1355*5113495bSYour Name 
1356*5113495bSYour Name 			<legal all>
1357*5113495bSYour Name */
1358*5113495bSYour Name #define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000034
1359*5113495bSYour Name #define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
1360*5113495bSYour Name #define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
1361*5113495bSYour Name 
1362*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
1363*5113495bSYour Name 
1364*5113495bSYour Name 			Cookie field exclusively used by SW.
1365*5113495bSYour Name 
1366*5113495bSYour Name 
1367*5113495bSYour Name 
1368*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1369*5113495bSYour Name 
1370*5113495bSYour Name 
1371*5113495bSYour Name 
1372*5113495bSYour Name 			HW ignores the contents, accept that it passes the
1373*5113495bSYour Name 			programmed value on to other descriptors together with the
1374*5113495bSYour Name 			physical address
1375*5113495bSYour Name 
1376*5113495bSYour Name 
1377*5113495bSYour Name 
1378*5113495bSYour Name 			Field can be used by SW to for example associate the
1379*5113495bSYour Name 			buffers physical address with the virtual address
1380*5113495bSYour Name 
1381*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
1382*5113495bSYour Name 			specification
1383*5113495bSYour Name 
1384*5113495bSYour Name 
1385*5113495bSYour Name 
1386*5113495bSYour Name 			NOTE1:
1387*5113495bSYour Name 
1388*5113495bSYour Name 			The three most significant bits can have a special
1389*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
1390*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
1391*5113495bSYour Name 
1392*5113495bSYour Name 
1393*5113495bSYour Name 
1394*5113495bSYour Name 			In case of NON punctured transmission:
1395*5113495bSYour Name 
1396*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
1397*5113495bSYour Name 
1398*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
1399*5113495bSYour Name 
1400*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
1401*5113495bSYour Name 
1402*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
1403*5113495bSYour Name 
1404*5113495bSYour Name 
1405*5113495bSYour Name 
1406*5113495bSYour Name 			In case of punctured transmission:
1407*5113495bSYour Name 
1408*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
1409*5113495bSYour Name 
1410*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
1411*5113495bSYour Name 
1412*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
1413*5113495bSYour Name 
1414*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
1415*5113495bSYour Name 
1416*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
1417*5113495bSYour Name 
1418*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
1419*5113495bSYour Name 
1420*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
1421*5113495bSYour Name 
1422*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
1423*5113495bSYour Name 
1424*5113495bSYour Name 
1425*5113495bSYour Name 
1426*5113495bSYour Name 			Note: a punctured transmission is indicated by the
1427*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
1428*5113495bSYour Name 			TLV
1429*5113495bSYour Name 
1430*5113495bSYour Name 
1431*5113495bSYour Name 
1432*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
1433*5113495bSYour Name 			meaning in case this struct is embedded in an
1434*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
1435*5113495bSYour Name 			configured for passing on the additional info
1436*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
1437*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
1438*5113495bSYour Name 			Moselle.
1439*5113495bSYour Name 
1440*5113495bSYour Name 
1441*5113495bSYour Name 
1442*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
1443*5113495bSYour Name 			control field
1444*5113495bSYour Name 
1445*5113495bSYour Name 
1446*5113495bSYour Name 
1447*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
1448*5113495bSYour Name 			indicates MPDUs with a QoS control field.
1449*5113495bSYour Name 
1450*5113495bSYour Name 
1451*5113495bSYour Name 
1452*5113495bSYour Name 
1453*5113495bSYour Name 
1454*5113495bSYour Name 			<legal all>
1455*5113495bSYour Name */
1456*5113495bSYour Name #define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000034
1457*5113495bSYour Name #define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
1458*5113495bSYour Name #define RX_REO_QUEUE_EXT_13_MPDU_LINK_POINTER_5_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
1459*5113495bSYour Name 
1460*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_6 */
1461*5113495bSYour Name 
1462*5113495bSYour Name 
1463*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
1464*5113495bSYour Name 
1465*5113495bSYour Name 
1466*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_14_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
1467*5113495bSYour Name 
1468*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
1469*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
1470*5113495bSYour Name 
1471*5113495bSYour Name 
1472*5113495bSYour Name 
1473*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1474*5113495bSYour Name 
1475*5113495bSYour Name 			<legal all>
1476*5113495bSYour Name */
1477*5113495bSYour Name #define RX_REO_QUEUE_EXT_14_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000038
1478*5113495bSYour Name #define RX_REO_QUEUE_EXT_14_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
1479*5113495bSYour Name #define RX_REO_QUEUE_EXT_14_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
1480*5113495bSYour Name 
1481*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
1482*5113495bSYour Name 
1483*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
1484*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
1485*5113495bSYour Name 
1486*5113495bSYour Name 
1487*5113495bSYour Name 
1488*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1489*5113495bSYour Name 
1490*5113495bSYour Name 			<legal all>
1491*5113495bSYour Name */
1492*5113495bSYour Name #define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000003c
1493*5113495bSYour Name #define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
1494*5113495bSYour Name #define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
1495*5113495bSYour Name 
1496*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
1497*5113495bSYour Name 
1498*5113495bSYour Name 			Consumer: WBM
1499*5113495bSYour Name 
1500*5113495bSYour Name 			Producer: SW/FW
1501*5113495bSYour Name 
1502*5113495bSYour Name 
1503*5113495bSYour Name 
1504*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1505*5113495bSYour Name 
1506*5113495bSYour Name 
1507*5113495bSYour Name 
1508*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
1509*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
1510*5113495bSYour Name 			pointed to shall be returned after the frame has been
1511*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
1512*5113495bSYour Name 
1513*5113495bSYour Name 
1514*5113495bSYour Name 
1515*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
1516*5113495bSYour Name 			to the WMB buffer idle list
1517*5113495bSYour Name 
1518*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
1519*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
1520*5113495bSYour Name 
1521*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
1522*5113495bSYour Name 
1523*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
1524*5113495bSYour Name 			ring 0
1525*5113495bSYour Name 
1526*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
1527*5113495bSYour Name 			ring 1
1528*5113495bSYour Name 
1529*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
1530*5113495bSYour Name 			ring 2
1531*5113495bSYour Name 
1532*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
1533*5113495bSYour Name 			ring 3
1534*5113495bSYour Name 
1535*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
1536*5113495bSYour Name 			ring 4
1537*5113495bSYour Name 
1538*5113495bSYour Name 
1539*5113495bSYour Name 
1540*5113495bSYour Name 			<legal all>
1541*5113495bSYour Name */
1542*5113495bSYour Name #define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000003c
1543*5113495bSYour Name #define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
1544*5113495bSYour Name #define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
1545*5113495bSYour Name 
1546*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
1547*5113495bSYour Name 
1548*5113495bSYour Name 			Cookie field exclusively used by SW.
1549*5113495bSYour Name 
1550*5113495bSYour Name 
1551*5113495bSYour Name 
1552*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1553*5113495bSYour Name 
1554*5113495bSYour Name 
1555*5113495bSYour Name 
1556*5113495bSYour Name 			HW ignores the contents, accept that it passes the
1557*5113495bSYour Name 			programmed value on to other descriptors together with the
1558*5113495bSYour Name 			physical address
1559*5113495bSYour Name 
1560*5113495bSYour Name 
1561*5113495bSYour Name 
1562*5113495bSYour Name 			Field can be used by SW to for example associate the
1563*5113495bSYour Name 			buffers physical address with the virtual address
1564*5113495bSYour Name 
1565*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
1566*5113495bSYour Name 			specification
1567*5113495bSYour Name 
1568*5113495bSYour Name 
1569*5113495bSYour Name 
1570*5113495bSYour Name 			NOTE1:
1571*5113495bSYour Name 
1572*5113495bSYour Name 			The three most significant bits can have a special
1573*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
1574*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
1575*5113495bSYour Name 
1576*5113495bSYour Name 
1577*5113495bSYour Name 
1578*5113495bSYour Name 			In case of NON punctured transmission:
1579*5113495bSYour Name 
1580*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
1581*5113495bSYour Name 
1582*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
1583*5113495bSYour Name 
1584*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
1585*5113495bSYour Name 
1586*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
1587*5113495bSYour Name 
1588*5113495bSYour Name 
1589*5113495bSYour Name 
1590*5113495bSYour Name 			In case of punctured transmission:
1591*5113495bSYour Name 
1592*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
1593*5113495bSYour Name 
1594*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
1595*5113495bSYour Name 
1596*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
1597*5113495bSYour Name 
1598*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
1599*5113495bSYour Name 
1600*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
1601*5113495bSYour Name 
1602*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
1603*5113495bSYour Name 
1604*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
1605*5113495bSYour Name 
1606*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
1607*5113495bSYour Name 
1608*5113495bSYour Name 
1609*5113495bSYour Name 
1610*5113495bSYour Name 			Note: a punctured transmission is indicated by the
1611*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
1612*5113495bSYour Name 			TLV
1613*5113495bSYour Name 
1614*5113495bSYour Name 
1615*5113495bSYour Name 
1616*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
1617*5113495bSYour Name 			meaning in case this struct is embedded in an
1618*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
1619*5113495bSYour Name 			configured for passing on the additional info
1620*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
1621*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
1622*5113495bSYour Name 			Moselle.
1623*5113495bSYour Name 
1624*5113495bSYour Name 
1625*5113495bSYour Name 
1626*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
1627*5113495bSYour Name 			control field
1628*5113495bSYour Name 
1629*5113495bSYour Name 
1630*5113495bSYour Name 
1631*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
1632*5113495bSYour Name 			indicates MPDUs with a QoS control field.
1633*5113495bSYour Name 
1634*5113495bSYour Name 
1635*5113495bSYour Name 
1636*5113495bSYour Name 
1637*5113495bSYour Name 
1638*5113495bSYour Name 			<legal all>
1639*5113495bSYour Name */
1640*5113495bSYour Name #define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000003c
1641*5113495bSYour Name #define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
1642*5113495bSYour Name #define RX_REO_QUEUE_EXT_15_MPDU_LINK_POINTER_6_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
1643*5113495bSYour Name 
1644*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_7 */
1645*5113495bSYour Name 
1646*5113495bSYour Name 
1647*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
1648*5113495bSYour Name 
1649*5113495bSYour Name 
1650*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_16_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
1651*5113495bSYour Name 
1652*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
1653*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
1654*5113495bSYour Name 
1655*5113495bSYour Name 
1656*5113495bSYour Name 
1657*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1658*5113495bSYour Name 
1659*5113495bSYour Name 			<legal all>
1660*5113495bSYour Name */
1661*5113495bSYour Name #define RX_REO_QUEUE_EXT_16_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000040
1662*5113495bSYour Name #define RX_REO_QUEUE_EXT_16_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
1663*5113495bSYour Name #define RX_REO_QUEUE_EXT_16_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
1664*5113495bSYour Name 
1665*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
1666*5113495bSYour Name 
1667*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
1668*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
1669*5113495bSYour Name 
1670*5113495bSYour Name 
1671*5113495bSYour Name 
1672*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1673*5113495bSYour Name 
1674*5113495bSYour Name 			<legal all>
1675*5113495bSYour Name */
1676*5113495bSYour Name #define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000044
1677*5113495bSYour Name #define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
1678*5113495bSYour Name #define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
1679*5113495bSYour Name 
1680*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
1681*5113495bSYour Name 
1682*5113495bSYour Name 			Consumer: WBM
1683*5113495bSYour Name 
1684*5113495bSYour Name 			Producer: SW/FW
1685*5113495bSYour Name 
1686*5113495bSYour Name 
1687*5113495bSYour Name 
1688*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1689*5113495bSYour Name 
1690*5113495bSYour Name 
1691*5113495bSYour Name 
1692*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
1693*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
1694*5113495bSYour Name 			pointed to shall be returned after the frame has been
1695*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
1696*5113495bSYour Name 
1697*5113495bSYour Name 
1698*5113495bSYour Name 
1699*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
1700*5113495bSYour Name 			to the WMB buffer idle list
1701*5113495bSYour Name 
1702*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
1703*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
1704*5113495bSYour Name 
1705*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
1706*5113495bSYour Name 
1707*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
1708*5113495bSYour Name 			ring 0
1709*5113495bSYour Name 
1710*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
1711*5113495bSYour Name 			ring 1
1712*5113495bSYour Name 
1713*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
1714*5113495bSYour Name 			ring 2
1715*5113495bSYour Name 
1716*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
1717*5113495bSYour Name 			ring 3
1718*5113495bSYour Name 
1719*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
1720*5113495bSYour Name 			ring 4
1721*5113495bSYour Name 
1722*5113495bSYour Name 
1723*5113495bSYour Name 
1724*5113495bSYour Name 			<legal all>
1725*5113495bSYour Name */
1726*5113495bSYour Name #define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000044
1727*5113495bSYour Name #define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
1728*5113495bSYour Name #define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
1729*5113495bSYour Name 
1730*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
1731*5113495bSYour Name 
1732*5113495bSYour Name 			Cookie field exclusively used by SW.
1733*5113495bSYour Name 
1734*5113495bSYour Name 
1735*5113495bSYour Name 
1736*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1737*5113495bSYour Name 
1738*5113495bSYour Name 
1739*5113495bSYour Name 
1740*5113495bSYour Name 			HW ignores the contents, accept that it passes the
1741*5113495bSYour Name 			programmed value on to other descriptors together with the
1742*5113495bSYour Name 			physical address
1743*5113495bSYour Name 
1744*5113495bSYour Name 
1745*5113495bSYour Name 
1746*5113495bSYour Name 			Field can be used by SW to for example associate the
1747*5113495bSYour Name 			buffers physical address with the virtual address
1748*5113495bSYour Name 
1749*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
1750*5113495bSYour Name 			specification
1751*5113495bSYour Name 
1752*5113495bSYour Name 
1753*5113495bSYour Name 
1754*5113495bSYour Name 			NOTE1:
1755*5113495bSYour Name 
1756*5113495bSYour Name 			The three most significant bits can have a special
1757*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
1758*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
1759*5113495bSYour Name 
1760*5113495bSYour Name 
1761*5113495bSYour Name 
1762*5113495bSYour Name 			In case of NON punctured transmission:
1763*5113495bSYour Name 
1764*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
1765*5113495bSYour Name 
1766*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
1767*5113495bSYour Name 
1768*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
1769*5113495bSYour Name 
1770*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
1771*5113495bSYour Name 
1772*5113495bSYour Name 
1773*5113495bSYour Name 
1774*5113495bSYour Name 			In case of punctured transmission:
1775*5113495bSYour Name 
1776*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
1777*5113495bSYour Name 
1778*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
1779*5113495bSYour Name 
1780*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
1781*5113495bSYour Name 
1782*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
1783*5113495bSYour Name 
1784*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
1785*5113495bSYour Name 
1786*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
1787*5113495bSYour Name 
1788*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
1789*5113495bSYour Name 
1790*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
1791*5113495bSYour Name 
1792*5113495bSYour Name 
1793*5113495bSYour Name 
1794*5113495bSYour Name 			Note: a punctured transmission is indicated by the
1795*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
1796*5113495bSYour Name 			TLV
1797*5113495bSYour Name 
1798*5113495bSYour Name 
1799*5113495bSYour Name 
1800*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
1801*5113495bSYour Name 			meaning in case this struct is embedded in an
1802*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
1803*5113495bSYour Name 			configured for passing on the additional info
1804*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
1805*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
1806*5113495bSYour Name 			Moselle.
1807*5113495bSYour Name 
1808*5113495bSYour Name 
1809*5113495bSYour Name 
1810*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
1811*5113495bSYour Name 			control field
1812*5113495bSYour Name 
1813*5113495bSYour Name 
1814*5113495bSYour Name 
1815*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
1816*5113495bSYour Name 			indicates MPDUs with a QoS control field.
1817*5113495bSYour Name 
1818*5113495bSYour Name 
1819*5113495bSYour Name 
1820*5113495bSYour Name 
1821*5113495bSYour Name 
1822*5113495bSYour Name 			<legal all>
1823*5113495bSYour Name */
1824*5113495bSYour Name #define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000044
1825*5113495bSYour Name #define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
1826*5113495bSYour Name #define RX_REO_QUEUE_EXT_17_MPDU_LINK_POINTER_7_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
1827*5113495bSYour Name 
1828*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_8 */
1829*5113495bSYour Name 
1830*5113495bSYour Name 
1831*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
1832*5113495bSYour Name 
1833*5113495bSYour Name 
1834*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_18_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
1835*5113495bSYour Name 
1836*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
1837*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
1838*5113495bSYour Name 
1839*5113495bSYour Name 
1840*5113495bSYour Name 
1841*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1842*5113495bSYour Name 
1843*5113495bSYour Name 			<legal all>
1844*5113495bSYour Name */
1845*5113495bSYour Name #define RX_REO_QUEUE_EXT_18_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000048
1846*5113495bSYour Name #define RX_REO_QUEUE_EXT_18_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
1847*5113495bSYour Name #define RX_REO_QUEUE_EXT_18_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
1848*5113495bSYour Name 
1849*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
1850*5113495bSYour Name 
1851*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
1852*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
1853*5113495bSYour Name 
1854*5113495bSYour Name 
1855*5113495bSYour Name 
1856*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1857*5113495bSYour Name 
1858*5113495bSYour Name 			<legal all>
1859*5113495bSYour Name */
1860*5113495bSYour Name #define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000004c
1861*5113495bSYour Name #define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
1862*5113495bSYour Name #define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
1863*5113495bSYour Name 
1864*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
1865*5113495bSYour Name 
1866*5113495bSYour Name 			Consumer: WBM
1867*5113495bSYour Name 
1868*5113495bSYour Name 			Producer: SW/FW
1869*5113495bSYour Name 
1870*5113495bSYour Name 
1871*5113495bSYour Name 
1872*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1873*5113495bSYour Name 
1874*5113495bSYour Name 
1875*5113495bSYour Name 
1876*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
1877*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
1878*5113495bSYour Name 			pointed to shall be returned after the frame has been
1879*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
1880*5113495bSYour Name 
1881*5113495bSYour Name 
1882*5113495bSYour Name 
1883*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
1884*5113495bSYour Name 			to the WMB buffer idle list
1885*5113495bSYour Name 
1886*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
1887*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
1888*5113495bSYour Name 
1889*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
1890*5113495bSYour Name 
1891*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
1892*5113495bSYour Name 			ring 0
1893*5113495bSYour Name 
1894*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
1895*5113495bSYour Name 			ring 1
1896*5113495bSYour Name 
1897*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
1898*5113495bSYour Name 			ring 2
1899*5113495bSYour Name 
1900*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
1901*5113495bSYour Name 			ring 3
1902*5113495bSYour Name 
1903*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
1904*5113495bSYour Name 			ring 4
1905*5113495bSYour Name 
1906*5113495bSYour Name 
1907*5113495bSYour Name 
1908*5113495bSYour Name 			<legal all>
1909*5113495bSYour Name */
1910*5113495bSYour Name #define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000004c
1911*5113495bSYour Name #define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
1912*5113495bSYour Name #define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
1913*5113495bSYour Name 
1914*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
1915*5113495bSYour Name 
1916*5113495bSYour Name 			Cookie field exclusively used by SW.
1917*5113495bSYour Name 
1918*5113495bSYour Name 
1919*5113495bSYour Name 
1920*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
1921*5113495bSYour Name 
1922*5113495bSYour Name 
1923*5113495bSYour Name 
1924*5113495bSYour Name 			HW ignores the contents, accept that it passes the
1925*5113495bSYour Name 			programmed value on to other descriptors together with the
1926*5113495bSYour Name 			physical address
1927*5113495bSYour Name 
1928*5113495bSYour Name 
1929*5113495bSYour Name 
1930*5113495bSYour Name 			Field can be used by SW to for example associate the
1931*5113495bSYour Name 			buffers physical address with the virtual address
1932*5113495bSYour Name 
1933*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
1934*5113495bSYour Name 			specification
1935*5113495bSYour Name 
1936*5113495bSYour Name 
1937*5113495bSYour Name 
1938*5113495bSYour Name 			NOTE1:
1939*5113495bSYour Name 
1940*5113495bSYour Name 			The three most significant bits can have a special
1941*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
1942*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
1943*5113495bSYour Name 
1944*5113495bSYour Name 
1945*5113495bSYour Name 
1946*5113495bSYour Name 			In case of NON punctured transmission:
1947*5113495bSYour Name 
1948*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
1949*5113495bSYour Name 
1950*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
1951*5113495bSYour Name 
1952*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
1953*5113495bSYour Name 
1954*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
1955*5113495bSYour Name 
1956*5113495bSYour Name 
1957*5113495bSYour Name 
1958*5113495bSYour Name 			In case of punctured transmission:
1959*5113495bSYour Name 
1960*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
1961*5113495bSYour Name 
1962*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
1963*5113495bSYour Name 
1964*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
1965*5113495bSYour Name 
1966*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
1967*5113495bSYour Name 
1968*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
1969*5113495bSYour Name 
1970*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
1971*5113495bSYour Name 
1972*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
1973*5113495bSYour Name 
1974*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
1975*5113495bSYour Name 
1976*5113495bSYour Name 
1977*5113495bSYour Name 
1978*5113495bSYour Name 			Note: a punctured transmission is indicated by the
1979*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
1980*5113495bSYour Name 			TLV
1981*5113495bSYour Name 
1982*5113495bSYour Name 
1983*5113495bSYour Name 
1984*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
1985*5113495bSYour Name 			meaning in case this struct is embedded in an
1986*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
1987*5113495bSYour Name 			configured for passing on the additional info
1988*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
1989*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
1990*5113495bSYour Name 			Moselle.
1991*5113495bSYour Name 
1992*5113495bSYour Name 
1993*5113495bSYour Name 
1994*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
1995*5113495bSYour Name 			control field
1996*5113495bSYour Name 
1997*5113495bSYour Name 
1998*5113495bSYour Name 
1999*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
2000*5113495bSYour Name 			indicates MPDUs with a QoS control field.
2001*5113495bSYour Name 
2002*5113495bSYour Name 
2003*5113495bSYour Name 
2004*5113495bSYour Name 
2005*5113495bSYour Name 
2006*5113495bSYour Name 			<legal all>
2007*5113495bSYour Name */
2008*5113495bSYour Name #define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000004c
2009*5113495bSYour Name #define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
2010*5113495bSYour Name #define RX_REO_QUEUE_EXT_19_MPDU_LINK_POINTER_8_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
2011*5113495bSYour Name 
2012*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_9 */
2013*5113495bSYour Name 
2014*5113495bSYour Name 
2015*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
2016*5113495bSYour Name 
2017*5113495bSYour Name 
2018*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_20_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
2019*5113495bSYour Name 
2020*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
2021*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2022*5113495bSYour Name 
2023*5113495bSYour Name 
2024*5113495bSYour Name 
2025*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2026*5113495bSYour Name 
2027*5113495bSYour Name 			<legal all>
2028*5113495bSYour Name */
2029*5113495bSYour Name #define RX_REO_QUEUE_EXT_20_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000050
2030*5113495bSYour Name #define RX_REO_QUEUE_EXT_20_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
2031*5113495bSYour Name #define RX_REO_QUEUE_EXT_20_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
2032*5113495bSYour Name 
2033*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
2034*5113495bSYour Name 
2035*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
2036*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2037*5113495bSYour Name 
2038*5113495bSYour Name 
2039*5113495bSYour Name 
2040*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2041*5113495bSYour Name 
2042*5113495bSYour Name 			<legal all>
2043*5113495bSYour Name */
2044*5113495bSYour Name #define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000054
2045*5113495bSYour Name #define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
2046*5113495bSYour Name #define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
2047*5113495bSYour Name 
2048*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
2049*5113495bSYour Name 
2050*5113495bSYour Name 			Consumer: WBM
2051*5113495bSYour Name 
2052*5113495bSYour Name 			Producer: SW/FW
2053*5113495bSYour Name 
2054*5113495bSYour Name 
2055*5113495bSYour Name 
2056*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2057*5113495bSYour Name 
2058*5113495bSYour Name 
2059*5113495bSYour Name 
2060*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
2061*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
2062*5113495bSYour Name 			pointed to shall be returned after the frame has been
2063*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
2064*5113495bSYour Name 
2065*5113495bSYour Name 
2066*5113495bSYour Name 
2067*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
2068*5113495bSYour Name 			to the WMB buffer idle list
2069*5113495bSYour Name 
2070*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
2071*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
2072*5113495bSYour Name 
2073*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
2074*5113495bSYour Name 
2075*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
2076*5113495bSYour Name 			ring 0
2077*5113495bSYour Name 
2078*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
2079*5113495bSYour Name 			ring 1
2080*5113495bSYour Name 
2081*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
2082*5113495bSYour Name 			ring 2
2083*5113495bSYour Name 
2084*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
2085*5113495bSYour Name 			ring 3
2086*5113495bSYour Name 
2087*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
2088*5113495bSYour Name 			ring 4
2089*5113495bSYour Name 
2090*5113495bSYour Name 
2091*5113495bSYour Name 
2092*5113495bSYour Name 			<legal all>
2093*5113495bSYour Name */
2094*5113495bSYour Name #define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000054
2095*5113495bSYour Name #define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
2096*5113495bSYour Name #define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
2097*5113495bSYour Name 
2098*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
2099*5113495bSYour Name 
2100*5113495bSYour Name 			Cookie field exclusively used by SW.
2101*5113495bSYour Name 
2102*5113495bSYour Name 
2103*5113495bSYour Name 
2104*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2105*5113495bSYour Name 
2106*5113495bSYour Name 
2107*5113495bSYour Name 
2108*5113495bSYour Name 			HW ignores the contents, accept that it passes the
2109*5113495bSYour Name 			programmed value on to other descriptors together with the
2110*5113495bSYour Name 			physical address
2111*5113495bSYour Name 
2112*5113495bSYour Name 
2113*5113495bSYour Name 
2114*5113495bSYour Name 			Field can be used by SW to for example associate the
2115*5113495bSYour Name 			buffers physical address with the virtual address
2116*5113495bSYour Name 
2117*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
2118*5113495bSYour Name 			specification
2119*5113495bSYour Name 
2120*5113495bSYour Name 
2121*5113495bSYour Name 
2122*5113495bSYour Name 			NOTE1:
2123*5113495bSYour Name 
2124*5113495bSYour Name 			The three most significant bits can have a special
2125*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
2126*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
2127*5113495bSYour Name 
2128*5113495bSYour Name 
2129*5113495bSYour Name 
2130*5113495bSYour Name 			In case of NON punctured transmission:
2131*5113495bSYour Name 
2132*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
2133*5113495bSYour Name 
2134*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
2135*5113495bSYour Name 
2136*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
2137*5113495bSYour Name 
2138*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
2139*5113495bSYour Name 
2140*5113495bSYour Name 
2141*5113495bSYour Name 
2142*5113495bSYour Name 			In case of punctured transmission:
2143*5113495bSYour Name 
2144*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
2145*5113495bSYour Name 
2146*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
2147*5113495bSYour Name 
2148*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
2149*5113495bSYour Name 
2150*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
2151*5113495bSYour Name 
2152*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
2153*5113495bSYour Name 
2154*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
2155*5113495bSYour Name 
2156*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
2157*5113495bSYour Name 
2158*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
2159*5113495bSYour Name 
2160*5113495bSYour Name 
2161*5113495bSYour Name 
2162*5113495bSYour Name 			Note: a punctured transmission is indicated by the
2163*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
2164*5113495bSYour Name 			TLV
2165*5113495bSYour Name 
2166*5113495bSYour Name 
2167*5113495bSYour Name 
2168*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
2169*5113495bSYour Name 			meaning in case this struct is embedded in an
2170*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
2171*5113495bSYour Name 			configured for passing on the additional info
2172*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
2173*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
2174*5113495bSYour Name 			Moselle.
2175*5113495bSYour Name 
2176*5113495bSYour Name 
2177*5113495bSYour Name 
2178*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
2179*5113495bSYour Name 			control field
2180*5113495bSYour Name 
2181*5113495bSYour Name 
2182*5113495bSYour Name 
2183*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
2184*5113495bSYour Name 			indicates MPDUs with a QoS control field.
2185*5113495bSYour Name 
2186*5113495bSYour Name 
2187*5113495bSYour Name 
2188*5113495bSYour Name 
2189*5113495bSYour Name 
2190*5113495bSYour Name 			<legal all>
2191*5113495bSYour Name */
2192*5113495bSYour Name #define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000054
2193*5113495bSYour Name #define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
2194*5113495bSYour Name #define RX_REO_QUEUE_EXT_21_MPDU_LINK_POINTER_9_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
2195*5113495bSYour Name 
2196*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_10 */
2197*5113495bSYour Name 
2198*5113495bSYour Name 
2199*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
2200*5113495bSYour Name 
2201*5113495bSYour Name 
2202*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_22_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
2203*5113495bSYour Name 
2204*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
2205*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2206*5113495bSYour Name 
2207*5113495bSYour Name 
2208*5113495bSYour Name 
2209*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2210*5113495bSYour Name 
2211*5113495bSYour Name 			<legal all>
2212*5113495bSYour Name */
2213*5113495bSYour Name #define RX_REO_QUEUE_EXT_22_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000058
2214*5113495bSYour Name #define RX_REO_QUEUE_EXT_22_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
2215*5113495bSYour Name #define RX_REO_QUEUE_EXT_22_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
2216*5113495bSYour Name 
2217*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
2218*5113495bSYour Name 
2219*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
2220*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2221*5113495bSYour Name 
2222*5113495bSYour Name 
2223*5113495bSYour Name 
2224*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2225*5113495bSYour Name 
2226*5113495bSYour Name 			<legal all>
2227*5113495bSYour Name */
2228*5113495bSYour Name #define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000005c
2229*5113495bSYour Name #define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
2230*5113495bSYour Name #define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
2231*5113495bSYour Name 
2232*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
2233*5113495bSYour Name 
2234*5113495bSYour Name 			Consumer: WBM
2235*5113495bSYour Name 
2236*5113495bSYour Name 			Producer: SW/FW
2237*5113495bSYour Name 
2238*5113495bSYour Name 
2239*5113495bSYour Name 
2240*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2241*5113495bSYour Name 
2242*5113495bSYour Name 
2243*5113495bSYour Name 
2244*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
2245*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
2246*5113495bSYour Name 			pointed to shall be returned after the frame has been
2247*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
2248*5113495bSYour Name 
2249*5113495bSYour Name 
2250*5113495bSYour Name 
2251*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
2252*5113495bSYour Name 			to the WMB buffer idle list
2253*5113495bSYour Name 
2254*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
2255*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
2256*5113495bSYour Name 
2257*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
2258*5113495bSYour Name 
2259*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
2260*5113495bSYour Name 			ring 0
2261*5113495bSYour Name 
2262*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
2263*5113495bSYour Name 			ring 1
2264*5113495bSYour Name 
2265*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
2266*5113495bSYour Name 			ring 2
2267*5113495bSYour Name 
2268*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
2269*5113495bSYour Name 			ring 3
2270*5113495bSYour Name 
2271*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
2272*5113495bSYour Name 			ring 4
2273*5113495bSYour Name 
2274*5113495bSYour Name 
2275*5113495bSYour Name 
2276*5113495bSYour Name 			<legal all>
2277*5113495bSYour Name */
2278*5113495bSYour Name #define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000005c
2279*5113495bSYour Name #define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
2280*5113495bSYour Name #define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
2281*5113495bSYour Name 
2282*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
2283*5113495bSYour Name 
2284*5113495bSYour Name 			Cookie field exclusively used by SW.
2285*5113495bSYour Name 
2286*5113495bSYour Name 
2287*5113495bSYour Name 
2288*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2289*5113495bSYour Name 
2290*5113495bSYour Name 
2291*5113495bSYour Name 
2292*5113495bSYour Name 			HW ignores the contents, accept that it passes the
2293*5113495bSYour Name 			programmed value on to other descriptors together with the
2294*5113495bSYour Name 			physical address
2295*5113495bSYour Name 
2296*5113495bSYour Name 
2297*5113495bSYour Name 
2298*5113495bSYour Name 			Field can be used by SW to for example associate the
2299*5113495bSYour Name 			buffers physical address with the virtual address
2300*5113495bSYour Name 
2301*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
2302*5113495bSYour Name 			specification
2303*5113495bSYour Name 
2304*5113495bSYour Name 
2305*5113495bSYour Name 
2306*5113495bSYour Name 			NOTE1:
2307*5113495bSYour Name 
2308*5113495bSYour Name 			The three most significant bits can have a special
2309*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
2310*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
2311*5113495bSYour Name 
2312*5113495bSYour Name 
2313*5113495bSYour Name 
2314*5113495bSYour Name 			In case of NON punctured transmission:
2315*5113495bSYour Name 
2316*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
2317*5113495bSYour Name 
2318*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
2319*5113495bSYour Name 
2320*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
2321*5113495bSYour Name 
2322*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
2323*5113495bSYour Name 
2324*5113495bSYour Name 
2325*5113495bSYour Name 
2326*5113495bSYour Name 			In case of punctured transmission:
2327*5113495bSYour Name 
2328*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
2329*5113495bSYour Name 
2330*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
2331*5113495bSYour Name 
2332*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
2333*5113495bSYour Name 
2334*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
2335*5113495bSYour Name 
2336*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
2337*5113495bSYour Name 
2338*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
2339*5113495bSYour Name 
2340*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
2341*5113495bSYour Name 
2342*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
2343*5113495bSYour Name 
2344*5113495bSYour Name 
2345*5113495bSYour Name 
2346*5113495bSYour Name 			Note: a punctured transmission is indicated by the
2347*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
2348*5113495bSYour Name 			TLV
2349*5113495bSYour Name 
2350*5113495bSYour Name 
2351*5113495bSYour Name 
2352*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
2353*5113495bSYour Name 			meaning in case this struct is embedded in an
2354*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
2355*5113495bSYour Name 			configured for passing on the additional info
2356*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
2357*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
2358*5113495bSYour Name 			Moselle.
2359*5113495bSYour Name 
2360*5113495bSYour Name 
2361*5113495bSYour Name 
2362*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
2363*5113495bSYour Name 			control field
2364*5113495bSYour Name 
2365*5113495bSYour Name 
2366*5113495bSYour Name 
2367*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
2368*5113495bSYour Name 			indicates MPDUs with a QoS control field.
2369*5113495bSYour Name 
2370*5113495bSYour Name 
2371*5113495bSYour Name 
2372*5113495bSYour Name 
2373*5113495bSYour Name 
2374*5113495bSYour Name 			<legal all>
2375*5113495bSYour Name */
2376*5113495bSYour Name #define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000005c
2377*5113495bSYour Name #define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
2378*5113495bSYour Name #define RX_REO_QUEUE_EXT_23_MPDU_LINK_POINTER_10_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
2379*5113495bSYour Name 
2380*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_11 */
2381*5113495bSYour Name 
2382*5113495bSYour Name 
2383*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
2384*5113495bSYour Name 
2385*5113495bSYour Name 
2386*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_24_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
2387*5113495bSYour Name 
2388*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
2389*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2390*5113495bSYour Name 
2391*5113495bSYour Name 
2392*5113495bSYour Name 
2393*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2394*5113495bSYour Name 
2395*5113495bSYour Name 			<legal all>
2396*5113495bSYour Name */
2397*5113495bSYour Name #define RX_REO_QUEUE_EXT_24_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000060
2398*5113495bSYour Name #define RX_REO_QUEUE_EXT_24_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
2399*5113495bSYour Name #define RX_REO_QUEUE_EXT_24_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
2400*5113495bSYour Name 
2401*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
2402*5113495bSYour Name 
2403*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
2404*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2405*5113495bSYour Name 
2406*5113495bSYour Name 
2407*5113495bSYour Name 
2408*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2409*5113495bSYour Name 
2410*5113495bSYour Name 			<legal all>
2411*5113495bSYour Name */
2412*5113495bSYour Name #define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000064
2413*5113495bSYour Name #define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
2414*5113495bSYour Name #define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
2415*5113495bSYour Name 
2416*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
2417*5113495bSYour Name 
2418*5113495bSYour Name 			Consumer: WBM
2419*5113495bSYour Name 
2420*5113495bSYour Name 			Producer: SW/FW
2421*5113495bSYour Name 
2422*5113495bSYour Name 
2423*5113495bSYour Name 
2424*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2425*5113495bSYour Name 
2426*5113495bSYour Name 
2427*5113495bSYour Name 
2428*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
2429*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
2430*5113495bSYour Name 			pointed to shall be returned after the frame has been
2431*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
2432*5113495bSYour Name 
2433*5113495bSYour Name 
2434*5113495bSYour Name 
2435*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
2436*5113495bSYour Name 			to the WMB buffer idle list
2437*5113495bSYour Name 
2438*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
2439*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
2440*5113495bSYour Name 
2441*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
2442*5113495bSYour Name 
2443*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
2444*5113495bSYour Name 			ring 0
2445*5113495bSYour Name 
2446*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
2447*5113495bSYour Name 			ring 1
2448*5113495bSYour Name 
2449*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
2450*5113495bSYour Name 			ring 2
2451*5113495bSYour Name 
2452*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
2453*5113495bSYour Name 			ring 3
2454*5113495bSYour Name 
2455*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
2456*5113495bSYour Name 			ring 4
2457*5113495bSYour Name 
2458*5113495bSYour Name 
2459*5113495bSYour Name 
2460*5113495bSYour Name 			<legal all>
2461*5113495bSYour Name */
2462*5113495bSYour Name #define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000064
2463*5113495bSYour Name #define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
2464*5113495bSYour Name #define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
2465*5113495bSYour Name 
2466*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
2467*5113495bSYour Name 
2468*5113495bSYour Name 			Cookie field exclusively used by SW.
2469*5113495bSYour Name 
2470*5113495bSYour Name 
2471*5113495bSYour Name 
2472*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2473*5113495bSYour Name 
2474*5113495bSYour Name 
2475*5113495bSYour Name 
2476*5113495bSYour Name 			HW ignores the contents, accept that it passes the
2477*5113495bSYour Name 			programmed value on to other descriptors together with the
2478*5113495bSYour Name 			physical address
2479*5113495bSYour Name 
2480*5113495bSYour Name 
2481*5113495bSYour Name 
2482*5113495bSYour Name 			Field can be used by SW to for example associate the
2483*5113495bSYour Name 			buffers physical address with the virtual address
2484*5113495bSYour Name 
2485*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
2486*5113495bSYour Name 			specification
2487*5113495bSYour Name 
2488*5113495bSYour Name 
2489*5113495bSYour Name 
2490*5113495bSYour Name 			NOTE1:
2491*5113495bSYour Name 
2492*5113495bSYour Name 			The three most significant bits can have a special
2493*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
2494*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
2495*5113495bSYour Name 
2496*5113495bSYour Name 
2497*5113495bSYour Name 
2498*5113495bSYour Name 			In case of NON punctured transmission:
2499*5113495bSYour Name 
2500*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
2501*5113495bSYour Name 
2502*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
2503*5113495bSYour Name 
2504*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
2505*5113495bSYour Name 
2506*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
2507*5113495bSYour Name 
2508*5113495bSYour Name 
2509*5113495bSYour Name 
2510*5113495bSYour Name 			In case of punctured transmission:
2511*5113495bSYour Name 
2512*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
2513*5113495bSYour Name 
2514*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
2515*5113495bSYour Name 
2516*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
2517*5113495bSYour Name 
2518*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
2519*5113495bSYour Name 
2520*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
2521*5113495bSYour Name 
2522*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
2523*5113495bSYour Name 
2524*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
2525*5113495bSYour Name 
2526*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
2527*5113495bSYour Name 
2528*5113495bSYour Name 
2529*5113495bSYour Name 
2530*5113495bSYour Name 			Note: a punctured transmission is indicated by the
2531*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
2532*5113495bSYour Name 			TLV
2533*5113495bSYour Name 
2534*5113495bSYour Name 
2535*5113495bSYour Name 
2536*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
2537*5113495bSYour Name 			meaning in case this struct is embedded in an
2538*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
2539*5113495bSYour Name 			configured for passing on the additional info
2540*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
2541*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
2542*5113495bSYour Name 			Moselle.
2543*5113495bSYour Name 
2544*5113495bSYour Name 
2545*5113495bSYour Name 
2546*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
2547*5113495bSYour Name 			control field
2548*5113495bSYour Name 
2549*5113495bSYour Name 
2550*5113495bSYour Name 
2551*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
2552*5113495bSYour Name 			indicates MPDUs with a QoS control field.
2553*5113495bSYour Name 
2554*5113495bSYour Name 
2555*5113495bSYour Name 
2556*5113495bSYour Name 
2557*5113495bSYour Name 
2558*5113495bSYour Name 			<legal all>
2559*5113495bSYour Name */
2560*5113495bSYour Name #define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000064
2561*5113495bSYour Name #define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
2562*5113495bSYour Name #define RX_REO_QUEUE_EXT_25_MPDU_LINK_POINTER_11_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
2563*5113495bSYour Name 
2564*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_12 */
2565*5113495bSYour Name 
2566*5113495bSYour Name 
2567*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
2568*5113495bSYour Name 
2569*5113495bSYour Name 
2570*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_26_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
2571*5113495bSYour Name 
2572*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
2573*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2574*5113495bSYour Name 
2575*5113495bSYour Name 
2576*5113495bSYour Name 
2577*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2578*5113495bSYour Name 
2579*5113495bSYour Name 			<legal all>
2580*5113495bSYour Name */
2581*5113495bSYour Name #define RX_REO_QUEUE_EXT_26_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000068
2582*5113495bSYour Name #define RX_REO_QUEUE_EXT_26_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
2583*5113495bSYour Name #define RX_REO_QUEUE_EXT_26_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
2584*5113495bSYour Name 
2585*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
2586*5113495bSYour Name 
2587*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
2588*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2589*5113495bSYour Name 
2590*5113495bSYour Name 
2591*5113495bSYour Name 
2592*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2593*5113495bSYour Name 
2594*5113495bSYour Name 			<legal all>
2595*5113495bSYour Name */
2596*5113495bSYour Name #define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000006c
2597*5113495bSYour Name #define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
2598*5113495bSYour Name #define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
2599*5113495bSYour Name 
2600*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
2601*5113495bSYour Name 
2602*5113495bSYour Name 			Consumer: WBM
2603*5113495bSYour Name 
2604*5113495bSYour Name 			Producer: SW/FW
2605*5113495bSYour Name 
2606*5113495bSYour Name 
2607*5113495bSYour Name 
2608*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2609*5113495bSYour Name 
2610*5113495bSYour Name 
2611*5113495bSYour Name 
2612*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
2613*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
2614*5113495bSYour Name 			pointed to shall be returned after the frame has been
2615*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
2616*5113495bSYour Name 
2617*5113495bSYour Name 
2618*5113495bSYour Name 
2619*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
2620*5113495bSYour Name 			to the WMB buffer idle list
2621*5113495bSYour Name 
2622*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
2623*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
2624*5113495bSYour Name 
2625*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
2626*5113495bSYour Name 
2627*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
2628*5113495bSYour Name 			ring 0
2629*5113495bSYour Name 
2630*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
2631*5113495bSYour Name 			ring 1
2632*5113495bSYour Name 
2633*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
2634*5113495bSYour Name 			ring 2
2635*5113495bSYour Name 
2636*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
2637*5113495bSYour Name 			ring 3
2638*5113495bSYour Name 
2639*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
2640*5113495bSYour Name 			ring 4
2641*5113495bSYour Name 
2642*5113495bSYour Name 
2643*5113495bSYour Name 
2644*5113495bSYour Name 			<legal all>
2645*5113495bSYour Name */
2646*5113495bSYour Name #define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000006c
2647*5113495bSYour Name #define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
2648*5113495bSYour Name #define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
2649*5113495bSYour Name 
2650*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
2651*5113495bSYour Name 
2652*5113495bSYour Name 			Cookie field exclusively used by SW.
2653*5113495bSYour Name 
2654*5113495bSYour Name 
2655*5113495bSYour Name 
2656*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2657*5113495bSYour Name 
2658*5113495bSYour Name 
2659*5113495bSYour Name 
2660*5113495bSYour Name 			HW ignores the contents, accept that it passes the
2661*5113495bSYour Name 			programmed value on to other descriptors together with the
2662*5113495bSYour Name 			physical address
2663*5113495bSYour Name 
2664*5113495bSYour Name 
2665*5113495bSYour Name 
2666*5113495bSYour Name 			Field can be used by SW to for example associate the
2667*5113495bSYour Name 			buffers physical address with the virtual address
2668*5113495bSYour Name 
2669*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
2670*5113495bSYour Name 			specification
2671*5113495bSYour Name 
2672*5113495bSYour Name 
2673*5113495bSYour Name 
2674*5113495bSYour Name 			NOTE1:
2675*5113495bSYour Name 
2676*5113495bSYour Name 			The three most significant bits can have a special
2677*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
2678*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
2679*5113495bSYour Name 
2680*5113495bSYour Name 
2681*5113495bSYour Name 
2682*5113495bSYour Name 			In case of NON punctured transmission:
2683*5113495bSYour Name 
2684*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
2685*5113495bSYour Name 
2686*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
2687*5113495bSYour Name 
2688*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
2689*5113495bSYour Name 
2690*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
2691*5113495bSYour Name 
2692*5113495bSYour Name 
2693*5113495bSYour Name 
2694*5113495bSYour Name 			In case of punctured transmission:
2695*5113495bSYour Name 
2696*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
2697*5113495bSYour Name 
2698*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
2699*5113495bSYour Name 
2700*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
2701*5113495bSYour Name 
2702*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
2703*5113495bSYour Name 
2704*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
2705*5113495bSYour Name 
2706*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
2707*5113495bSYour Name 
2708*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
2709*5113495bSYour Name 
2710*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
2711*5113495bSYour Name 
2712*5113495bSYour Name 
2713*5113495bSYour Name 
2714*5113495bSYour Name 			Note: a punctured transmission is indicated by the
2715*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
2716*5113495bSYour Name 			TLV
2717*5113495bSYour Name 
2718*5113495bSYour Name 
2719*5113495bSYour Name 
2720*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
2721*5113495bSYour Name 			meaning in case this struct is embedded in an
2722*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
2723*5113495bSYour Name 			configured for passing on the additional info
2724*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
2725*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
2726*5113495bSYour Name 			Moselle.
2727*5113495bSYour Name 
2728*5113495bSYour Name 
2729*5113495bSYour Name 
2730*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
2731*5113495bSYour Name 			control field
2732*5113495bSYour Name 
2733*5113495bSYour Name 
2734*5113495bSYour Name 
2735*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
2736*5113495bSYour Name 			indicates MPDUs with a QoS control field.
2737*5113495bSYour Name 
2738*5113495bSYour Name 
2739*5113495bSYour Name 
2740*5113495bSYour Name 
2741*5113495bSYour Name 
2742*5113495bSYour Name 			<legal all>
2743*5113495bSYour Name */
2744*5113495bSYour Name #define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000006c
2745*5113495bSYour Name #define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
2746*5113495bSYour Name #define RX_REO_QUEUE_EXT_27_MPDU_LINK_POINTER_12_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
2747*5113495bSYour Name 
2748*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_13 */
2749*5113495bSYour Name 
2750*5113495bSYour Name 
2751*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
2752*5113495bSYour Name 
2753*5113495bSYour Name 
2754*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_28_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
2755*5113495bSYour Name 
2756*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
2757*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2758*5113495bSYour Name 
2759*5113495bSYour Name 
2760*5113495bSYour Name 
2761*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2762*5113495bSYour Name 
2763*5113495bSYour Name 			<legal all>
2764*5113495bSYour Name */
2765*5113495bSYour Name #define RX_REO_QUEUE_EXT_28_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000070
2766*5113495bSYour Name #define RX_REO_QUEUE_EXT_28_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
2767*5113495bSYour Name #define RX_REO_QUEUE_EXT_28_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
2768*5113495bSYour Name 
2769*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
2770*5113495bSYour Name 
2771*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
2772*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2773*5113495bSYour Name 
2774*5113495bSYour Name 
2775*5113495bSYour Name 
2776*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2777*5113495bSYour Name 
2778*5113495bSYour Name 			<legal all>
2779*5113495bSYour Name */
2780*5113495bSYour Name #define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000074
2781*5113495bSYour Name #define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
2782*5113495bSYour Name #define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
2783*5113495bSYour Name 
2784*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
2785*5113495bSYour Name 
2786*5113495bSYour Name 			Consumer: WBM
2787*5113495bSYour Name 
2788*5113495bSYour Name 			Producer: SW/FW
2789*5113495bSYour Name 
2790*5113495bSYour Name 
2791*5113495bSYour Name 
2792*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2793*5113495bSYour Name 
2794*5113495bSYour Name 
2795*5113495bSYour Name 
2796*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
2797*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
2798*5113495bSYour Name 			pointed to shall be returned after the frame has been
2799*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
2800*5113495bSYour Name 
2801*5113495bSYour Name 
2802*5113495bSYour Name 
2803*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
2804*5113495bSYour Name 			to the WMB buffer idle list
2805*5113495bSYour Name 
2806*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
2807*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
2808*5113495bSYour Name 
2809*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
2810*5113495bSYour Name 
2811*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
2812*5113495bSYour Name 			ring 0
2813*5113495bSYour Name 
2814*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
2815*5113495bSYour Name 			ring 1
2816*5113495bSYour Name 
2817*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
2818*5113495bSYour Name 			ring 2
2819*5113495bSYour Name 
2820*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
2821*5113495bSYour Name 			ring 3
2822*5113495bSYour Name 
2823*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
2824*5113495bSYour Name 			ring 4
2825*5113495bSYour Name 
2826*5113495bSYour Name 
2827*5113495bSYour Name 
2828*5113495bSYour Name 			<legal all>
2829*5113495bSYour Name */
2830*5113495bSYour Name #define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000074
2831*5113495bSYour Name #define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
2832*5113495bSYour Name #define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
2833*5113495bSYour Name 
2834*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
2835*5113495bSYour Name 
2836*5113495bSYour Name 			Cookie field exclusively used by SW.
2837*5113495bSYour Name 
2838*5113495bSYour Name 
2839*5113495bSYour Name 
2840*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2841*5113495bSYour Name 
2842*5113495bSYour Name 
2843*5113495bSYour Name 
2844*5113495bSYour Name 			HW ignores the contents, accept that it passes the
2845*5113495bSYour Name 			programmed value on to other descriptors together with the
2846*5113495bSYour Name 			physical address
2847*5113495bSYour Name 
2848*5113495bSYour Name 
2849*5113495bSYour Name 
2850*5113495bSYour Name 			Field can be used by SW to for example associate the
2851*5113495bSYour Name 			buffers physical address with the virtual address
2852*5113495bSYour Name 
2853*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
2854*5113495bSYour Name 			specification
2855*5113495bSYour Name 
2856*5113495bSYour Name 
2857*5113495bSYour Name 
2858*5113495bSYour Name 			NOTE1:
2859*5113495bSYour Name 
2860*5113495bSYour Name 			The three most significant bits can have a special
2861*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
2862*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
2863*5113495bSYour Name 
2864*5113495bSYour Name 
2865*5113495bSYour Name 
2866*5113495bSYour Name 			In case of NON punctured transmission:
2867*5113495bSYour Name 
2868*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
2869*5113495bSYour Name 
2870*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
2871*5113495bSYour Name 
2872*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
2873*5113495bSYour Name 
2874*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
2875*5113495bSYour Name 
2876*5113495bSYour Name 
2877*5113495bSYour Name 
2878*5113495bSYour Name 			In case of punctured transmission:
2879*5113495bSYour Name 
2880*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
2881*5113495bSYour Name 
2882*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
2883*5113495bSYour Name 
2884*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
2885*5113495bSYour Name 
2886*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
2887*5113495bSYour Name 
2888*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
2889*5113495bSYour Name 
2890*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
2891*5113495bSYour Name 
2892*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
2893*5113495bSYour Name 
2894*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
2895*5113495bSYour Name 
2896*5113495bSYour Name 
2897*5113495bSYour Name 
2898*5113495bSYour Name 			Note: a punctured transmission is indicated by the
2899*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
2900*5113495bSYour Name 			TLV
2901*5113495bSYour Name 
2902*5113495bSYour Name 
2903*5113495bSYour Name 
2904*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
2905*5113495bSYour Name 			meaning in case this struct is embedded in an
2906*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
2907*5113495bSYour Name 			configured for passing on the additional info
2908*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
2909*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
2910*5113495bSYour Name 			Moselle.
2911*5113495bSYour Name 
2912*5113495bSYour Name 
2913*5113495bSYour Name 
2914*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
2915*5113495bSYour Name 			control field
2916*5113495bSYour Name 
2917*5113495bSYour Name 
2918*5113495bSYour Name 
2919*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
2920*5113495bSYour Name 			indicates MPDUs with a QoS control field.
2921*5113495bSYour Name 
2922*5113495bSYour Name 
2923*5113495bSYour Name 
2924*5113495bSYour Name 
2925*5113495bSYour Name 
2926*5113495bSYour Name 			<legal all>
2927*5113495bSYour Name */
2928*5113495bSYour Name #define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000074
2929*5113495bSYour Name #define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
2930*5113495bSYour Name #define RX_REO_QUEUE_EXT_29_MPDU_LINK_POINTER_13_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
2931*5113495bSYour Name 
2932*5113495bSYour Name  /* EXTERNAL REFERENCE : struct rx_mpdu_link_ptr mpdu_link_pointer_14 */
2933*5113495bSYour Name 
2934*5113495bSYour Name 
2935*5113495bSYour Name  /* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
2936*5113495bSYour Name 
2937*5113495bSYour Name 
2938*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_30_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
2939*5113495bSYour Name 
2940*5113495bSYour Name 			Address (lower 32 bits) of the MSDU buffer OR
2941*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2942*5113495bSYour Name 
2943*5113495bSYour Name 
2944*5113495bSYour Name 
2945*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2946*5113495bSYour Name 
2947*5113495bSYour Name 			<legal all>
2948*5113495bSYour Name */
2949*5113495bSYour Name #define RX_REO_QUEUE_EXT_30_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000078
2950*5113495bSYour Name #define RX_REO_QUEUE_EXT_30_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
2951*5113495bSYour Name #define RX_REO_QUEUE_EXT_30_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
2952*5113495bSYour Name 
2953*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
2954*5113495bSYour Name 
2955*5113495bSYour Name 			Address (upper 8 bits) of the MSDU buffer OR
2956*5113495bSYour Name 			MSDU_EXTENSION descriptor OR Link Descriptor
2957*5113495bSYour Name 
2958*5113495bSYour Name 
2959*5113495bSYour Name 
2960*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2961*5113495bSYour Name 
2962*5113495bSYour Name 			<legal all>
2963*5113495bSYour Name */
2964*5113495bSYour Name #define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x0000007c
2965*5113495bSYour Name #define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
2966*5113495bSYour Name #define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
2967*5113495bSYour Name 
2968*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
2969*5113495bSYour Name 
2970*5113495bSYour Name 			Consumer: WBM
2971*5113495bSYour Name 
2972*5113495bSYour Name 			Producer: SW/FW
2973*5113495bSYour Name 
2974*5113495bSYour Name 
2975*5113495bSYour Name 
2976*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
2977*5113495bSYour Name 
2978*5113495bSYour Name 
2979*5113495bSYour Name 
2980*5113495bSYour Name 			Indicates to which buffer manager the buffer OR
2981*5113495bSYour Name 			MSDU_EXTENSION descriptor OR link descriptor that is being
2982*5113495bSYour Name 			pointed to shall be returned after the frame has been
2983*5113495bSYour Name 			processed. It is used by WBM for routing purposes.
2984*5113495bSYour Name 
2985*5113495bSYour Name 
2986*5113495bSYour Name 
2987*5113495bSYour Name 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
2988*5113495bSYour Name 			to the WMB buffer idle list
2989*5113495bSYour Name 
2990*5113495bSYour Name 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
2991*5113495bSYour Name 			returned to the WMB idle link descriptor idle list
2992*5113495bSYour Name 
2993*5113495bSYour Name 			<enum 2 FW_BM> This buffer shall be returned to the FW
2994*5113495bSYour Name 
2995*5113495bSYour Name 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
2996*5113495bSYour Name 			ring 0
2997*5113495bSYour Name 
2998*5113495bSYour Name 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
2999*5113495bSYour Name 			ring 1
3000*5113495bSYour Name 
3001*5113495bSYour Name 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
3002*5113495bSYour Name 			ring 2
3003*5113495bSYour Name 
3004*5113495bSYour Name 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
3005*5113495bSYour Name 			ring 3
3006*5113495bSYour Name 
3007*5113495bSYour Name 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
3008*5113495bSYour Name 			ring 4
3009*5113495bSYour Name 
3010*5113495bSYour Name 
3011*5113495bSYour Name 
3012*5113495bSYour Name 			<legal all>
3013*5113495bSYour Name */
3014*5113495bSYour Name #define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x0000007c
3015*5113495bSYour Name #define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
3016*5113495bSYour Name #define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
3017*5113495bSYour Name 
3018*5113495bSYour Name /* Description		RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
3019*5113495bSYour Name 
3020*5113495bSYour Name 			Cookie field exclusively used by SW.
3021*5113495bSYour Name 
3022*5113495bSYour Name 
3023*5113495bSYour Name 
3024*5113495bSYour Name 			In case of 'NULL' pointer, this field is set to 0
3025*5113495bSYour Name 
3026*5113495bSYour Name 
3027*5113495bSYour Name 
3028*5113495bSYour Name 			HW ignores the contents, accept that it passes the
3029*5113495bSYour Name 			programmed value on to other descriptors together with the
3030*5113495bSYour Name 			physical address
3031*5113495bSYour Name 
3032*5113495bSYour Name 
3033*5113495bSYour Name 
3034*5113495bSYour Name 			Field can be used by SW to for example associate the
3035*5113495bSYour Name 			buffers physical address with the virtual address
3036*5113495bSYour Name 
3037*5113495bSYour Name 			The bit definitions as used by SW are within SW HLD
3038*5113495bSYour Name 			specification
3039*5113495bSYour Name 
3040*5113495bSYour Name 
3041*5113495bSYour Name 
3042*5113495bSYour Name 			NOTE1:
3043*5113495bSYour Name 
3044*5113495bSYour Name 			The three most significant bits can have a special
3045*5113495bSYour Name 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
3046*5113495bSYour Name 			STRUCT, and field transmit_bw_restriction is set
3047*5113495bSYour Name 
3048*5113495bSYour Name 
3049*5113495bSYour Name 
3050*5113495bSYour Name 			In case of NON punctured transmission:
3051*5113495bSYour Name 
3052*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
3053*5113495bSYour Name 
3054*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
3055*5113495bSYour Name 
3056*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
3057*5113495bSYour Name 
3058*5113495bSYour Name 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
3059*5113495bSYour Name 
3060*5113495bSYour Name 
3061*5113495bSYour Name 
3062*5113495bSYour Name 			In case of punctured transmission:
3063*5113495bSYour Name 
3064*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
3065*5113495bSYour Name 
3066*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
3067*5113495bSYour Name 
3068*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
3069*5113495bSYour Name 
3070*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
3071*5113495bSYour Name 
3072*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
3073*5113495bSYour Name 
3074*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
3075*5113495bSYour Name 
3076*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
3077*5113495bSYour Name 
3078*5113495bSYour Name 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
3079*5113495bSYour Name 
3080*5113495bSYour Name 
3081*5113495bSYour Name 
3082*5113495bSYour Name 			Note: a punctured transmission is indicated by the
3083*5113495bSYour Name 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
3084*5113495bSYour Name 			TLV
3085*5113495bSYour Name 
3086*5113495bSYour Name 
3087*5113495bSYour Name 
3088*5113495bSYour Name 			NOTE 2:The five most significant bits can have a special
3089*5113495bSYour Name 			meaning in case this struct is embedded in an
3090*5113495bSYour Name 			RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
3091*5113495bSYour Name 			configured for passing on the additional info
3092*5113495bSYour Name 			from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
3093*5113495bSYour Name 			(FR56821). This is not supported in HastingsPrime, Pine or
3094*5113495bSYour Name 			Moselle.
3095*5113495bSYour Name 
3096*5113495bSYour Name 
3097*5113495bSYour Name 
3098*5113495bSYour Name 			Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
3099*5113495bSYour Name 			control field
3100*5113495bSYour Name 
3101*5113495bSYour Name 
3102*5113495bSYour Name 
3103*5113495bSYour Name 			Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
3104*5113495bSYour Name 			indicates MPDUs with a QoS control field.
3105*5113495bSYour Name 
3106*5113495bSYour Name 
3107*5113495bSYour Name 
3108*5113495bSYour Name 
3109*5113495bSYour Name 
3110*5113495bSYour Name 			<legal all>
3111*5113495bSYour Name */
3112*5113495bSYour Name #define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x0000007c
3113*5113495bSYour Name #define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
3114*5113495bSYour Name #define RX_REO_QUEUE_EXT_31_MPDU_LINK_POINTER_14_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
3115*5113495bSYour Name 
3116*5113495bSYour Name 
3117*5113495bSYour Name #endif // _RX_REO_QUEUE_EXT_H_
3118