1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2020, The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef __WCSS_SEQ_BASE_H__ 18*5113495bSYour Name #define __WCSS_SEQ_BASE_H__ 19*5113495bSYour Name 20*5113495bSYour Name #ifdef SCALE_INCLUDES 21*5113495bSYour Name #include "HALhwio.h" 22*5113495bSYour Name #else 23*5113495bSYour Name #include "msmhwio.h" 24*5113495bSYour Name #endif 25*5113495bSYour Name 26*5113495bSYour Name 27*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 28*5113495bSYour Name // Instance Relative Offsets from Block wcss 29*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 30*5113495bSYour Name 31*5113495bSYour Name #define SEQ_WCSS_UMAC_NOC_OFFSET 0x00140000 32*5113495bSYour Name #define SEQ_WCSS_PHYA_OFFSET 0x00300000 33*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00300000 34*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_REG_MAP_OFFSET 0x00380000 35*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00380400 36*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00380800 37*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00380c00 38*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00381000 39*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00381400 40*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00381800 41*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00381c00 42*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_XDMAC5_REG_MAP_OFFSET 0x00382c00 43*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_XDMAC6_REG_MAP_OFFSET 0x00383000 44*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_NOC_REG_MAP_OFFSET 0x00388000 45*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXFD_REG_MAP_OFFSET 0x00390000 46*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_RXTD_REG_MAP_OFFSET 0x003a0000 47*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXTD_REG_MAP_OFFSET 0x003b0000 48*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXBF_REG_MAP_OFFSET 0x003c0000 49*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_DEMFRONT_0_REG_MAP_OFFSET 0x00400000 50*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PHYRF_REG_MAP_OFFSET 0x00480000 51*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_ROBE_REG_MAP_OFFSET 0x004b0000 52*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_DEMFRONT_1_REG_MAP_OFFSET 0x00500000 53*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_OFFSET 0x005c0000 54*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x005d4000 55*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x005d4000 56*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x005d4240 57*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x005d42c0 58*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x005d4300 59*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x005d4400 60*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x005d4480 61*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x005d4800 62*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x005d6000 63*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x005d6040 64*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x005d6100 65*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x005d6140 66*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x005d6180 67*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x005d61c0 68*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x005d6280 69*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x005d7c00 70*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_PMU_OFFSET 0x005da000 71*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_PMU_PMU_OFFSET 0x005da000 72*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x005e0000 73*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x005e0000 74*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x005e0400 75*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH0_OFFSET 0x005e0800 76*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH0_OFFSET 0x005e1000 77*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH0_OFFSET 0x005e1300 78*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_CH0_OFFSET 0x005e1600 79*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_CH0_OFFSET 0x005e1640 80*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH0_OFFSET 0x005e2000 81*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_CH0_OFFSET 0x005e4000 82*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH1_OFFSET 0x005e8000 83*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH1_OFFSET 0x005e8400 84*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH1_OFFSET 0x005e8800 85*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH1_OFFSET 0x005e9000 86*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH1_OFFSET 0x005e9300 87*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_CH1_OFFSET 0x005e9600 88*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_CH1_OFFSET 0x005e9640 89*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH1_OFFSET 0x005ea000 90*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_CH1_OFFSET 0x005ec000 91*5113495bSYour Name #define SEQ_WCSS_UMAC_OFFSET 0x00a00000 92*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_OFFSET 0x00a20000 93*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00a20000 94*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00a22000 95*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00a24000 96*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00a26000 97*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00a28000 98*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x00a2a000 99*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TRACER_REG_OFFSET 0x00a30000 100*5113495bSYour Name #define SEQ_WCSS_UMAC_WBM_REG_OFFSET 0x00a34000 101*5113495bSYour Name #define SEQ_WCSS_UMAC_REO_REG_OFFSET 0x00a38000 102*5113495bSYour Name #define SEQ_WCSS_UMAC_TQM_REG_OFFSET 0x00a3c000 103*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_UMCMN_REG_OFFSET 0x00a40000 104*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET 0x00a44000 105*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_CMN_PARSER_REG_OFFSET 0x00a47000 106*5113495bSYour Name #define SEQ_WCSS_WMAC0_OFFSET 0x00a80000 107*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_PDG_REG_OFFSET 0x00a80000 108*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXDMA_REG_OFFSET 0x00a83000 109*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXDMA_REG_OFFSET 0x00a86000 110*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MCMN_REG_OFFSET 0x00a89000 111*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXPCU_REG_OFFSET 0x00a8c000 112*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXPCU_REG_OFFSET 0x00a8f000 113*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_AMPI_REG_OFFSET 0x00a92000 114*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_REG_OFFSET 0x00a95000 115*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_PARSER_REG_OFFSET 0x00a98000 116*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CCE_REG_OFFSET 0x00a9b000 117*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_REG_OFFSET 0x00a9e000 118*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_PARSER_REG_OFFSET 0x00aa1000 119*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RRI_REG_OFFSET 0x00aa4000 120*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CRYPTO_REG_OFFSET 0x00aa7000 121*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_HWSCH_REG_OFFSET 0x00aaa000 122*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MXI_REG_OFFSET 0x00ab0000 123*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_SFM_REG_OFFSET 0x00ab3000 124*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXDMA1_REG_OFFSET 0x00ab6000 125*5113495bSYour Name #define SEQ_WCSS_APB_TSLV_OFFSET 0x00b40000 126*5113495bSYour Name #define SEQ_WCSS_TOP_CMN_OFFSET 0x00b50000 127*5113495bSYour Name #define SEQ_WCSS_WCMN_CORE_OFFSET 0x00b58000 128*5113495bSYour Name #define SEQ_WCSS_WFSS_PMM_OFFSET 0x00b60000 129*5113495bSYour Name #define SEQ_WCSS_PMM_TOP_OFFSET 0x00b70000 130*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_OFFSET 0x00b80000 131*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_RBIST_TX_CH0_OFFSET 0x00b80000 132*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_CH0_OFFSET 0x00b80080 133*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_DIG_CORRECTION_CH0_OFFSET 0x00b800c0 134*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_MISC_CH0_OFFSET 0x00b80340 135*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_BBCLKGEN_CH0_OFFSET 0x00b803c4 136*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_CH0_OFFSET 0x00b80400 137*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_POSTPROC_I_EVEN_CH0_OFFSET 0x00b80800 138*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_POSTPROC_I_ODD_CH0_OFFSET 0x00b80840 139*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_POSTPROC_Q_EVEN_CH0_OFFSET 0x00b80880 140*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_POSTPROC_Q_ODD_CH0_OFFSET 0x00b808c0 141*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_POSTPROC_RO_CH0_OFFSET 0x00b80900 142*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_BBCLKGEN_CH0_OFFSET 0x00b8099c 143*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_RBIST_TX_CH1_OFFSET 0x00b81000 144*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_CH1_OFFSET 0x00b81080 145*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_DIG_CORRECTION_CH1_OFFSET 0x00b810c0 146*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_MISC_CH1_OFFSET 0x00b81340 147*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_BBCLKGEN_CH1_OFFSET 0x00b813c4 148*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_CH1_OFFSET 0x00b81400 149*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_POSTPROC_I_EVEN_CH1_OFFSET 0x00b81800 150*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_POSTPROC_I_ODD_CH1_OFFSET 0x00b81840 151*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_POSTPROC_Q_EVEN_CH1_OFFSET 0x00b81880 152*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_POSTPROC_Q_ODD_CH1_OFFSET 0x00b818c0 153*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_POSTPROC_RO_CH1_OFFSET 0x00b81900 154*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_BBCLKGEN_CH1_OFFSET 0x00b8199c 155*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_TMUX_OFFSET 0x00b8d000 156*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_OTP_OFFSET 0x00b8d080 157*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_LDO_CTRL_OFFSET 0x00b8d0b4 158*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_CLKGEN_OFFSET 0x00b8d100 159*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_BIAS_OFFSET 0x00b8e000 160*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_BBPLL_OFFSET 0x00b8f000 161*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_TOP_CLKGEN_OFFSET 0x00b8f100 162*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_DRM_REG_OFFSET 0x00b8fc00 163*5113495bSYour Name #define SEQ_WCSS_DBG_OFFSET 0x00b90000 164*5113495bSYour Name #define SEQ_WCSS_DBG_WCSS_DBG_DAPROM_OFFSET 0x00b90000 165*5113495bSYour Name #define SEQ_WCSS_DBG_CSR_WCSS_DBG_CSR_OFFSET 0x00b91000 166*5113495bSYour Name #define SEQ_WCSS_DBG_TSGEN_CXTSGEN_OFFSET 0x00b92000 167*5113495bSYour Name #define SEQ_WCSS_DBG_CTIDBG_QC_CTI_32T_8CH_OFFSET 0x00b94000 168*5113495bSYour Name #define SEQ_WCSS_DBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00b95000 169*5113495bSYour Name #define SEQ_WCSS_DBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00b96000 170*5113495bSYour Name #define SEQ_WCSS_DBG_EVENT_MACEVENT_OFFSET 0x00bb0000 171*5113495bSYour Name #define SEQ_WCSS_DBG_EVENTFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb1000 172*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_MACTLV_OFFSET 0x00bb2000 173*5113495bSYour Name #define SEQ_WCSS_DBG_TLVFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb3000 174*5113495bSYour Name #define SEQ_WCSS_DBG_TBUS_MACTBUS_OFFSET 0x00bb4000 175*5113495bSYour Name #define SEQ_WCSS_DBG_TBUSFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb5000 176*5113495bSYour Name #define SEQ_WCSS_DBG_CTIMAC_QC_CTI_12T_8CH_OFFSET 0x00bb6000 177*5113495bSYour Name #define SEQ_WCSS_DBG_WCSS_DBG_TSTMP_INJCTR_OFFSET 0x00bb8000 178*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_OFFSET 0x00bb9000 179*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00bb9280 180*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00bb9000 181*5113495bSYour Name #define SEQ_WCSS_DBG_TPDA_OFFSET 0x00bba000 182*5113495bSYour Name #define SEQ_WCSS_DBG_CXATBFUNNEL_128W8SP_OFFSET 0x00bbb000 183*5113495bSYour Name #define SEQ_WCSS_DBG_TMC_CXTMC_F128W32K_OFFSET 0x00bbc000 184*5113495bSYour Name #define SEQ_WCSS_DBG_OUTFUN_CXATBFUNNEL_128W2SP_OFFSET 0x00bbe000 185*5113495bSYour Name #define SEQ_WCSS_DBG_PHYFUN_CXATBFUNNEL_128W2SP_OFFSET 0x00bbf000 186*5113495bSYour Name #define SEQ_WCSS_DBG_OUTDMUX_ATB_DEMUX_OFFSET 0x00bc0000 187*5113495bSYour Name #define SEQ_WCSS_DBG_TRCCNTRS_OFFSET 0x00bc1000 188*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_OFFSET 0x00bc2000 189*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00bc2280 190*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00bc2000 191*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_OFFSET 0x00bc3000 192*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00bc3280 193*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00bc3000 194*5113495bSYour Name #define SEQ_WCSS_DBG_QC_TGU_APCLK_CSAE4EA8E3_OFFSET 0x00bc4000 195*5113495bSYour Name #define SEQ_WCSS_DBG_CTITGU_QC_CTI_4T_8CH_OFFSET 0x00bc5000 196*5113495bSYour Name #define SEQ_WCSS_DBG_PHYADMUX_ATB_DEMUX_OFFSET 0x00bc6000 197*5113495bSYour Name #define SEQ_WCSS_DBG_MISCFUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bc8000 198*5113495bSYour Name #define SEQ_WCSS_DBG_UNOC_UMAC_NOC_OFFSET 0x00bd0000 199*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_OFFSET 0x00be0000 200*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_PHYA_NOC_OFFSET 0x00be0000 201*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00be4000 202*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00be5000 203*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00be6000 204*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_ITM_OFFSET 0x00be8000 205*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_DWT_OFFSET 0x00be9000 206*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_FPB_OFFSET 0x00bea000 207*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_SCS_OFFSET 0x00beb000 208*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_M3_ETM_OFFSET 0x00bec000 209*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x00bed000 210*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x00bee000 211*5113495bSYour Name #define SEQ_WCSS_DBG_BUS_TIMEOUT_OFFSET 0x00c31000 212*5113495bSYour Name #define SEQ_WCSS_RET_AHB_OFFSET 0x00c90000 213*5113495bSYour Name #define SEQ_WCSS_WAHB_TSLV_OFFSET 0x00ca0000 214*5113495bSYour Name #define SEQ_WCSS_CC_OFFSET 0x00cb0000 215*5113495bSYour Name #define SEQ_WCSS_UMAC_ACMT_OFFSET 0x00cc0000 216*5113495bSYour Name 217*5113495bSYour Name 218*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 219*5113495bSYour Name // Instance Relative Offsets from Block wfax_top 220*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 221*5113495bSYour Name 222*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00000000 223*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_REG_MAP_OFFSET 0x00080000 224*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00080400 225*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00080800 226*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00080c00 227*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00081000 228*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00081400 229*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00081800 230*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00081c00 231*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_XDMAC5_REG_MAP_OFFSET 0x00082c00 232*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_XDMAC6_REG_MAP_OFFSET 0x00083000 233*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_NOC_REG_MAP_OFFSET 0x00088000 234*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXFD_REG_MAP_OFFSET 0x00090000 235*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_RXTD_REG_MAP_OFFSET 0x000a0000 236*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXTD_REG_MAP_OFFSET 0x000b0000 237*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXBF_REG_MAP_OFFSET 0x000c0000 238*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_DEMFRONT_0_REG_MAP_OFFSET 0x00100000 239*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PHYRF_REG_MAP_OFFSET 0x00180000 240*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_ROBE_REG_MAP_OFFSET 0x001b0000 241*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_DEMFRONT_1_REG_MAP_OFFSET 0x00200000 242*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_OFFSET 0x002c0000 243*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x002d4000 244*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x002d4000 245*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x002d4240 246*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x002d42c0 247*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x002d4300 248*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x002d4400 249*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x002d4480 250*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x002d4800 251*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x002d6000 252*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x002d6040 253*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x002d6100 254*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x002d6140 255*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x002d6180 256*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x002d61c0 257*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x002d6280 258*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x002d7c00 259*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_PMU_OFFSET 0x002da000 260*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_PMU_PMU_OFFSET 0x002da000 261*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x002e0000 262*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x002e0000 263*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x002e0400 264*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH0_OFFSET 0x002e0800 265*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH0_OFFSET 0x002e1000 266*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH0_OFFSET 0x002e1300 267*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_CH0_OFFSET 0x002e1600 268*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_CH0_OFFSET 0x002e1640 269*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH0_OFFSET 0x002e2000 270*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_CH0_OFFSET 0x002e4000 271*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH1_OFFSET 0x002e8000 272*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH1_OFFSET 0x002e8400 273*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH1_OFFSET 0x002e8800 274*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE_CH1_OFFSET 0x002e9000 275*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE_CH1_OFFSET 0x002e9300 276*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_CH1_OFFSET 0x002e9600 277*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_CH1_OFFSET 0x002e9640 278*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH1_OFFSET 0x002ea000 279*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_CH1_OFFSET 0x002ec000 280*5113495bSYour Name 281*5113495bSYour Name 282*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 283*5113495bSYour Name // Instance Relative Offsets from Block rfa_from_wsi 284*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 285*5113495bSYour Name 286*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_OFFSET 0x00014000 287*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_OFFSET 0x00014000 288*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_XFEM_OFFSET 0x00014240 289*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_COEX_OFFSET 0x000142c0 290*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFFE_M_OFFSET 0x00014300 291*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFA_SHD_OTP_OFFSET 0x00014400 292*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFA_OTP_OFFSET 0x00014480 293*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_CLKGEN_OFFSET 0x00014800 294*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00016000 295*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00016040 296*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00016100 297*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00016140 298*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00016180 299*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x000161c0 300*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00016280 301*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x00017c00 302*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_PMU_OFFSET 0x0001a000 303*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_PMU_PMU_OFFSET 0x0001a000 304*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_OFFSET 0x00020000 305*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_CH0_OFFSET 0x00020000 306*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_CH0_OFFSET 0x00020400 307*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_CH0_OFFSET 0x00020800 308*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_CH0_OFFSET 0x00021000 309*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_CH0_OFFSET 0x00021300 310*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_PAL_CH0_OFFSET 0x00021600 311*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_CH0_OFFSET 0x00021640 312*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_CH0_OFFSET 0x00022000 313*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_CH0_OFFSET 0x00024000 314*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_CH1_OFFSET 0x00028000 315*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_CH1_OFFSET 0x00028400 316*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_CH1_OFFSET 0x00028800 317*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE_CH1_OFFSET 0x00029000 318*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE_CH1_OFFSET 0x00029300 319*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_PAL_CH1_OFFSET 0x00029600 320*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_CH1_OFFSET 0x00029640 321*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_CH1_OFFSET 0x0002a000 322*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_CH1_OFFSET 0x0002c000 323*5113495bSYour Name 324*5113495bSYour Name 325*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 326*5113495bSYour Name // Instance Relative Offsets from Block rfa_cmn 327*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 328*5113495bSYour Name 329*5113495bSYour Name #define SEQ_RFA_CMN_AON_OFFSET 0x00000000 330*5113495bSYour Name #define SEQ_RFA_CMN_AON_XFEM_OFFSET 0x00000240 331*5113495bSYour Name #define SEQ_RFA_CMN_AON_COEX_OFFSET 0x000002c0 332*5113495bSYour Name #define SEQ_RFA_CMN_RFFE_M_OFFSET 0x00000300 333*5113495bSYour Name #define SEQ_RFA_CMN_RFA_SHD_OTP_OFFSET 0x00000400 334*5113495bSYour Name #define SEQ_RFA_CMN_RFA_OTP_OFFSET 0x00000480 335*5113495bSYour Name #define SEQ_RFA_CMN_CLKGEN_OFFSET 0x00000800 336*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00002000 337*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00002040 338*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00002100 339*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00002140 340*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00002180 341*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x000021c0 342*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00002280 343*5113495bSYour Name #define SEQ_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x00003c00 344*5113495bSYour Name 345*5113495bSYour Name 346*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 347*5113495bSYour Name // Instance Relative Offsets from Block rfa_pmu 348*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 349*5113495bSYour Name 350*5113495bSYour Name #define SEQ_RFA_PMU_PMU_OFFSET 0x00000000 351*5113495bSYour Name 352*5113495bSYour Name 353*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 354*5113495bSYour Name // Instance Relative Offsets from Block rfa_wl 355*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 356*5113495bSYour Name 357*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_CH0_OFFSET 0x00000000 358*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_CH0_OFFSET 0x00000400 359*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_CH0_OFFSET 0x00000800 360*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_CH0_OFFSET 0x00001000 361*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_CH0_OFFSET 0x00001300 362*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_PAL_CH0_OFFSET 0x00001600 363*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_CH0_OFFSET 0x00001640 364*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_CH0_OFFSET 0x00002000 365*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_CH0_OFFSET 0x00004000 366*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_CH1_OFFSET 0x00008000 367*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_CH1_OFFSET 0x00008400 368*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_CH1_OFFSET 0x00008800 369*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE_CH1_OFFSET 0x00009000 370*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE_CH1_OFFSET 0x00009300 371*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_PAL_CH1_OFFSET 0x00009600 372*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_CH1_OFFSET 0x00009640 373*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_CH1_OFFSET 0x0000a000 374*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_CH1_OFFSET 0x0000c000 375*5113495bSYour Name 376*5113495bSYour Name 377*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 378*5113495bSYour Name // Instance Relative Offsets from Block umac_top_reg 379*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 380*5113495bSYour Name 381*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_OFFSET 0x00020000 382*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00020000 383*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00022000 384*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00024000 385*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00026000 386*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00028000 387*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0002a000 388*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TRACER_REG_OFFSET 0x00030000 389*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WBM_REG_OFFSET 0x00034000 390*5113495bSYour Name #define SEQ_UMAC_TOP_REG_REO_REG_OFFSET 0x00038000 391*5113495bSYour Name #define SEQ_UMAC_TOP_REG_TQM_REG_OFFSET 0x0003c000 392*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_UMCMN_REG_OFFSET 0x00040000 393*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TCL_REG_OFFSET 0x00044000 394*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_CMN_PARSER_REG_OFFSET 0x00047000 395*5113495bSYour Name 396*5113495bSYour Name 397*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 398*5113495bSYour Name // Instance Relative Offsets from Block cxc_top_reg 399*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 400*5113495bSYour Name 401*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00000000 402*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00002000 403*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00004000 404*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00006000 405*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00008000 406*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0000a000 407*5113495bSYour Name 408*5113495bSYour Name 409*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 410*5113495bSYour Name // Instance Relative Offsets from Block wmac_top_reg 411*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 412*5113495bSYour Name 413*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_PDG_REG_OFFSET 0x00000000 414*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXDMA_REG_OFFSET 0x00003000 415*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXDMA_REG_OFFSET 0x00006000 416*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MCMN_REG_OFFSET 0x00009000 417*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXPCU_REG_OFFSET 0x0000c000 418*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXPCU_REG_OFFSET 0x0000f000 419*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_AMPI_REG_OFFSET 0x00012000 420*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_REG_OFFSET 0x00015000 421*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_PARSER_REG_OFFSET 0x00018000 422*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CCE_REG_OFFSET 0x0001b000 423*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_REG_OFFSET 0x0001e000 424*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_PARSER_REG_OFFSET 0x00021000 425*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RRI_REG_OFFSET 0x00024000 426*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CRYPTO_REG_OFFSET 0x00027000 427*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_HWSCH_REG_OFFSET 0x0002a000 428*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MXI_REG_OFFSET 0x00030000 429*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_SFM_REG_OFFSET 0x00033000 430*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXDMA1_REG_OFFSET 0x00036000 431*5113495bSYour Name 432*5113495bSYour Name 433*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 434*5113495bSYour Name // Instance Relative Offsets from Block msip 435*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 436*5113495bSYour Name 437*5113495bSYour Name #define SEQ_MSIP_RBIST_TX_CH0_OFFSET 0x00000000 438*5113495bSYour Name #define SEQ_MSIP_WL_DAC_CH0_OFFSET 0x00000080 439*5113495bSYour Name #define SEQ_MSIP_WL_DAC_DIG_CORRECTION_CH0_OFFSET 0x000000c0 440*5113495bSYour Name #define SEQ_MSIP_WL_DAC_MISC_CH0_OFFSET 0x00000340 441*5113495bSYour Name #define SEQ_MSIP_WL_DAC_BBCLKGEN_CH0_OFFSET 0x000003c4 442*5113495bSYour Name #define SEQ_MSIP_WL_ADC_CH0_OFFSET 0x00000400 443*5113495bSYour Name #define SEQ_MSIP_WL_ADC_POSTPROC_I_EVEN_CH0_OFFSET 0x00000800 444*5113495bSYour Name #define SEQ_MSIP_WL_ADC_POSTPROC_I_ODD_CH0_OFFSET 0x00000840 445*5113495bSYour Name #define SEQ_MSIP_WL_ADC_POSTPROC_Q_EVEN_CH0_OFFSET 0x00000880 446*5113495bSYour Name #define SEQ_MSIP_WL_ADC_POSTPROC_Q_ODD_CH0_OFFSET 0x000008c0 447*5113495bSYour Name #define SEQ_MSIP_WL_ADC_POSTPROC_RO_CH0_OFFSET 0x00000900 448*5113495bSYour Name #define SEQ_MSIP_WL_ADC_BBCLKGEN_CH0_OFFSET 0x0000099c 449*5113495bSYour Name #define SEQ_MSIP_RBIST_TX_CH1_OFFSET 0x00001000 450*5113495bSYour Name #define SEQ_MSIP_WL_DAC_CH1_OFFSET 0x00001080 451*5113495bSYour Name #define SEQ_MSIP_WL_DAC_DIG_CORRECTION_CH1_OFFSET 0x000010c0 452*5113495bSYour Name #define SEQ_MSIP_WL_DAC_MISC_CH1_OFFSET 0x00001340 453*5113495bSYour Name #define SEQ_MSIP_WL_DAC_BBCLKGEN_CH1_OFFSET 0x000013c4 454*5113495bSYour Name #define SEQ_MSIP_WL_ADC_CH1_OFFSET 0x00001400 455*5113495bSYour Name #define SEQ_MSIP_WL_ADC_POSTPROC_I_EVEN_CH1_OFFSET 0x00001800 456*5113495bSYour Name #define SEQ_MSIP_WL_ADC_POSTPROC_I_ODD_CH1_OFFSET 0x00001840 457*5113495bSYour Name #define SEQ_MSIP_WL_ADC_POSTPROC_Q_EVEN_CH1_OFFSET 0x00001880 458*5113495bSYour Name #define SEQ_MSIP_WL_ADC_POSTPROC_Q_ODD_CH1_OFFSET 0x000018c0 459*5113495bSYour Name #define SEQ_MSIP_WL_ADC_POSTPROC_RO_CH1_OFFSET 0x00001900 460*5113495bSYour Name #define SEQ_MSIP_WL_ADC_BBCLKGEN_CH1_OFFSET 0x0000199c 461*5113495bSYour Name #define SEQ_MSIP_MSIP_TMUX_OFFSET 0x0000d000 462*5113495bSYour Name #define SEQ_MSIP_MSIP_OTP_OFFSET 0x0000d080 463*5113495bSYour Name #define SEQ_MSIP_MSIP_LDO_CTRL_OFFSET 0x0000d0b4 464*5113495bSYour Name #define SEQ_MSIP_MSIP_CLKGEN_OFFSET 0x0000d100 465*5113495bSYour Name #define SEQ_MSIP_MSIP_BIAS_OFFSET 0x0000e000 466*5113495bSYour Name #define SEQ_MSIP_BBPLL_OFFSET 0x0000f000 467*5113495bSYour Name #define SEQ_MSIP_WL_TOP_CLKGEN_OFFSET 0x0000f100 468*5113495bSYour Name #define SEQ_MSIP_MSIP_DRM_REG_OFFSET 0x0000fc00 469*5113495bSYour Name 470*5113495bSYour Name 471*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 472*5113495bSYour Name // Instance Relative Offsets from Block wcssdbg 473*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 474*5113495bSYour Name 475*5113495bSYour Name #define SEQ_WCSSDBG_WCSS_DBG_DAPROM_OFFSET 0x00000000 476*5113495bSYour Name #define SEQ_WCSSDBG_CSR_WCSS_DBG_CSR_OFFSET 0x00001000 477*5113495bSYour Name #define SEQ_WCSSDBG_TSGEN_CXTSGEN_OFFSET 0x00002000 478*5113495bSYour Name #define SEQ_WCSSDBG_CTIDBG_QC_CTI_32T_8CH_OFFSET 0x00004000 479*5113495bSYour Name #define SEQ_WCSSDBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00005000 480*5113495bSYour Name #define SEQ_WCSSDBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00006000 481*5113495bSYour Name #define SEQ_WCSSDBG_EVENT_MACEVENT_OFFSET 0x00020000 482*5113495bSYour Name #define SEQ_WCSSDBG_EVENTFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00021000 483*5113495bSYour Name #define SEQ_WCSSDBG_TLV_MACTLV_OFFSET 0x00022000 484*5113495bSYour Name #define SEQ_WCSSDBG_TLVFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00023000 485*5113495bSYour Name #define SEQ_WCSSDBG_TBUS_MACTBUS_OFFSET 0x00024000 486*5113495bSYour Name #define SEQ_WCSSDBG_TBUSFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00025000 487*5113495bSYour Name #define SEQ_WCSSDBG_CTIMAC_QC_CTI_12T_8CH_OFFSET 0x00026000 488*5113495bSYour Name #define SEQ_WCSSDBG_WCSS_DBG_TSTMP_INJCTR_OFFSET 0x00028000 489*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_OFFSET 0x00029000 490*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00029280 491*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00029000 492*5113495bSYour Name #define SEQ_WCSSDBG_TPDA_OFFSET 0x0002a000 493*5113495bSYour Name #define SEQ_WCSSDBG_CXATBFUNNEL_128W8SP_OFFSET 0x0002b000 494*5113495bSYour Name #define SEQ_WCSSDBG_TMC_CXTMC_F128W32K_OFFSET 0x0002c000 495*5113495bSYour Name #define SEQ_WCSSDBG_OUTFUN_CXATBFUNNEL_128W2SP_OFFSET 0x0002e000 496*5113495bSYour Name #define SEQ_WCSSDBG_PHYFUN_CXATBFUNNEL_128W2SP_OFFSET 0x0002f000 497*5113495bSYour Name #define SEQ_WCSSDBG_OUTDMUX_ATB_DEMUX_OFFSET 0x00030000 498*5113495bSYour Name #define SEQ_WCSSDBG_TRCCNTRS_OFFSET 0x00031000 499*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_OFFSET 0x00032000 500*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00032280 501*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00032000 502*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_OFFSET 0x00033000 503*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00033280 504*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00033000 505*5113495bSYour Name #define SEQ_WCSSDBG_QC_TGU_APCLK_CSAE4EA8E3_OFFSET 0x00034000 506*5113495bSYour Name #define SEQ_WCSSDBG_CTITGU_QC_CTI_4T_8CH_OFFSET 0x00035000 507*5113495bSYour Name #define SEQ_WCSSDBG_PHYADMUX_ATB_DEMUX_OFFSET 0x00036000 508*5113495bSYour Name #define SEQ_WCSSDBG_MISCFUN_CXATBFUNNEL_64W8SP_OFFSET 0x00038000 509*5113495bSYour Name #define SEQ_WCSSDBG_UNOC_UMAC_NOC_OFFSET 0x00040000 510*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_OFFSET 0x00050000 511*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_PHYA_NOC_OFFSET 0x00050000 512*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00054000 513*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00055000 514*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00056000 515*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_ITM_OFFSET 0x00058000 516*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_DWT_OFFSET 0x00059000 517*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_FPB_OFFSET 0x0005a000 518*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_SCS_OFFSET 0x0005b000 519*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_M3_ETM_OFFSET 0x0005c000 520*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0005d000 521*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x0005e000 522*5113495bSYour Name #define SEQ_WCSSDBG_BUS_TIMEOUT_OFFSET 0x000a1000 523*5113495bSYour Name 524*5113495bSYour Name 525*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 526*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb64_cmb40_dsb256_csbe6c04f7 527*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 528*5113495bSYour Name 529*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00000280 530*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00000000 531*5113495bSYour Name 532*5113495bSYour Name 533*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 534*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb128_cmb64 535*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 536*5113495bSYour Name 537*5113495bSYour Name #define SEQ_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00000280 538*5113495bSYour Name #define SEQ_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00000000 539*5113495bSYour Name 540*5113495bSYour Name 541*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 542*5113495bSYour Name // Instance Relative Offsets from Block phya_dbg 543*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 544*5113495bSYour Name 545*5113495bSYour Name #define SEQ_PHYA_DBG_PHYA_NOC_OFFSET 0x00000000 546*5113495bSYour Name #define SEQ_PHYA_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00004000 547*5113495bSYour Name #define SEQ_PHYA_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00005000 548*5113495bSYour Name #define SEQ_PHYA_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00006000 549*5113495bSYour Name #define SEQ_PHYA_DBG_ITM_OFFSET 0x00008000 550*5113495bSYour Name #define SEQ_PHYA_DBG_DWT_OFFSET 0x00009000 551*5113495bSYour Name #define SEQ_PHYA_DBG_FPB_OFFSET 0x0000a000 552*5113495bSYour Name #define SEQ_PHYA_DBG_SCS_OFFSET 0x0000b000 553*5113495bSYour Name #define SEQ_PHYA_DBG_M3_ETM_OFFSET 0x0000c000 554*5113495bSYour Name #define SEQ_PHYA_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0000d000 555*5113495bSYour Name #define SEQ_PHYA_DBG_CPU0_M3_AHB_AP_OFFSET 0x0000e000 556*5113495bSYour Name 557*5113495bSYour Name 558*5113495bSYour Name #endif 559*5113495bSYour Name 560