xref: /wlan-driver/fw-api/hw/qcn6432/ce_src_desc.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 #ifndef _CE_SRC_DESC_H_
19 #define _CE_SRC_DESC_H_
20 #if !defined(__ASSEMBLER__)
21 #endif
22 
23 #define NUM_OF_DWORDS_CE_SRC_DESC 4
24 
25 
26 struct ce_src_desc {
27 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
28              uint32_t src_buffer_low                                          : 32; // [31:0]
29              uint32_t src_buffer_high                                         :  8, // [7:0]
30                       toeplitz_en                                             :  1, // [8:8]
31                       src_swap                                                :  1, // [9:9]
32                       dest_swap                                               :  1, // [10:10]
33                       gather                                                  :  1, // [11:11]
34                       ce_res_0                                                :  1, // [12:12]
35                       barrier_read                                            :  1, // [13:13]
36                       ce_res_1                                                :  2, // [15:14]
37                       length                                                  : 16; // [31:16]
38              uint32_t fw_metadata                                             : 16, // [15:0]
39                       ce_res_2                                                : 16; // [31:16]
40              uint32_t ce_res_3                                                : 20, // [19:0]
41                       ring_id                                                 :  8, // [27:20]
42                       looping_count                                           :  4; // [31:28]
43 #else
44              uint32_t src_buffer_low                                          : 32; // [31:0]
45              uint32_t length                                                  : 16, // [31:16]
46                       ce_res_1                                                :  2, // [15:14]
47                       barrier_read                                            :  1, // [13:13]
48                       ce_res_0                                                :  1, // [12:12]
49                       gather                                                  :  1, // [11:11]
50                       dest_swap                                               :  1, // [10:10]
51                       src_swap                                                :  1, // [9:9]
52                       toeplitz_en                                             :  1, // [8:8]
53                       src_buffer_high                                         :  8; // [7:0]
54              uint32_t ce_res_2                                                : 16, // [31:16]
55                       fw_metadata                                             : 16; // [15:0]
56              uint32_t looping_count                                           :  4, // [31:28]
57                       ring_id                                                 :  8, // [27:20]
58                       ce_res_3                                                : 20; // [19:0]
59 #endif
60 };
61 
62 
63 /* Description		SRC_BUFFER_LOW
64 
65 			LSB 32 bits of the 40 Bit Pointer to the source buffer
66 			<legal all>
67 */
68 
69 #define CE_SRC_DESC_SRC_BUFFER_LOW_OFFSET                                           0x00000000
70 #define CE_SRC_DESC_SRC_BUFFER_LOW_LSB                                              0
71 #define CE_SRC_DESC_SRC_BUFFER_LOW_MSB                                              31
72 #define CE_SRC_DESC_SRC_BUFFER_LOW_MASK                                             0xffffffff
73 
74 
75 /* Description		SRC_BUFFER_HIGH
76 
77 			Bits [6:0] for 40 Bit Pointer to the source buffer
78 			Bit [7] can be programmed with VC bit.
79 			Note: CE Descriptor has 40-bit address. Only 37 bits are
80 			 routed as address to NoC. Remaining bits are user bits.
81 			Bit [7] of SRC_BUFFER_HIGH can be used for VC configuration.
82 			0 indicate VC0 and 1 indicate VC1.
83 			<legal all>
84 */
85 
86 #define CE_SRC_DESC_SRC_BUFFER_HIGH_OFFSET                                          0x00000004
87 #define CE_SRC_DESC_SRC_BUFFER_HIGH_LSB                                             0
88 #define CE_SRC_DESC_SRC_BUFFER_HIGH_MSB                                             7
89 #define CE_SRC_DESC_SRC_BUFFER_HIGH_MASK                                            0x000000ff
90 
91 
92 /* Description		TOEPLITZ_EN
93 
94 			Enable generation of 32-bit Toeplitz-LFSR hash for the data
95 			 transfer
96 			In case of gather field in first source ring entry of the
97 			 gather copy cycle in taken into account.
98 			<legal all>
99 */
100 
101 #define CE_SRC_DESC_TOEPLITZ_EN_OFFSET                                              0x00000004
102 #define CE_SRC_DESC_TOEPLITZ_EN_LSB                                                 8
103 #define CE_SRC_DESC_TOEPLITZ_EN_MSB                                                 8
104 #define CE_SRC_DESC_TOEPLITZ_EN_MASK                                                0x00000100
105 
106 
107 /* Description		SRC_SWAP
108 
109 			Treats source memory organization as big-endian. For each
110 			 dword read (4 bytes), the byte 0 is swapped with byte 3
111 			 and byte 1 is swapped with byte 2.
112 			In case of gather field in first source ring entry of the
113 			 gather copy cycle in taken into account.
114 			<legal all>
115 */
116 
117 #define CE_SRC_DESC_SRC_SWAP_OFFSET                                                 0x00000004
118 #define CE_SRC_DESC_SRC_SWAP_LSB                                                    9
119 #define CE_SRC_DESC_SRC_SWAP_MSB                                                    9
120 #define CE_SRC_DESC_SRC_SWAP_MASK                                                   0x00000200
121 
122 
123 /* Description		DEST_SWAP
124 
125 			Treats destination memory organization as big-endian. For
126 			 each dword write (4 bytes), the byte 0 is swapped with
127 			byte 3 and byte 1 is swapped with byte 2.
128 			In case of gather field in first source ring entry of the
129 			 gather copy cycle in taken into account.
130 			<legal all>
131 */
132 
133 #define CE_SRC_DESC_DEST_SWAP_OFFSET                                                0x00000004
134 #define CE_SRC_DESC_DEST_SWAP_LSB                                                   10
135 #define CE_SRC_DESC_DEST_SWAP_MSB                                                   10
136 #define CE_SRC_DESC_DEST_SWAP_MASK                                                  0x00000400
137 
138 
139 /* Description		GATHER
140 
141 			Enables gather of multiple copy engine source descriptors
142 			 to one destination.
143 			<legal all>
144 */
145 
146 #define CE_SRC_DESC_GATHER_OFFSET                                                   0x00000004
147 #define CE_SRC_DESC_GATHER_LSB                                                      11
148 #define CE_SRC_DESC_GATHER_MSB                                                      11
149 #define CE_SRC_DESC_GATHER_MASK                                                     0x00000800
150 
151 
152 /* Description		CE_RES_0
153 
154 			Reserved
155 			<legal all>
156 */
157 
158 #define CE_SRC_DESC_CE_RES_0_OFFSET                                                 0x00000004
159 #define CE_SRC_DESC_CE_RES_0_LSB                                                    12
160 #define CE_SRC_DESC_CE_RES_0_MSB                                                    12
161 #define CE_SRC_DESC_CE_RES_0_MASK                                                   0x00001000
162 
163 
164 /* Description		BARRIER_READ
165 
166 			Barrier Read enable
167 			<legal all>
168 */
169 
170 #define CE_SRC_DESC_BARRIER_READ_OFFSET                                             0x00000004
171 #define CE_SRC_DESC_BARRIER_READ_LSB                                                13
172 #define CE_SRC_DESC_BARRIER_READ_MSB                                                13
173 #define CE_SRC_DESC_BARRIER_READ_MASK                                               0x00002000
174 
175 
176 /* Description		CE_RES_1
177 
178 			Reserved
179 			<legal all>
180 */
181 
182 #define CE_SRC_DESC_CE_RES_1_OFFSET                                                 0x00000004
183 #define CE_SRC_DESC_CE_RES_1_LSB                                                    14
184 #define CE_SRC_DESC_CE_RES_1_MSB                                                    15
185 #define CE_SRC_DESC_CE_RES_1_MASK                                                   0x0000c000
186 
187 
188 /* Description		LENGTH
189 
190 			Length of the buffer in units of octets of the current descriptor
191 
192 			<legal all>
193 */
194 
195 #define CE_SRC_DESC_LENGTH_OFFSET                                                   0x00000004
196 #define CE_SRC_DESC_LENGTH_LSB                                                      16
197 #define CE_SRC_DESC_LENGTH_MSB                                                      31
198 #define CE_SRC_DESC_LENGTH_MASK                                                     0xffff0000
199 
200 
201 /* Description		FW_METADATA
202 
203 			Meta data used by FW
204 			In case of gather field in first source ring entry of the
205 			 gather copy cycle in taken into account.
206 			<legal all>
207 */
208 
209 #define CE_SRC_DESC_FW_METADATA_OFFSET                                              0x00000008
210 #define CE_SRC_DESC_FW_METADATA_LSB                                                 0
211 #define CE_SRC_DESC_FW_METADATA_MSB                                                 15
212 #define CE_SRC_DESC_FW_METADATA_MASK                                                0x0000ffff
213 
214 
215 /* Description		CE_RES_2
216 
217 			Reserved
218 			<legal all>
219 */
220 
221 #define CE_SRC_DESC_CE_RES_2_OFFSET                                                 0x00000008
222 #define CE_SRC_DESC_CE_RES_2_LSB                                                    16
223 #define CE_SRC_DESC_CE_RES_2_MSB                                                    31
224 #define CE_SRC_DESC_CE_RES_2_MASK                                                   0xffff0000
225 
226 
227 /* Description		CE_RES_3
228 
229 			Reserved
230 			<legal all>
231 */
232 
233 #define CE_SRC_DESC_CE_RES_3_OFFSET                                                 0x0000000c
234 #define CE_SRC_DESC_CE_RES_3_LSB                                                    0
235 #define CE_SRC_DESC_CE_RES_3_MSB                                                    19
236 #define CE_SRC_DESC_CE_RES_3_MASK                                                   0x000fffff
237 
238 
239 /* Description		RING_ID
240 
241 			The buffer pointer ring ID.
242 			0 refers to the IDLE ring
243 			1 - N refers to other rings
244 
245 			Helps with debugging when dumping ring contents.
246 			<legal all>
247 */
248 
249 #define CE_SRC_DESC_RING_ID_OFFSET                                                  0x0000000c
250 #define CE_SRC_DESC_RING_ID_LSB                                                     20
251 #define CE_SRC_DESC_RING_ID_MSB                                                     27
252 #define CE_SRC_DESC_RING_ID_MASK                                                    0x0ff00000
253 
254 
255 /* Description		LOOPING_COUNT
256 
257 			A count value that indicates the number of times the producer
258 			 of entries into the Ring has looped around the ring.
259 			At initialization time, this value is set to 0. On the first
260 			 loop, this value is set to 1. After the max value is reached
261 			 allowed by the number of bits for this field, the count
262 			 value continues with 0 again.
263 			In case SW is the consumer of the ring entries, it can use
264 			 this field to figure out up to where the producer of entries
265 			 has created new entries. This eliminates the need to check
266 			 where the "head pointer' of the ring is located once the
267 			 SW starts processing an interrupt indicating that new entries
268 			 have been put into this ring...
269 			Also note that SW if it wants only needs to look at the
270 			LSB bit of this count value.
271 			<legal all>
272 */
273 
274 #define CE_SRC_DESC_LOOPING_COUNT_OFFSET                                            0x0000000c
275 #define CE_SRC_DESC_LOOPING_COUNT_LSB                                               28
276 #define CE_SRC_DESC_LOOPING_COUNT_MSB                                               31
277 #define CE_SRC_DESC_LOOPING_COUNT_MASK                                              0xf0000000
278 
279 
280 
281 #endif   // CE_SRC_DESC
282