1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _HE_SIG_B1_MU_INFO_H_ 18 #define _HE_SIG_B1_MU_INFO_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #define NUM_OF_DWORDS_HE_SIG_B1_MU_INFO 1 23 24 25 struct he_sig_b1_mu_info { 26 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 27 uint32_t ru_allocation : 8, // [7:0] 28 reserved_0 : 23, // [30:8] 29 rx_integrity_check_passed : 1; // [31:31] 30 #else 31 uint32_t rx_integrity_check_passed : 1, // [31:31] 32 reserved_0 : 23, // [30:8] 33 ru_allocation : 8; // [7:0] 34 #endif 35 }; 36 37 38 /* Description RU_ALLOCATION 39 40 RU allocation for the user(s) following this common portion 41 of the SIG 42 43 For details, refer to RU_TYPE description 44 <legal all> 45 */ 46 47 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_OFFSET 0x00000000 48 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_LSB 0 49 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_MSB 7 50 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_MASK 0x000000ff 51 52 53 /* Description RESERVED_0 54 55 <legal 0> 56 */ 57 58 #define HE_SIG_B1_MU_INFO_RESERVED_0_OFFSET 0x00000000 59 #define HE_SIG_B1_MU_INFO_RESERVED_0_LSB 8 60 #define HE_SIG_B1_MU_INFO_RESERVED_0_MSB 30 61 #define HE_SIG_B1_MU_INFO_RESERVED_0_MASK 0x7fffff00 62 63 64 /* Description RX_INTEGRITY_CHECK_PASSED 65 66 TX side: Set to 0 67 RX side: Set to 1 if PHY determines the CRC check of the 68 codeblock containing the HE-SIG-B common info has passed, 69 else set to 0 70 71 <legal all> 72 */ 73 74 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000000 75 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31 76 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31 77 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000 78 79 80 81 #endif // HE_SIG_B1_MU_INFO 82