xref: /wlan-driver/fw-api/hw/qcn6432/l_sig_b_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _L_SIG_B_INFO_H_
18 #define _L_SIG_B_INFO_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #define NUM_OF_DWORDS_L_SIG_B_INFO 1
23 
24 
25 struct l_sig_b_info {
26 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
27              uint32_t rate                                                    :  4, // [3:0]
28                       length                                                  : 12, // [15:4]
29                       reserved                                                : 15, // [30:16]
30                       rx_integrity_check_passed                               :  1; // [31:31]
31 #else
32              uint32_t rx_integrity_check_passed                               :  1, // [31:31]
33                       reserved                                                : 15, // [30:16]
34                       length                                                  : 12, // [15:4]
35                       rate                                                    :  4; // [3:0]
36 #endif
37 };
38 
39 
40 /* Description		RATE
41 
42 			<enum 1    dsss_1_mpbs_long> DSSS 1 Mbps long
43 			<enum 2    dsss_2_mbps_long> DSSS 2 Mbps long
44 			<enum 3    cck_5_5_mbps_long> CCK 5.5 Mbps long
45 			<enum 4    cck_11_mbps_long> CCK 11 Mbps long
46 			<enum 5    dsss_2_mbps_short> DSSS 2 Mbps short
47 			<enum 6    cck_5_5_mbps_short> CCK 5.5 Mbps short
48 			<enum 7    cck_11_mbps_short> CCK 11 Mbps short
49 			<legal 1-7>
50 */
51 
52 #define L_SIG_B_INFO_RATE_OFFSET                                                    0x00000000
53 #define L_SIG_B_INFO_RATE_LSB                                                       0
54 #define L_SIG_B_INFO_RATE_MSB                                                       3
55 #define L_SIG_B_INFO_RATE_MASK                                                      0x0000000f
56 
57 
58 /* Description		LENGTH
59 
60 			The length indicates the number of octets in this MPDU.
61 			<legal all>
62 */
63 
64 #define L_SIG_B_INFO_LENGTH_OFFSET                                                  0x00000000
65 #define L_SIG_B_INFO_LENGTH_LSB                                                     4
66 #define L_SIG_B_INFO_LENGTH_MSB                                                     15
67 #define L_SIG_B_INFO_LENGTH_MASK                                                    0x0000fff0
68 
69 
70 /* Description		RESERVED
71 
72 			Reserved: Should be set to 0 by the transmitting MAC and
73 			 ignored by the PHY <legal 0>
74 */
75 
76 #define L_SIG_B_INFO_RESERVED_OFFSET                                                0x00000000
77 #define L_SIG_B_INFO_RESERVED_LSB                                                   16
78 #define L_SIG_B_INFO_RESERVED_MSB                                                   30
79 #define L_SIG_B_INFO_RESERVED_MASK                                                  0x7fff0000
80 
81 
82 /* Description		RX_INTEGRITY_CHECK_PASSED
83 
84 			TX side: Set to 0
85 			RX side: Set to 1 if PHY determines the .11b PHY header
86 			CRC check has passed, else set to 0
87 
88 			<legal all>
89 */
90 
91 #define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET                               0x00000000
92 #define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_LSB                                  31
93 #define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_MSB                                  31
94 #define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_MASK                                 0x80000000
95 
96 
97 
98 #endif   // L_SIG_B_INFO
99