xref: /wlan-driver/fw-api/hw/qcn6432/mactx_eht_sig_usr_ofdma.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _MACTX_EHT_SIG_USR_OFDMA_H_
18 #define _MACTX_EHT_SIG_USR_OFDMA_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #include "eht_sig_usr_ofdma_info.h"
23 #define NUM_OF_DWORDS_MACTX_EHT_SIG_USR_OFDMA 2
24 
25 #define NUM_OF_QWORDS_MACTX_EHT_SIG_USR_OFDMA 1
26 
27 
28 struct mactx_eht_sig_usr_ofdma {
29 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
30              struct   eht_sig_usr_ofdma_info                                    mactx_eht_sig_usr_ofdma_info_details;
31 #else
32              struct   eht_sig_usr_ofdma_info                                    mactx_eht_sig_usr_ofdma_info_details;
33 #endif
34 };
35 
36 
37 /* Description		MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS
38 
39 			See detailed description of the STRUCT
40 */
41 
42 
43 /* Description		STA_ID
44 
45 			Identifies the STA that is addressed. Details of STA ID
46 			are TBD
47 */
48 
49 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_ID_OFFSET  0x0000000000000000
50 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_ID_LSB     0
51 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_ID_MSB     10
52 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_ID_MASK    0x00000000000007ff
53 
54 
55 /* Description		STA_MCS
56 
57 			Indicates the data MCS
58 			0 - 13: MCS 0 - 13
59 			14: validate
60 			15: MCS 0 with DCM
61 			<legal 0-13, 15>
62 */
63 
64 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_MCS_OFFSET 0x0000000000000000
65 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_MCS_LSB    11
66 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_MCS_MSB    14
67 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_MCS_MASK   0x0000000000007800
68 
69 
70 /* Description		VALIDATE_0A
71 
72 			Note: spec indicates this shall be set to 1
73 			<legal 1>
74 */
75 
76 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_VALIDATE_0A_OFFSET 0x0000000000000000
77 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_VALIDATE_0A_LSB 15
78 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_VALIDATE_0A_MSB 15
79 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_VALIDATE_0A_MASK 0x0000000000008000
80 
81 
82 /* Description		NSS
83 
84 			Number of spatial streams for this user
85 
86 			The actual number of streams is 1 larger than indicated
87 			in this field.
88 			<legal all>
89 */
90 
91 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_NSS_OFFSET     0x0000000000000000
92 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_NSS_LSB        16
93 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_NSS_MSB        19
94 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_NSS_MASK       0x00000000000f0000
95 
96 
97 /* Description		TXBF
98 
99 			Indicates whether beamforming is applied
100 			0: No beamforming
101 			1: beamforming
102 			<legal all>
103 */
104 
105 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_TXBF_OFFSET    0x0000000000000000
106 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_TXBF_LSB       20
107 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_TXBF_MSB       20
108 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_TXBF_MASK      0x0000000000100000
109 
110 
111 /* Description		STA_CODING
112 
113 			Distinguishes between BCC/LDPC
114 
115 			0: BCC
116 			1: LDPC
117 			<legal all>
118 */
119 
120 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_CODING_OFFSET 0x0000000000000000
121 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_CODING_LSB 21
122 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_CODING_MSB 21
123 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_STA_CODING_MASK 0x0000000000200000
124 
125 
126 /* Description		RESERVED_0B
127 
128 			<legal 0>
129 */
130 
131 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_RESERVED_0B_OFFSET 0x0000000000000000
132 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_RESERVED_0B_LSB 22
133 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_RESERVED_0B_MSB 22
134 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_RESERVED_0B_MASK 0x0000000000400000
135 
136 
137 /* Description		RX_INTEGRITY_CHECK_PASSED
138 
139 			TX side: Set to 0
140 			RX side: Set to 1 if PHY determines the CRC check of the
141 			 codeblock containing this EHT-SIG user info has passed,
142 			else set to 0
143 
144 			<legal all>
145 */
146 
147 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000
148 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 23
149 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 23
150 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x0000000000800000
151 
152 
153 /* Description		SUBBAND80_CC_MASK
154 
155 			RX side: Set to 0
156 			TX side: Indicates what content channels of what 80 MHz
157 			subbands this User field can go to
158 			Bit 0: lowest 80 MHz content channel 0
159 			Bit 1: lowest 80 MHz content channel 1
160 			Bit 2: 2nd lowest 80 MHz content channel 0
161 			...
162 			Bit 7: highest 80 MHz content channel 1
163 			<legal all>
164 */
165 
166 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_SUBBAND80_CC_MASK_OFFSET 0x0000000000000000
167 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_SUBBAND80_CC_MASK_LSB 24
168 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_SUBBAND80_CC_MASK_MSB 31
169 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_SUBBAND80_CC_MASK_MASK 0x00000000ff000000
170 
171 
172 /* Description		USER_ORDER_SUBBAND80_0
173 
174 			RX side: Set to 0
175 			TX side: Ordering index of the User field within the lowest
176 			 80 MHz
177 			Gaps between the ordering indices of User fields indicate
178 			 that the microcode shall generate "unallocated RU" User
179 			 fields (STAID=2046) to fill the gaps.
180 			<legal all>
181 */
182 
183 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_0_OFFSET 0x0000000000000000
184 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_0_LSB 32
185 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_0_MSB 39
186 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_0_MASK 0x000000ff00000000
187 
188 
189 /* Description		USER_ORDER_SUBBAND80_1
190 
191 			RX side: Set to 0
192 			TX side: Ordering index of the User field within the 2nd
193 			 lowest 80 MHz
194 			See 'user_order_subband80_0.'
195 			<legal all>
196 */
197 
198 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_1_OFFSET 0x0000000000000000
199 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_1_LSB 40
200 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_1_MSB 47
201 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_1_MASK 0x0000ff0000000000
202 
203 
204 /* Description		USER_ORDER_SUBBAND80_2
205 
206 			RX side: Set to 0
207 			TX side: Ordering index of the User field within the 2nd
208 			 highest 80 MHz
209 			See 'user_order_subband80_0.'
210 			<legal all>
211 */
212 
213 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_2_OFFSET 0x0000000000000000
214 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_2_LSB 48
215 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_2_MSB 55
216 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_2_MASK 0x00ff000000000000
217 
218 
219 /* Description		USER_ORDER_SUBBAND80_3
220 
221 			RX side: Set to 0
222 			TX side: Ordering index of the User field within the highest
223 			 80 MHz
224 			See 'user_order_subband80_0.'
225 			<legal all>
226 */
227 
228 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_3_OFFSET 0x0000000000000000
229 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_3_LSB 56
230 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_3_MSB 63
231 #define MACTX_EHT_SIG_USR_OFDMA_MACTX_EHT_SIG_USR_OFDMA_INFO_DETAILS_USER_ORDER_SUBBAND80_3_MASK 0xff00000000000000
232 
233 
234 
235 #endif   // MACTX_EHT_SIG_USR_OFDMA
236