1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _MACTX_HE_SIG_A_SU_H_ 18 #define _MACTX_HE_SIG_A_SU_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #include "he_sig_a_su_info.h" 23 #define NUM_OF_DWORDS_MACTX_HE_SIG_A_SU 2 24 25 #define NUM_OF_QWORDS_MACTX_HE_SIG_A_SU 1 26 27 28 struct mactx_he_sig_a_su { 29 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 30 struct he_sig_a_su_info mactx_he_sig_a_su_info_details; 31 #else 32 struct he_sig_a_su_info mactx_he_sig_a_su_info_details; 33 #endif 34 }; 35 36 37 /* Description MACTX_HE_SIG_A_SU_INFO_DETAILS 38 39 See detailed description of the STRUCT 40 */ 41 42 43 /* Description FORMAT_INDICATION 44 45 <enum 0 HE_SIGA_FORMAT_HE_TRIG> 46 <enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU> 47 <legal all> 48 */ 49 50 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_OFFSET 0x0000000000000000 51 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_LSB 0 52 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_MSB 0 53 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_MASK 0x0000000000000001 54 55 56 /* Description BEAM_CHANGE 57 58 Indicates whether spatial mapping is changed between legacy 59 and HE portion of preamble. If not, channel estimation 60 can include legacy preamble to improve accuracy 61 <legal all> 62 */ 63 64 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_OFFSET 0x0000000000000000 65 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_LSB 1 66 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_MSB 1 67 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_MASK 0x0000000000000002 68 69 70 /* Description DL_UL_FLAG 71 72 Differentiates between DL and UL transmission 73 74 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 75 <enum 1 DL_UL_FLAG_IS_UL> 76 <legal all> 77 */ 78 79 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_OFFSET 0x0000000000000000 80 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_LSB 2 81 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_MSB 2 82 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_MASK 0x0000000000000004 83 84 85 /* Description TRANSMIT_MCS 86 87 Indicates the data MCS 88 89 Field Used by MAC HW 90 <legal all> 91 */ 92 93 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_OFFSET 0x0000000000000000 94 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_LSB 3 95 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_MSB 6 96 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_MASK 0x0000000000000078 97 98 99 /* Description DCM 100 101 Indicates whether dual sub-carrier modulation is applied 102 103 0: No DCM 104 1:DCM 105 <legal all> 106 */ 107 108 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DCM_OFFSET 0x0000000000000000 109 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DCM_LSB 7 110 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DCM_MSB 7 111 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DCM_MASK 0x0000000000000080 112 113 114 /* Description BSS_COLOR_ID 115 116 BSS color ID 117 118 Field Used by MAC HW 119 <legal all> 120 */ 121 122 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_OFFSET 0x0000000000000000 123 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_LSB 8 124 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_MSB 13 125 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_MASK 0x0000000000003f00 126 127 128 /* Description RESERVED_0A 129 130 Note: spec indicates this shall be set to 1 131 <legal 1> 132 */ 133 134 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_OFFSET 0x0000000000000000 135 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_LSB 14 136 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_MSB 14 137 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_MASK 0x0000000000004000 138 139 140 /* Description SPATIAL_REUSE 141 142 Spatial reuse 143 144 For 20MHz one SR field corresponding to entire 20MHz (other 145 3 fields indicate identical values) 146 For 40MHz two SR fields for each 20MHz (other 2 fields indicate 147 identical values) 148 For 80MHz four SR fields for each 20MHz 149 For 160MHz four SR fields for each 40MHz 150 <legal all> 151 */ 152 153 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_OFFSET 0x0000000000000000 154 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_LSB 15 155 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_MSB 18 156 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_MASK 0x0000000000078000 157 158 159 /* Description TRANSMIT_BW 160 161 Bandwidth of the PPDU. 162 163 For HE SU PPDU 164 165 166 167 <enum 0 HE_SIG_A_BW20> 20 Mhz 168 <enum 1 HE_SIG_A_BW40> 40 Mhz 169 <enum 2 HE_SIG_A_BW80> 80 Mhz 170 <enum 3 HE_SIG_A_BW160> 160 MHz or 80+80 MHz 171 172 For HE Extended Range SU PPDU 173 Set to 0 for 242-tone RU 174 175 Set to 1 for right 106-tone RU within 176 the primary 20 MHz 177 178 On RX side, Field Used by MAC HW 179 <legal all> 180 */ 181 182 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_OFFSET 0x0000000000000000 183 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_LSB 19 184 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_MSB 20 185 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_MASK 0x0000000000180000 186 187 188 /* Description CP_LTF_SIZE 189 190 Indicates the CP and HE-LTF type 191 192 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 193 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 194 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 195 196 <enum 3 FourX_LTF_0_8CP_3_2CP> 197 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 198 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 199 In this scenario, Neither DCM nor STBC is applied to HE 200 data field. 201 202 NOTE: 203 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 204 0 = 1xLTF + 0.4 usec 205 1 = 2xLTF + 0.4 usec 206 2~3 = Reserved 207 208 <legal all> 209 */ 210 211 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_OFFSET 0x0000000000000000 212 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_LSB 21 213 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_MSB 22 214 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_MASK 0x0000000000600000 215 216 217 /* Description NSTS 218 219 Indicates number of streams used for the SU transmission 220 221 222 For HE SU PPDU 223 224 225 Set to n for n+1 space time stream, 226 where n = 0, 1, 2,.....,7. 227 228 229 230 231 For HE Extended Range PPDU 232 233 234 Set to 0 for 1 space time stream. 235 Value 1 is TBD 236 237 238 239 Values 2 - 7 are reserved 240 <legal all> 241 */ 242 243 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_NSTS_OFFSET 0x0000000000000000 244 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_NSTS_LSB 23 245 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_NSTS_MSB 25 246 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_NSTS_MASK 0x0000000003800000 247 248 249 /* Description RESERVED_0B 250 251 <legal 0> 252 */ 253 254 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_OFFSET 0x0000000000000000 255 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_LSB 26 256 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_MSB 31 257 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_MASK 0x00000000fc000000 258 259 260 /* Description TXOP_DURATION 261 262 Indicates the remaining time in the current TXOP 263 264 Field Used by MAC HW 265 <legal all> 266 */ 267 268 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_OFFSET 0x0000000000000000 269 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_LSB 32 270 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_MSB 38 271 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_MASK 0x0000007f00000000 272 273 274 /* Description CODING 275 276 Distinguishes between BCC and LDPC coding. 277 278 0: BCC 279 1: LDPC 280 <legal all> 281 */ 282 283 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CODING_OFFSET 0x0000000000000000 284 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CODING_LSB 39 285 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CODING_MSB 39 286 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CODING_MASK 0x0000008000000000 287 288 289 /* Description LDPC_EXTRA_SYMBOL 290 291 If LDPC, 292 0: LDPC extra symbol not present 293 1: LDPC extra symbol present 294 Else 295 Set to 1 296 <legal all> 297 */ 298 299 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_OFFSET 0x0000000000000000 300 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_LSB 40 301 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MSB 40 302 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MASK 0x0000010000000000 303 304 305 /* Description STBC 306 307 Indicates whether STBC is applied 308 0: No STBC 309 1: STBC 310 <legal all> 311 */ 312 313 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_STBC_OFFSET 0x0000000000000000 314 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_STBC_LSB 41 315 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_STBC_MSB 41 316 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_STBC_MASK 0x0000020000000000 317 318 319 /* Description TXBF 320 321 Indicates whether beamforming is applied 322 0: No beamforming 323 1: beamforming 324 <legal all> 325 */ 326 327 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXBF_OFFSET 0x0000000000000000 328 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXBF_LSB 42 329 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXBF_MSB 42 330 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXBF_MASK 0x0000040000000000 331 332 333 /* Description PACKET_EXTENSION_A_FACTOR 334 335 Common trigger info 336 337 the packet extension duration of the trigger-based PPDU 338 response with these two bits indicating the "a-factor" 339 340 <enum 0 a_factor_4> 341 <enum 1 a_factor_1> 342 <enum 2 a_factor_2> 343 <enum 3 a_factor_3> 344 345 <legal all> 346 */ 347 348 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_OFFSET 0x0000000000000000 349 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_LSB 43 350 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MSB 44 351 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MASK 0x0000180000000000 352 353 354 /* Description PACKET_EXTENSION_PE_DISAMBIGUITY 355 356 Common trigger info 357 358 the packet extension duration of the trigger-based PPDU 359 response with this bit indicating the PE-Disambiguity 360 <legal all> 361 */ 362 363 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET 0x0000000000000000 364 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB 45 365 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MSB 45 366 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK 0x0000200000000000 367 368 369 /* Description RESERVED_1A 370 371 Note: per standard, set to 1 372 <legal 1> 373 */ 374 375 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_OFFSET 0x0000000000000000 376 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_LSB 46 377 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_MSB 46 378 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_MASK 0x0000400000000000 379 380 381 /* Description DOPPLER_INDICATION 382 383 0: No Doppler support 384 1: Doppler support 385 <legal all> 386 */ 387 388 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_OFFSET 0x0000000000000000 389 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_LSB 47 390 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_MSB 47 391 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_MASK 0x0000800000000000 392 393 394 /* Description CRC 395 396 CRC for HE-SIG-A contents. 397 <legal all> 398 */ 399 400 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CRC_OFFSET 0x0000000000000000 401 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CRC_LSB 48 402 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CRC_MSB 51 403 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CRC_MASK 0x000f000000000000 404 405 406 /* Description TAIL 407 408 <legal 0> 409 */ 410 411 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TAIL_OFFSET 0x0000000000000000 412 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TAIL_LSB 52 413 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TAIL_MSB 57 414 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TAIL_MASK 0x03f0000000000000 415 416 417 /* Description DOT11AX_SU_EXTENDED 418 419 TX side: 420 Set to 0 421 422 RX side: 423 On RX side, evaluated by MAC HW. This is the only way for 424 MAC RX to know that this was an HE_SIG_A_SU received in 425 'extended' format 426 427 When set, the 11ax frame is of the extended range format 428 429 <legal all> 430 */ 431 432 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000000 433 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_LSB 58 434 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_MSB 58 435 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_MASK 0x0400000000000000 436 437 438 /* Description DOT11AX_EXT_RU_SIZE 439 440 TX side: 441 Set to 0 442 443 RX side: 444 Field only contains valid info when dot11ax_su_extended 445 is set. 446 447 On RX side, evaluated by MAC HW. This is the only way for 448 MAC RX to know what the number of based RUs was in this 449 extended range reception. It is used by the MAC to determine 450 the RU size for the response... 451 452 <enum 0 EXT_RU_26> 453 <enum 1 EXT_RU_52> 454 <enum 2 EXT_RU_106> 455 <enum 3 EXT_RU_242><legal 0-3> 456 */ 457 458 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000000 459 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_LSB 59 460 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_MSB 61 461 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_MASK 0x3800000000000000 462 463 464 /* Description RX_NDP 465 466 TX side: 467 Set to 0 468 469 RX side:Valid on RX side only, and looked at by MAC HW 470 471 When set, PHY has received (expected) NDP frame 472 <legal all> 473 */ 474 475 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_OFFSET 0x0000000000000000 476 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_LSB 62 477 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_MSB 62 478 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_MASK 0x4000000000000000 479 480 481 /* Description RX_INTEGRITY_CHECK_PASSED 482 483 TX side: Set to 0 484 RX side: Set to 1 if PHY determines the HE-SIG-A CRC check 485 has passed, else set to 0 486 487 <legal all> 488 */ 489 490 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000 491 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 63 492 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 63 493 #define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x8000000000000000 494 495 496 497 #endif // MACTX_HE_SIG_A_SU 498