xref: /wlan-driver/fw-api/hw/qcn6432/mactx_u_sig_eht_su_mu.h (revision 5113495b16420b49004c444715d2daae2066e7dc) 
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3*5113495bSYour Name  *
4*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for any
5*5113495bSYour Name  * purpose with or without fee is hereby granted, provided that the above
6*5113495bSYour Name  * copyright notice and this permission notice appear in all copies.
7*5113495bSYour Name  *
8*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*5113495bSYour Name  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*5113495bSYour Name  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*5113495bSYour Name  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*5113495bSYour Name  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*5113495bSYour Name  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*5113495bSYour Name  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*5113495bSYour Name  */
16*5113495bSYour Name 
17*5113495bSYour Name #ifndef _MACTX_U_SIG_EHT_SU_MU_H_
18*5113495bSYour Name #define _MACTX_U_SIG_EHT_SU_MU_H_
19*5113495bSYour Name #if !defined(__ASSEMBLER__)
20*5113495bSYour Name #endif
21*5113495bSYour Name 
22*5113495bSYour Name #include "u_sig_eht_su_mu_info.h"
23*5113495bSYour Name #define NUM_OF_DWORDS_MACTX_U_SIG_EHT_SU_MU 2
24*5113495bSYour Name 
25*5113495bSYour Name #define NUM_OF_QWORDS_MACTX_U_SIG_EHT_SU_MU 1
26*5113495bSYour Name 
27*5113495bSYour Name 
28*5113495bSYour Name struct mactx_u_sig_eht_su_mu {
29*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
30*5113495bSYour Name              struct   u_sig_eht_su_mu_info                                      mactx_u_sig_eht_su_mu_info_details;
31*5113495bSYour Name #else
32*5113495bSYour Name              struct   u_sig_eht_su_mu_info                                      mactx_u_sig_eht_su_mu_info_details;
33*5113495bSYour Name #endif
34*5113495bSYour Name };
35*5113495bSYour Name 
36*5113495bSYour Name 
37*5113495bSYour Name /* Description		MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS
38*5113495bSYour Name 
39*5113495bSYour Name 			See detailed description of the STRUCT
40*5113495bSYour Name */
41*5113495bSYour Name 
42*5113495bSYour Name 
43*5113495bSYour Name /* Description		PHY_VERSION
44*5113495bSYour Name 
45*5113495bSYour Name 			<enum 0 U_SIG_VERSION_EHT>
46*5113495bSYour Name 			Values 1 - 7 are reserved.
47*5113495bSYour Name 			<legal 0
48*5113495bSYour Name */
49*5113495bSYour Name 
50*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_PHY_VERSION_OFFSET 0x0000000000000000
51*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_PHY_VERSION_LSB    0
52*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_PHY_VERSION_MSB    2
53*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_PHY_VERSION_MASK   0x0000000000000007
54*5113495bSYour Name 
55*5113495bSYour Name 
56*5113495bSYour Name /* Description		TRANSMIT_BW
57*5113495bSYour Name 
58*5113495bSYour Name 			Bandwidth of the PPDU
59*5113495bSYour Name 
60*5113495bSYour Name 			<enum 0 U_SIG_BW20> 20 MHz
61*5113495bSYour Name 			<enum 1 U_SIG_BW40> 40 MHz
62*5113495bSYour Name 			<enum 2 U_SIG_BW80> 80 MHz
63*5113495bSYour Name 			<enum 3 U_SIG_BW160> 160 MHz
64*5113495bSYour Name 			<enum 4 U_SIG_BW320> 320 MHz
65*5113495bSYour Name 			<enum 5 U_SIG_BW320_2> DO NOT USE
66*5113495bSYour Name 
67*5113495bSYour Name 			Microcode remaps 'U_SIG_BW320' based on channelization.
68*5113495bSYour Name 
69*5113495bSYour Name 			On RX side, field used by MAC HW
70*5113495bSYour Name 			<legal all>
71*5113495bSYour Name */
72*5113495bSYour Name 
73*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TRANSMIT_BW_OFFSET 0x0000000000000000
74*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TRANSMIT_BW_LSB    3
75*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TRANSMIT_BW_MSB    5
76*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TRANSMIT_BW_MASK   0x0000000000000038
77*5113495bSYour Name 
78*5113495bSYour Name 
79*5113495bSYour Name /* Description		DL_UL_FLAG
80*5113495bSYour Name 
81*5113495bSYour Name 			Differentiates between DL and UL transmission
82*5113495bSYour Name 
83*5113495bSYour Name 			<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
84*5113495bSYour Name 			<enum 1 DL_UL_FLAG_IS_UL>
85*5113495bSYour Name 			<legal all>
86*5113495bSYour Name */
87*5113495bSYour Name 
88*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DL_UL_FLAG_OFFSET  0x0000000000000000
89*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DL_UL_FLAG_LSB     6
90*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DL_UL_FLAG_MSB     6
91*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DL_UL_FLAG_MASK    0x0000000000000040
92*5113495bSYour Name 
93*5113495bSYour Name 
94*5113495bSYour Name /* Description		BSS_COLOR_ID
95*5113495bSYour Name 
96*5113495bSYour Name 			BSS color ID
97*5113495bSYour Name 
98*5113495bSYour Name 			Field used by MAC HW
99*5113495bSYour Name 			<legal all>
100*5113495bSYour Name */
101*5113495bSYour Name 
102*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_BSS_COLOR_ID_OFFSET 0x0000000000000000
103*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_BSS_COLOR_ID_LSB   7
104*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_BSS_COLOR_ID_MSB   12
105*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_BSS_COLOR_ID_MASK  0x0000000000001f80
106*5113495bSYour Name 
107*5113495bSYour Name 
108*5113495bSYour Name /* Description		TXOP_DURATION
109*5113495bSYour Name 
110*5113495bSYour Name 			Indicates the remaining time in the current TXOP
111*5113495bSYour Name 
112*5113495bSYour Name 			Field used by MAC HW
113*5113495bSYour Name 			 <legal all>
114*5113495bSYour Name */
115*5113495bSYour Name 
116*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TXOP_DURATION_OFFSET 0x0000000000000000
117*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TXOP_DURATION_LSB  13
118*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TXOP_DURATION_MSB  19
119*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TXOP_DURATION_MASK 0x00000000000fe000
120*5113495bSYour Name 
121*5113495bSYour Name 
122*5113495bSYour Name /* Description		DISREGARD_0A
123*5113495bSYour Name 
124*5113495bSYour Name 			Note: spec indicates this shall be set to 1s
125*5113495bSYour Name 			<legal 31>
126*5113495bSYour Name */
127*5113495bSYour Name 
128*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DISREGARD_0A_OFFSET 0x0000000000000000
129*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DISREGARD_0A_LSB   20
130*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DISREGARD_0A_MSB   24
131*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DISREGARD_0A_MASK  0x0000000001f00000
132*5113495bSYour Name 
133*5113495bSYour Name 
134*5113495bSYour Name /* Description		VALIDATE_0B
135*5113495bSYour Name 
136*5113495bSYour Name 			Note: spec indicates this shall be set to 1
137*5113495bSYour Name 			<legal 1>
138*5113495bSYour Name */
139*5113495bSYour Name 
140*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_0B_OFFSET 0x0000000000000000
141*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_0B_LSB    25
142*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_0B_MSB    25
143*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_0B_MASK   0x0000000002000000
144*5113495bSYour Name 
145*5113495bSYour Name 
146*5113495bSYour Name /* Description		RESERVED_0C
147*5113495bSYour Name 
148*5113495bSYour Name 			<legal 0>
149*5113495bSYour Name */
150*5113495bSYour Name 
151*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RESERVED_0C_OFFSET 0x0000000000000000
152*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RESERVED_0C_LSB    26
153*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RESERVED_0C_MSB    31
154*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RESERVED_0C_MASK   0x00000000fc000000
155*5113495bSYour Name 
156*5113495bSYour Name 
157*5113495bSYour Name /* Description		EHT_PPDU_SIG_CMN_TYPE
158*5113495bSYour Name 
159*5113495bSYour Name 			<enum 3 EHT_PPDU_SIG_rsvd> DO NOT USE
160*5113495bSYour Name 			<enum 0 EHT_PPDU_SIG_TB_or_DL_OFDMA> Need to look at both
161*5113495bSYour Name 			 EHT-SIG content channels for DL OFDMA (including OFDMA+MU-MIMO)
162*5113495bSYour Name 
163*5113495bSYour Name 			<enum 2 EHT_PPDU_SIG_DL_MU_MIMO> Need to look at both EHT-SIG
164*5113495bSYour Name 			 content channels
165*5113495bSYour Name 			<enum 1 EHT_PPDU_SIG_SU> Need to look at only one EHT-SIG
166*5113495bSYour Name 			 content channel
167*5113495bSYour Name 			<legal all>
168*5113495bSYour Name */
169*5113495bSYour Name 
170*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_EHT_PPDU_SIG_CMN_TYPE_OFFSET 0x0000000000000000
171*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_EHT_PPDU_SIG_CMN_TYPE_LSB 32
172*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_EHT_PPDU_SIG_CMN_TYPE_MSB 33
173*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_EHT_PPDU_SIG_CMN_TYPE_MASK 0x0000000300000000
174*5113495bSYour Name 
175*5113495bSYour Name 
176*5113495bSYour Name /* Description		VALIDATE_1A
177*5113495bSYour Name 
178*5113495bSYour Name 			Note: spec indicates this shall be set to 1
179*5113495bSYour Name 			<legal 1>
180*5113495bSYour Name */
181*5113495bSYour Name 
182*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_1A_OFFSET 0x0000000000000000
183*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_1A_LSB    34
184*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_1A_MSB    34
185*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_1A_MASK   0x0000000400000000
186*5113495bSYour Name 
187*5113495bSYour Name 
188*5113495bSYour Name /* Description		PUNCTURED_CHANNEL_INFORMATION
189*5113495bSYour Name 
190*5113495bSYour Name 			For OFDMA BW 20 MHz or 40 MHz:
191*5113495bSYour Name 			Set to all 1s, i.e. 31
192*5113495bSYour Name 
193*5113495bSYour Name 			For OFDMA of higher BW:
194*5113495bSYour Name 			Bit 3 = lowest 20 MHz in the current 80 MHz
195*5113495bSYour Name 			Bit 6 = highest 20 MHz in the current 80 MHz
196*5113495bSYour Name 			Bit 7 = 1
197*5113495bSYour Name 
198*5113495bSYour Name 			Each bit indicates whether the 20 MHz is modulated or punctured
199*5113495bSYour Name 
200*5113495bSYour Name 			0 = punctured
201*5113495bSYour Name 			1 = modulated
202*5113495bSYour Name 
203*5113495bSYour Name 			For non-OFDMA:
204*5113495bSYour Name 			Set to a 5-bit value encoding the puncture pattern, a.k.a. 'U_sig_puncture_pattern_encoding'
205*5113495bSYour Name 			elsewhere in the data structures
206*5113495bSYour Name 
207*5113495bSYour Name 			<legal all>
208*5113495bSYour Name */
209*5113495bSYour Name 
210*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_PUNCTURED_CHANNEL_INFORMATION_OFFSET 0x0000000000000000
211*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_PUNCTURED_CHANNEL_INFORMATION_LSB 35
212*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_PUNCTURED_CHANNEL_INFORMATION_MSB 39
213*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_PUNCTURED_CHANNEL_INFORMATION_MASK 0x000000f800000000
214*5113495bSYour Name 
215*5113495bSYour Name 
216*5113495bSYour Name /* Description		VALIDATE_1B
217*5113495bSYour Name 
218*5113495bSYour Name 			Note: spec indicates this shall be set to 1
219*5113495bSYour Name 			<legal 1>
220*5113495bSYour Name */
221*5113495bSYour Name 
222*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_1B_OFFSET 0x0000000000000000
223*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_1B_LSB    40
224*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_1B_MSB    40
225*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_VALIDATE_1B_MASK   0x0000010000000000
226*5113495bSYour Name 
227*5113495bSYour Name 
228*5113495bSYour Name /* Description		MCS_OF_EHT_SIG
229*5113495bSYour Name 
230*5113495bSYour Name 			Indicates the MCS of EHT-SIG
231*5113495bSYour Name 			0 - 1: MCS 0 - 1
232*5113495bSYour Name 			2: MCS 3
233*5113495bSYour Name 			3: MCS 0 with DCM
234*5113495bSYour Name 			<legal all>
235*5113495bSYour Name */
236*5113495bSYour Name 
237*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_MCS_OF_EHT_SIG_OFFSET 0x0000000000000000
238*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_MCS_OF_EHT_SIG_LSB 41
239*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_MCS_OF_EHT_SIG_MSB 42
240*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_MCS_OF_EHT_SIG_MASK 0x0000060000000000
241*5113495bSYour Name 
242*5113495bSYour Name 
243*5113495bSYour Name /* Description		NUM_EHT_SIG_SYMBOLS
244*5113495bSYour Name 
245*5113495bSYour Name 			Number of symbols
246*5113495bSYour Name 
247*5113495bSYour Name 			The actual number of symbols is 1 larger than indicated
248*5113495bSYour Name 			in this field.
249*5113495bSYour Name 
250*5113495bSYour Name 			<legal all>
251*5113495bSYour Name */
252*5113495bSYour Name 
253*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_NUM_EHT_SIG_SYMBOLS_OFFSET 0x0000000000000000
254*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_NUM_EHT_SIG_SYMBOLS_LSB 43
255*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_NUM_EHT_SIG_SYMBOLS_MSB 47
256*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_NUM_EHT_SIG_SYMBOLS_MASK 0x0000f80000000000
257*5113495bSYour Name 
258*5113495bSYour Name 
259*5113495bSYour Name /* Description		CRC
260*5113495bSYour Name 
261*5113495bSYour Name 			CRC for U-SIG contents
262*5113495bSYour Name 			<legal all>
263*5113495bSYour Name */
264*5113495bSYour Name 
265*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_CRC_OFFSET         0x0000000000000000
266*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_CRC_LSB            48
267*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_CRC_MSB            51
268*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_CRC_MASK           0x000f000000000000
269*5113495bSYour Name 
270*5113495bSYour Name 
271*5113495bSYour Name /* Description		TAIL
272*5113495bSYour Name 
273*5113495bSYour Name 			<legal 0>
274*5113495bSYour Name */
275*5113495bSYour Name 
276*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TAIL_OFFSET        0x0000000000000000
277*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TAIL_LSB           52
278*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TAIL_MSB           57
279*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_TAIL_MASK          0x03f0000000000000
280*5113495bSYour Name 
281*5113495bSYour Name 
282*5113495bSYour Name /* Description		DOT11AX_SU_EXTENDED
283*5113495bSYour Name 
284*5113495bSYour Name 			TX side:
285*5113495bSYour Name 			Set to 0
286*5113495bSYour Name 
287*5113495bSYour Name 			RX side: On RX side, evaluated by MAC HW
288*5113495bSYour Name 
289*5113495bSYour Name 			This is the only way for MAC RX to know that this was a
290*5113495bSYour Name 			U_SIG_EHT_SU received in extended range format.
291*5113495bSYour Name 
292*5113495bSYour Name 			When set, the 11be frame is of the extended range format.
293*5113495bSYour Name 
294*5113495bSYour Name 			<legal all>
295*5113495bSYour Name */
296*5113495bSYour Name 
297*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000000
298*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DOT11AX_SU_EXTENDED_LSB 58
299*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DOT11AX_SU_EXTENDED_MSB 58
300*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_DOT11AX_SU_EXTENDED_MASK 0x0400000000000000
301*5113495bSYour Name 
302*5113495bSYour Name 
303*5113495bSYour Name /* Description		RESERVED_1D
304*5113495bSYour Name 
305*5113495bSYour Name 			<legal 0>
306*5113495bSYour Name */
307*5113495bSYour Name 
308*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RESERVED_1D_OFFSET 0x0000000000000000
309*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RESERVED_1D_LSB    59
310*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RESERVED_1D_MSB    61
311*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RESERVED_1D_MASK   0x3800000000000000
312*5113495bSYour Name 
313*5113495bSYour Name 
314*5113495bSYour Name /* Description		RX_NDP
315*5113495bSYour Name 
316*5113495bSYour Name 			TX side:
317*5113495bSYour Name 			Set to 0
318*5113495bSYour Name 
319*5113495bSYour Name 			RX side: On RX side, looked at by MAC HW
320*5113495bSYour Name 
321*5113495bSYour Name 			When set, PHY has received an (expected) NDP frame
322*5113495bSYour Name 			<legal all>
323*5113495bSYour Name */
324*5113495bSYour Name 
325*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RX_NDP_OFFSET      0x0000000000000000
326*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RX_NDP_LSB         62
327*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RX_NDP_MSB         62
328*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RX_NDP_MASK        0x4000000000000000
329*5113495bSYour Name 
330*5113495bSYour Name 
331*5113495bSYour Name /* Description		RX_INTEGRITY_CHECK_PASSED
332*5113495bSYour Name 
333*5113495bSYour Name 			TX side: Set to 0
334*5113495bSYour Name 			RX side: Set to 1 if PHY determines the U-SIG CRC check
335*5113495bSYour Name 			has passed, else set to 0
336*5113495bSYour Name 
337*5113495bSYour Name 			<legal all>
338*5113495bSYour Name */
339*5113495bSYour Name 
340*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000
341*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 63
342*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 63
343*5113495bSYour Name #define MACTX_U_SIG_EHT_SU_MU_MACTX_U_SIG_EHT_SU_MU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x8000000000000000
344*5113495bSYour Name 
345*5113495bSYour Name 
346*5113495bSYour Name 
347*5113495bSYour Name #endif   // MACTX_U_SIG_EHT_SU_MU
348