1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef _MACTX_U_SIG_EHT_TB_H_ 18*5113495bSYour Name #define _MACTX_U_SIG_EHT_TB_H_ 19*5113495bSYour Name #if !defined(__ASSEMBLER__) 20*5113495bSYour Name #endif 21*5113495bSYour Name 22*5113495bSYour Name #include "u_sig_eht_tb_info.h" 23*5113495bSYour Name #define NUM_OF_DWORDS_MACTX_U_SIG_EHT_TB 2 24*5113495bSYour Name 25*5113495bSYour Name #define NUM_OF_QWORDS_MACTX_U_SIG_EHT_TB 1 26*5113495bSYour Name 27*5113495bSYour Name 28*5113495bSYour Name struct mactx_u_sig_eht_tb { 29*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 30*5113495bSYour Name struct u_sig_eht_tb_info mactx_u_sig_eht_tb_info_details; 31*5113495bSYour Name #else 32*5113495bSYour Name struct u_sig_eht_tb_info mactx_u_sig_eht_tb_info_details; 33*5113495bSYour Name #endif 34*5113495bSYour Name }; 35*5113495bSYour Name 36*5113495bSYour Name 37*5113495bSYour Name /* Description MACTX_U_SIG_EHT_TB_INFO_DETAILS 38*5113495bSYour Name 39*5113495bSYour Name See detailed description of the STRUCT 40*5113495bSYour Name */ 41*5113495bSYour Name 42*5113495bSYour Name 43*5113495bSYour Name /* Description PHY_VERSION 44*5113495bSYour Name 45*5113495bSYour Name <enum 0 U_SIG_VERSION_EHT> 46*5113495bSYour Name Values 1 - 7 are reserved. 47*5113495bSYour Name <legal 0> 48*5113495bSYour Name */ 49*5113495bSYour Name 50*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_PHY_VERSION_OFFSET 0x0000000000000000 51*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_PHY_VERSION_LSB 0 52*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_PHY_VERSION_MSB 2 53*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_PHY_VERSION_MASK 0x0000000000000007 54*5113495bSYour Name 55*5113495bSYour Name 56*5113495bSYour Name /* Description TRANSMIT_BW 57*5113495bSYour Name 58*5113495bSYour Name Bandwidth of the PPDU, as indicated in the trigger frame 59*5113495bSYour Name 60*5113495bSYour Name 61*5113495bSYour Name <enum 0 U_SIG_BW20> 20 MHz 62*5113495bSYour Name <enum 1 U_SIG_BW40> 40 MHz 63*5113495bSYour Name <enum 2 U_SIG_BW80> 80 MHz 64*5113495bSYour Name <enum 3 U_SIG_BW160> 160 MHz 65*5113495bSYour Name <enum 4 U_SIG_BW320> 320 MHz channelization scheme 1 66*5113495bSYour Name <enum 5 U_SIG_BW320_2> 320 MHz channelization scheme 2 67*5113495bSYour Name 68*5113495bSYour Name On RX side, field used by MAC HW 69*5113495bSYour Name <legal all> 70*5113495bSYour Name */ 71*5113495bSYour Name 72*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TRANSMIT_BW_OFFSET 0x0000000000000000 73*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TRANSMIT_BW_LSB 3 74*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TRANSMIT_BW_MSB 5 75*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TRANSMIT_BW_MASK 0x0000000000000038 76*5113495bSYour Name 77*5113495bSYour Name 78*5113495bSYour Name /* Description DL_UL_FLAG 79*5113495bSYour Name 80*5113495bSYour Name Differentiates between DL and UL transmission 81*5113495bSYour Name 82*5113495bSYour Name <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 83*5113495bSYour Name <enum 1 DL_UL_FLAG_IS_UL> 84*5113495bSYour Name <legal all> 85*5113495bSYour Name */ 86*5113495bSYour Name 87*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DL_UL_FLAG_OFFSET 0x0000000000000000 88*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DL_UL_FLAG_LSB 6 89*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DL_UL_FLAG_MSB 6 90*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DL_UL_FLAG_MASK 0x0000000000000040 91*5113495bSYour Name 92*5113495bSYour Name 93*5113495bSYour Name /* Description BSS_COLOR_ID 94*5113495bSYour Name 95*5113495bSYour Name BSS color ID 96*5113495bSYour Name 97*5113495bSYour Name Field used by MAC HW 98*5113495bSYour Name <legal all> 99*5113495bSYour Name */ 100*5113495bSYour Name 101*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_BSS_COLOR_ID_OFFSET 0x0000000000000000 102*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_BSS_COLOR_ID_LSB 7 103*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_BSS_COLOR_ID_MSB 12 104*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_BSS_COLOR_ID_MASK 0x0000000000001f80 105*5113495bSYour Name 106*5113495bSYour Name 107*5113495bSYour Name /* Description TXOP_DURATION 108*5113495bSYour Name 109*5113495bSYour Name Indicates the remaining time in the current TXOP 110*5113495bSYour Name 111*5113495bSYour Name Field used by MAC HW 112*5113495bSYour Name <legal all> 113*5113495bSYour Name */ 114*5113495bSYour Name 115*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TXOP_DURATION_OFFSET 0x0000000000000000 116*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TXOP_DURATION_LSB 13 117*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TXOP_DURATION_MSB 19 118*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TXOP_DURATION_MASK 0x00000000000fe000 119*5113495bSYour Name 120*5113495bSYour Name 121*5113495bSYour Name /* Description DISREGARD_0A 122*5113495bSYour Name 123*5113495bSYour Name Set to value indicated in the trigger frame 124*5113495bSYour Name <legal all> 125*5113495bSYour Name */ 126*5113495bSYour Name 127*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DISREGARD_0A_OFFSET 0x0000000000000000 128*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DISREGARD_0A_LSB 20 129*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DISREGARD_0A_MSB 25 130*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DISREGARD_0A_MASK 0x0000000003f00000 131*5113495bSYour Name 132*5113495bSYour Name 133*5113495bSYour Name /* Description RESERVED_0C 134*5113495bSYour Name 135*5113495bSYour Name <legal 0> 136*5113495bSYour Name */ 137*5113495bSYour Name 138*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RESERVED_0C_OFFSET 0x0000000000000000 139*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RESERVED_0C_LSB 26 140*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RESERVED_0C_MSB 31 141*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RESERVED_0C_MASK 0x00000000fc000000 142*5113495bSYour Name 143*5113495bSYour Name 144*5113495bSYour Name /* Description EHT_PPDU_SIG_CMN_TYPE 145*5113495bSYour Name 146*5113495bSYour Name <enum 3 EHT_PPDU_SIG_rsvd> DO NOT USE 147*5113495bSYour Name <enum 0 EHT_PPDU_SIG_TB_or_DL_OFDMA> Need to look at both 148*5113495bSYour Name EHT-SIG content channels for DL OFDMA (including OFDMA+MU-MIMO) 149*5113495bSYour Name 150*5113495bSYour Name <enum 2 EHT_PPDU_SIG_DL_MU_MIMO> Need to look at both EHT-SIG 151*5113495bSYour Name content channels 152*5113495bSYour Name <enum 1 EHT_PPDU_SIG_SU> Need to look at only one EHT-SIG 153*5113495bSYour Name content channel 154*5113495bSYour Name <legal all> 155*5113495bSYour Name */ 156*5113495bSYour Name 157*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_EHT_PPDU_SIG_CMN_TYPE_OFFSET 0x0000000000000000 158*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_EHT_PPDU_SIG_CMN_TYPE_LSB 32 159*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_EHT_PPDU_SIG_CMN_TYPE_MSB 33 160*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_EHT_PPDU_SIG_CMN_TYPE_MASK 0x0000000300000000 161*5113495bSYour Name 162*5113495bSYour Name 163*5113495bSYour Name /* Description VALIDATE_1A 164*5113495bSYour Name 165*5113495bSYour Name Set to value indicated in the trigger frame 166*5113495bSYour Name <legal 1> 167*5113495bSYour Name */ 168*5113495bSYour Name 169*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_VALIDATE_1A_OFFSET 0x0000000000000000 170*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_VALIDATE_1A_LSB 34 171*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_VALIDATE_1A_MSB 34 172*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_VALIDATE_1A_MASK 0x0000000400000000 173*5113495bSYour Name 174*5113495bSYour Name 175*5113495bSYour Name /* Description SPATIAL_REUSE 176*5113495bSYour Name 177*5113495bSYour Name TODO: Placeholder 178*5113495bSYour Name <legal all> 179*5113495bSYour Name */ 180*5113495bSYour Name 181*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_SPATIAL_REUSE_OFFSET 0x0000000000000000 182*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_SPATIAL_REUSE_LSB 35 183*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_SPATIAL_REUSE_MSB 42 184*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_SPATIAL_REUSE_MASK 0x000007f800000000 185*5113495bSYour Name 186*5113495bSYour Name 187*5113495bSYour Name /* Description DISREGARD_1B 188*5113495bSYour Name 189*5113495bSYour Name Set to value indicated in the trigger frame 190*5113495bSYour Name <legal all> 191*5113495bSYour Name */ 192*5113495bSYour Name 193*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DISREGARD_1B_OFFSET 0x0000000000000000 194*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DISREGARD_1B_LSB 43 195*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DISREGARD_1B_MSB 47 196*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_DISREGARD_1B_MASK 0x0000f80000000000 197*5113495bSYour Name 198*5113495bSYour Name 199*5113495bSYour Name /* Description CRC 200*5113495bSYour Name 201*5113495bSYour Name CRC for U-SIG contents 202*5113495bSYour Name <legal all> 203*5113495bSYour Name */ 204*5113495bSYour Name 205*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_CRC_OFFSET 0x0000000000000000 206*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_CRC_LSB 48 207*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_CRC_MSB 51 208*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_CRC_MASK 0x000f000000000000 209*5113495bSYour Name 210*5113495bSYour Name 211*5113495bSYour Name /* Description TAIL 212*5113495bSYour Name 213*5113495bSYour Name <legal 0> 214*5113495bSYour Name */ 215*5113495bSYour Name 216*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TAIL_OFFSET 0x0000000000000000 217*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TAIL_LSB 52 218*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TAIL_MSB 57 219*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_TAIL_MASK 0x03f0000000000000 220*5113495bSYour Name 221*5113495bSYour Name 222*5113495bSYour Name /* Description RESERVED_1C 223*5113495bSYour Name 224*5113495bSYour Name <legal 0> 225*5113495bSYour Name */ 226*5113495bSYour Name 227*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RESERVED_1C_OFFSET 0x0000000000000000 228*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RESERVED_1C_LSB 58 229*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RESERVED_1C_MSB 62 230*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RESERVED_1C_MASK 0x7c00000000000000 231*5113495bSYour Name 232*5113495bSYour Name 233*5113495bSYour Name /* Description RX_INTEGRITY_CHECK_PASSED 234*5113495bSYour Name 235*5113495bSYour Name TX side: Set to 0 236*5113495bSYour Name RX side: Set to 1 if PHY determines the U-SIG CRC check 237*5113495bSYour Name has passed, else set to 0 238*5113495bSYour Name 239*5113495bSYour Name <legal all> 240*5113495bSYour Name */ 241*5113495bSYour Name 242*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000 243*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 63 244*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 63 245*5113495bSYour Name #define MACTX_U_SIG_EHT_TB_MACTX_U_SIG_EHT_TB_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x8000000000000000 246*5113495bSYour Name 247*5113495bSYour Name 248*5113495bSYour Name 249*5113495bSYour Name #endif // MACTX_U_SIG_EHT_TB 250