1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _MACTX_VHT_SIG_B_MU20_H_ 18 #define _MACTX_VHT_SIG_B_MU20_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #include "vht_sig_b_mu20_info.h" 23 #define NUM_OF_DWORDS_MACTX_VHT_SIG_B_MU20 2 24 25 #define NUM_OF_QWORDS_MACTX_VHT_SIG_B_MU20 1 26 27 28 struct mactx_vht_sig_b_mu20 { 29 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 30 struct vht_sig_b_mu20_info mactx_vht_sig_b_mu20_info_details; 31 uint32_t tlv64_padding : 32; // [31:0] 32 #else 33 struct vht_sig_b_mu20_info mactx_vht_sig_b_mu20_info_details; 34 uint32_t tlv64_padding : 32; // [31:0] 35 #endif 36 }; 37 38 39 /* Description MACTX_VHT_SIG_B_MU20_INFO_DETAILS 40 41 See detailed description of the STRUCT 42 */ 43 44 45 /* Description LENGTH 46 47 VHT-SIG-B Length (in units of 4 octets) = ceiling (LENGTH/4) 48 49 <legal all> 50 */ 51 52 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_LENGTH_OFFSET 0x0000000000000000 53 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_LENGTH_LSB 0 54 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_LENGTH_MSB 15 55 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_LENGTH_MASK 0x000000000000ffff 56 57 58 /* Description MCS 59 60 Modulation as described in vht_sig_a mcs field 61 <legal 0-11> 62 */ 63 64 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_MCS_OFFSET 0x0000000000000000 65 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_MCS_LSB 16 66 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_MCS_MSB 19 67 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_MCS_MASK 0x00000000000f0000 68 69 70 /* Description TAIL 71 72 Used to terminate the trellis of the convolutional decoder. 73 74 <legal all> 75 */ 76 77 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_TAIL_OFFSET 0x0000000000000000 78 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_TAIL_LSB 20 79 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_TAIL_MSB 25 80 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_TAIL_MASK 0x0000000003f00000 81 82 83 /* Description MU_USER_NUMBER 84 85 Not part of VHT-SIG-B. 86 Mapping from user number (BFer hardware specific) to mu_user_number. 87 The reader is directed to the previous chapter (User Number) 88 for a definition of the terms user and mu_user. 89 <legal 0-3> 90 */ 91 92 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_MU_USER_NUMBER_OFFSET 0x0000000000000000 93 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_MU_USER_NUMBER_LSB 26 94 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_MU_USER_NUMBER_MSB 28 95 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_MU_USER_NUMBER_MASK 0x000000001c000000 96 97 98 /* Description RESERVED_0 99 100 <legal 0> 101 */ 102 103 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_RESERVED_0_OFFSET 0x0000000000000000 104 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_RESERVED_0_LSB 29 105 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_RESERVED_0_MSB 31 106 #define MACTX_VHT_SIG_B_MU20_MACTX_VHT_SIG_B_MU20_INFO_DETAILS_RESERVED_0_MASK 0x00000000e0000000 107 108 109 /* Description TLV64_PADDING 110 111 Automatic DWORD padding inserted while converting TLV32 112 to TLV64 for 64 bit ARCH 113 <legal 0> 114 */ 115 116 #define MACTX_VHT_SIG_B_MU20_TLV64_PADDING_OFFSET 0x0000000000000000 117 #define MACTX_VHT_SIG_B_MU20_TLV64_PADDING_LSB 32 118 #define MACTX_VHT_SIG_B_MU20_TLV64_PADDING_MSB 63 119 #define MACTX_VHT_SIG_B_MU20_TLV64_PADDING_MASK 0xffffffff00000000 120 121 122 123 #endif // MACTX_VHT_SIG_B_MU20 124