1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef _MACTX_VHT_SIG_B_SU20_H_ 18*5113495bSYour Name #define _MACTX_VHT_SIG_B_SU20_H_ 19*5113495bSYour Name #if !defined(__ASSEMBLER__) 20*5113495bSYour Name #endif 21*5113495bSYour Name 22*5113495bSYour Name #include "vht_sig_b_su20_info.h" 23*5113495bSYour Name #define NUM_OF_DWORDS_MACTX_VHT_SIG_B_SU20 2 24*5113495bSYour Name 25*5113495bSYour Name #define NUM_OF_QWORDS_MACTX_VHT_SIG_B_SU20 1 26*5113495bSYour Name 27*5113495bSYour Name 28*5113495bSYour Name struct mactx_vht_sig_b_su20 { 29*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 30*5113495bSYour Name struct vht_sig_b_su20_info mactx_vht_sig_b_su20_info_details; 31*5113495bSYour Name uint32_t tlv64_padding : 32; // [31:0] 32*5113495bSYour Name #else 33*5113495bSYour Name struct vht_sig_b_su20_info mactx_vht_sig_b_su20_info_details; 34*5113495bSYour Name uint32_t tlv64_padding : 32; // [31:0] 35*5113495bSYour Name #endif 36*5113495bSYour Name }; 37*5113495bSYour Name 38*5113495bSYour Name 39*5113495bSYour Name /* Description MACTX_VHT_SIG_B_SU20_INFO_DETAILS 40*5113495bSYour Name 41*5113495bSYour Name See detailed description of the STRUCT 42*5113495bSYour Name */ 43*5113495bSYour Name 44*5113495bSYour Name 45*5113495bSYour Name /* Description LENGTH 46*5113495bSYour Name 47*5113495bSYour Name VHT-SIG-B Length (in units of 4 octets) = ceiling (LENGTH/4) 48*5113495bSYour Name 49*5113495bSYour Name <legal all> 50*5113495bSYour Name */ 51*5113495bSYour Name 52*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_LENGTH_OFFSET 0x0000000000000000 53*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_LENGTH_LSB 0 54*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_LENGTH_MSB 16 55*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_LENGTH_MASK 0x000000000001ffff 56*5113495bSYour Name 57*5113495bSYour Name 58*5113495bSYour Name /* Description VHTB_RESERVED 59*5113495bSYour Name 60*5113495bSYour Name Reserved: Set to all ones for non-NDP frames and ignored 61*5113495bSYour Name on receive 62*5113495bSYour Name <legal 2,7> 63*5113495bSYour Name */ 64*5113495bSYour Name 65*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_VHTB_RESERVED_OFFSET 0x0000000000000000 66*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_VHTB_RESERVED_LSB 17 67*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_VHTB_RESERVED_MSB 19 68*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_VHTB_RESERVED_MASK 0x00000000000e0000 69*5113495bSYour Name 70*5113495bSYour Name 71*5113495bSYour Name /* Description TAIL 72*5113495bSYour Name 73*5113495bSYour Name Used to terminate the trellis of the convolutional decoder. 74*5113495bSYour Name 75*5113495bSYour Name Set to 0. <legal 0> 76*5113495bSYour Name */ 77*5113495bSYour Name 78*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_TAIL_OFFSET 0x0000000000000000 79*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_TAIL_LSB 20 80*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_TAIL_MSB 25 81*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_TAIL_MASK 0x0000000003f00000 82*5113495bSYour Name 83*5113495bSYour Name 84*5113495bSYour Name /* Description RESERVED 85*5113495bSYour Name 86*5113495bSYour Name Not part of VHT-SIG-B. 87*5113495bSYour Name Reserved: Set to 0 and ignored on receive <legal 0> 88*5113495bSYour Name */ 89*5113495bSYour Name 90*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RESERVED_OFFSET 0x0000000000000000 91*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RESERVED_LSB 26 92*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RESERVED_MSB 30 93*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RESERVED_MASK 0x000000007c000000 94*5113495bSYour Name 95*5113495bSYour Name 96*5113495bSYour Name /* Description RX_NDP 97*5113495bSYour Name 98*5113495bSYour Name Not part of VHT-SIG-B. 99*5113495bSYour Name Used to identify received NDP frame 100*5113495bSYour Name <legal 0,1> 101*5113495bSYour Name */ 102*5113495bSYour Name 103*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RX_NDP_OFFSET 0x0000000000000000 104*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RX_NDP_LSB 31 105*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RX_NDP_MSB 31 106*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RX_NDP_MASK 0x0000000080000000 107*5113495bSYour Name 108*5113495bSYour Name 109*5113495bSYour Name /* Description TLV64_PADDING 110*5113495bSYour Name 111*5113495bSYour Name Automatic DWORD padding inserted while converting TLV32 112*5113495bSYour Name to TLV64 for 64 bit ARCH 113*5113495bSYour Name <legal 0> 114*5113495bSYour Name */ 115*5113495bSYour Name 116*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_TLV64_PADDING_OFFSET 0x0000000000000000 117*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_TLV64_PADDING_LSB 32 118*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_TLV64_PADDING_MSB 63 119*5113495bSYour Name #define MACTX_VHT_SIG_B_SU20_TLV64_PADDING_MASK 0xffffffff00000000 120*5113495bSYour Name 121*5113495bSYour Name 122*5113495bSYour Name 123*5113495bSYour Name #endif // MACTX_VHT_SIG_B_SU20 124